/trunk/kernel/arch/mips32/include/context_offset.h |
---|
114,10 → 114,10 |
sw $s8,OFFSET_S8(\ctx) |
sw $gp,OFFSET_GP(\ctx) |
#ifndef KERNEL |
#ifndef KERNEL |
sw $k1,OFFSET_TLS(\ctx) |
# ifdef CONFIG_MIPS_FPU |
#ifdef CONFIG_FPU |
mfc1 $t0,$20 |
sw $t0, OFFSET_F20(\ctx) |
150,7 → 150,7 |
mfc1 $t0,$30 |
sw $t0, OFFSET_F30(\ctx) |
# endif /* CONFIG_MIPS_FPU */ |
#endif /* CONFIG_FPU */ |
#endif /* KERNEL */ |
sw $ra,OFFSET_PC(\ctx) |
172,7 → 172,7 |
#ifndef KERNEL |
lw $k1,OFFSET_TLS(\ctx) |
# ifdef CONFIG_MIPS_FPU |
#ifdef CONFIG_FPU |
lw $t0, OFFSET_F20(\ctx) |
mtc1 $t0,$20 |
205,9 → 205,9 |
lw $t0, OFFSET_F30(\ctx) |
mtc1 $t0,$30 |
# endif /* CONFIG_MIPS_FPU */ |
#endif /* CONFIG_FPU */ |
#endif /* KERNEL */ |
lw $ra,OFFSET_PC(\ctx) |
lw $sp,OFFSET_SP(\ctx) |
.endm |
/trunk/kernel/arch/mips32/include/asm.h |
---|
70,6 → 70,17 |
extern void interrupts_restore(ipl_t ipl); |
extern ipl_t interrupts_read(void); |
/** No I/O port address space on MIPS. */ |
static inline void outb(ioport_t port, uint8_t v) |
{ |
} |
/** No I/O port address space on MIPS. */ |
static inline uint8_t inb(ioport_t port) |
{ |
return 0; |
} |
#endif |
/** @} |