/trunk/kernel/arch/mips32/include/asm.h |
---|
36,6 → 36,7 |
#define KERN_mips32_ASM_H_ |
#include <arch/types.h> |
#include <typedefs.h> |
#include <config.h> |
/trunk/kernel/arch/mips32/include/mm/tlb.h |
---|
36,6 → 36,7 |
#define KERN_mips32_TLB_H_ |
#include <arch/exception.h> |
#include <typedefs.h> |
#ifdef TLBCNT |
# define TLB_ENTRY_COUNT TLBCNT |
51,7 → 52,12 |
#define PAGE_UNCACHED 2 |
#define PAGE_CACHEABLE_EXC_WRITE 5 |
typedef union { |
typedef union entry_lo entry_lo_t; |
typedef union entry_hi entry_hi_t; |
typedef union page_mask page_mask_t; |
typedef union index tlb_index_t; |
union entry_lo { |
struct { |
#ifdef BIG_ENDIAN |
unsigned : 2; /* zero */ |
70,9 → 76,22 |
#endif |
} __attribute__ ((packed)); |
uint32_t value; |
} entry_lo_t; |
}; |
typedef union { |
/** Page Table Entry. */ |
struct pte { |
unsigned g : 1; /**< Global bit. */ |
unsigned p : 1; /**< Present bit. */ |
unsigned d : 1; /**< Dirty bit. */ |
unsigned cacheable : 1; /**< Cacheable bit. */ |
unsigned : 1; /**< Unused. */ |
unsigned soft_valid : 1; /**< Valid content even if not present. */ |
unsigned pfn : 24; /**< Physical frame number. */ |
unsigned w : 1; /**< Page writable bit. */ |
unsigned a : 1; /**< Accessed bit. */ |
}; |
union entry_hi { |
struct { |
#ifdef BIG_ENDIAN |
unsigned vpn2 : 19; |
85,9 → 104,9 |
#endif |
} __attribute__ ((packed)); |
uint32_t value; |
} entry_hi_t; |
}; |
typedef union { |
union page_mask { |
struct { |
#ifdef BIG_ENDIAN |
unsigned : 7; |
100,9 → 119,9 |
#endif |
} __attribute__ ((packed)); |
uint32_t value; |
} page_mask_t; |
}; |
typedef union { |
union index { |
struct { |
#ifdef BIG_ENDIAN |
unsigned p : 1; |
115,7 → 134,7 |
#endif |
} __attribute__ ((packed)); |
uint32_t value; |
} tlb_index_t; |
}; |
/** Probe TLB for Matching Entry |
* |
/trunk/kernel/arch/mips32/include/mm/page.h |
---|
43,11 → 43,11 |
#define PAGE_COLOR_BITS 0 /* dummy */ |
#ifndef __ASM__ |
# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) |
# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) |
# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) |
# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) |
#else |
# define KA2PA(x) ((x) - 0x80000000) |
# define PA2KA(x) ((x) + 0x80000000) |
# define KA2PA(x) ((x) - 0x80000000) |
# define PA2KA(x) ((x) + 0x80000000) |
#endif |
#ifdef KERNEL |
109,8 → 109,10 |
#ifndef __ASM__ |
#include <mm/mm.h> |
#include <arch/exception.h> |
#include <arch/mm/tlb.h> |
#include <mm/page.h> |
#include <arch/mm/frame.h> |
#include <arch/types.h> |
static inline int get_pt_flags(pte_t *pt, index_t i) |
{ |
/trunk/kernel/arch/mips32/include/mm/as.h |
---|
42,13 → 42,11 |
#define USER_ADDRESS_SPACE_START_ARCH (unsigned long) 0x00000000 |
#define USER_ADDRESS_SPACE_END_ARCH (unsigned long) 0x7fffffff |
#define USTACK_ADDRESS_ARCH (0x80000000 - PAGE_SIZE) |
#define USTACK_ADDRESS_ARCH (0x80000000-PAGE_SIZE) |
typedef struct { |
} as_arch_t; |
#include <genarch/mm/as_pt.h> |
#define as_constructor_arch(as, flags) (as != as) |
#define as_destructor_arch(as) (as != as) |
#define as_create_arch(as, flags) (as != as) |
/trunk/kernel/arch/mips32/include/cpu.h |
---|
36,7 → 36,6 |
#define KERN_mips32_CPU_H_ |
#include <arch/types.h> |
#include <arch/asm.h> |
typedef struct { |
uint32_t imp_num; |
/trunk/kernel/arch/mips32/include/context_offset.h |
---|
42,7 → 42,7 |
#define OFFSET_S8 0x28 |
#define OFFSET_GP 0x2c |
/* istate_t */ |
/* struct istate */ |
#define EOFFSET_AT 0x0 |
#define EOFFSET_V0 0x4 |
#define EOFFSET_V1 0x8 |
/trunk/kernel/arch/mips32/include/interrupt.h |
---|
35,7 → 35,6 |
#ifndef KERN_mips32_INTERRUPT_H_ |
#define KERN_mips32_INTERRUPT_H_ |
#include <typedefs.h> |
#include <arch/exception.h> |
#define IVT_ITEMS 32 |
/trunk/kernel/arch/mips32/include/exception.h |
---|
36,6 → 36,7 |
#define KERN_mips32_EXCEPTION_H_ |
#include <arch/types.h> |
#include <typedefs.h> |
#include <arch/cp0.h> |
#define EXC_Int 0 |
57,7 → 58,7 |
#define EXC_WATCH 23 |
#define EXC_VCED 31 |
typedef struct { |
struct istate { |
uint32_t at; |
uint32_t v0; |
uint32_t v1; |
94,7 → 95,7 |
uint32_t status; /* cp0_status */ |
uint32_t epc; /* cp0_epc */ |
uint32_t k1; /* We use it as thread-local pointer */ |
} istate_t; |
}; |
static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr) |
{ |
/trunk/kernel/arch/mips32/include/cache.h |
---|
35,7 → 35,7 |
#ifndef KERN_mips32_CACHE_H_ |
#define KERN_mips32_CACHE_H_ |
#include <arch/exception.h> |
#include <typedefs.h> |
extern void cache_error(istate_t *istate); |
/trunk/kernel/arch/mips32/include/types.h |
---|
35,26 → 35,21 |
#ifndef KERN_mips32_TYPES_H_ |
#define KERN_mips32_TYPES_H_ |
#define NULL 0 |
#define false 0 |
#define true 1 |
#define NULL 0 |
typedef signed char int8_t; |
typedef unsigned char uint8_t; |
typedef signed short int16_t; |
typedef unsigned short uint16_t; |
typedef unsigned long uint32_t; |
typedef signed long int32_t; |
typedef signed long long int64_t; |
typedef unsigned char uint8_t; |
typedef unsigned short uint16_t; |
typedef unsigned long uint32_t; |
typedef unsigned long long uint64_t; |
typedef signed long long int64_t; |
typedef uint32_t size_t; |
typedef uint32_t count_t; |
typedef uint32_t index_t; |
typedef uint32_t uintptr_t; |
typedef uint32_t pfn_t; |
typedef uint32_t ipl_t; |
61,26 → 56,10 |
typedef uint32_t unative_t; |
typedef int32_t native_t; |
typedef uint8_t bool; |
typedef uint64_t task_id_t; |
typedef uint32_t context_id_t; |
typedef struct pte pte_t; |
typedef int32_t inr_t; |
typedef int32_t devno_t; |
typedef uint32_t pfn_t; |
/** Page Table Entry. */ |
typedef struct { |
unsigned g : 1; /**< Global bit. */ |
unsigned p : 1; /**< Present bit. */ |
unsigned d : 1; /**< Dirty bit. */ |
unsigned cacheable : 1; /**< Cacheable bit. */ |
unsigned : 1; /**< Unused. */ |
unsigned soft_valid : 1; /**< Valid content even if not present. */ |
unsigned pfn : 24; /**< Physical frame number. */ |
unsigned w : 1; /**< Page writable bit. */ |
unsigned a : 1; /**< Accessed bit. */ |
} pte_t; |
#endif |
/** @} |
/trunk/kernel/arch/mips32/include/cp0.h |
---|
36,13 → 36,14 |
#define KERN_mips32_CP0_H_ |
#include <arch/types.h> |
#include <arch/mm/tlb.h> |
#define cp0_status_ie_enabled_bit (1 << 0) |
#define cp0_status_exl_exception_bit (1 << 1) |
#define cp0_status_erl_error_bit (1 << 2) |
#define cp0_status_um_bit (1 << 4) |
#define cp0_status_bev_bootstrap_bit (1 << 22) |
#define cp0_status_fpu_bit (1 << 29) |
#define cp0_status_ie_enabled_bit (1<<0) |
#define cp0_status_exl_exception_bit (1<<1) |
#define cp0_status_erl_error_bit (1<<2) |
#define cp0_status_um_bit (1<<4) |
#define cp0_status_bev_bootstrap_bit (1<<22) |
#define cp0_status_fpu_bit (1<<29) |
#define cp0_status_im_shift 8 |
#define cp0_status_im_mask 0xff00 |
59,8 → 60,8 |
#define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) |
#define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask) |
#define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it)))) |
#define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it)))) |
#define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1<<(cp0_status_im_shift+(it)))) |
#define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1<<(cp0_status_im_shift+(it)))) |
#define GEN_READ_CP0(nm,reg) static inline uint32_t cp0_ ##nm##_read(void) \ |
{ \ |
/trunk/kernel/arch/mips32/include/debugger.h |
---|
35,6 → 35,7 |
#ifndef KERN_mips32_DEBUGGER_H_ |
#define KERN_mips32_DEBUGGER_H_ |
#include <typedefs.h> |
#include <arch/exception.h> |
#include <arch/types.h> |
/trunk/kernel/arch/mips32/src/exception.c |
---|
34,7 → 34,6 |
#include <arch/exception.h> |
#include <arch/interrupt.h> |
#include <arch/mm/tlb.h> |
#include <panic.h> |
#include <arch/cp0.h> |
#include <arch/types.h> |
/trunk/kernel/arch/mips32/src/cache.c |
---|
34,6 → 34,7 |
#include <arch/cache.h> |
#include <arch/exception.h> |
#include <typedefs.h> |
#include <panic.h> |
void cache_error(istate_t *istate) |
/trunk/kernel/arch/mips32/src/cpu/cpu.c |
---|
34,8 → 34,12 |
#include <arch/cpu.h> |
#include <cpu.h> |
#include <arch.h> |
#include <arch/cp0.h> |
#include <typedefs.h> |
#include <print.h> |
struct data_t { |
/trunk/kernel/arch/mips32/src/mips32.c |
---|
36,6 → 36,7 |
#include <arch/boot.h> |
#include <arch/cp0.h> |
#include <arch/exception.h> |
#include <arch/asm.h> |
#include <mm/as.h> |
#include <userspace.h> |
/trunk/kernel/arch/mips32/src/ddi/ddi.c |
---|
35,6 → 35,7 |
#include <ddi/ddi.h> |
#include <proc/task.h> |
#include <arch/types.h> |
#include <typedefs.h> |
#include <security/cap.h> |
#include <arch.h> |
#include <arch/cp0.h> |
/trunk/kernel/arch/mips32/src/interrupt.c |
---|
41,6 → 41,7 |
#include <arch/drivers/arc.h> |
#include <ipc/sysipc.h> |
#include <ddi/device.h> |
#include <ddi/irq.h> |
#define IRQ_COUNT 8 |
#define TIMER_IRQ 7 |
/trunk/kernel/arch/mips32/src/drivers/serial.c |
---|
34,10 → 34,10 |
#include <interrupt.h> |
#include <arch/cp0.h> |
#include <ipc/irq.h> |
#include <arch/drivers/serial.h> |
#include <console/chardev.h> |
#include <console/console.h> |
#include <ddi/irq.h> |
#define SERIAL_IRQ 2 |
/trunk/kernel/arch/mips32/src/drivers/msim.c |
---|
33,11 → 33,11 |
*/ |
#include <interrupt.h> |
#include <ipc/irq.h> |
#include <console/chardev.h> |
#include <arch/drivers/msim.h> |
#include <arch/cp0.h> |
#include <console/console.h> |
#include <ddi/irq.h> |
#include <sysinfo/sysinfo.h> |
/** Address of devices. */ |