| 37,11 → 37,9 |
|---|
| #include <arch/register.h> |
| #include <print.h> |
| |
| |
| void fpu_context_save(fpu_context_t *fctx){ |
| |
| void fpu_context_save(fpu_context_t *fctx) |
| { |
| asm volatile( |
| |
| "stf.spill [%0]=f32,0x80\n" |
| "stf.spill [%1]=f33,0x80\n" |
| "stf.spill [%2]=f34,0x80\n" |
| 114,7 → 112,6 |
|---|
| "stf.spill [%6]=f94,0x80\n" |
| "stf.spill [%7]=f95,0x80\n;;" |
| |
| |
| "stf.spill [%0]=f96,0x80\n" |
| "stf.spill [%1]=f97,0x80\n" |
| "stf.spill [%2]=f98,0x80\n" |
| 151,7 → 148,6 |
|---|
| "stf.spill [%6]=f126,0x80\n" |
| "stf.spill [%7]=f127,0x80\n;;" |
| |
| |
| : |
| :"r" (&((fctx->fr)[0])),"r" (&((fctx->fr)[1])),"r" (&((fctx->fr)[2])),"r" (&((fctx->fr)[3])), |
| "r" (&((fctx->fr)[4])),"r" (&((fctx->fr)[5])),"r" (&((fctx->fr)[6])),"r" (&((fctx->fr)[7])) |
| 159,10 → 155,8 |
|---|
| |
| } |
| |
| |
| void fpu_context_restore(fpu_context_t *fctx) |
| { |
| |
| asm volatile( |
| "ldf.fill f32=[%0],0x80\n" |
| "ldf.fill f33=[%1],0x80\n" |
| 236,7 → 230,6 |
|---|
| "ldf.fill f94=[%6],0x80\n" |
| "ldf.fill f95=[%7],0x80\n;;" |
| |
| |
| "ldf.fill f96=[%0],0x80\n" |
| "ldf.fill f97=[%1],0x80\n" |
| "ldf.fill f98=[%2],0x80\n" |
| 273,7 → 266,6 |
|---|
| "ldf.fill f126=[%6],0x80\n" |
| "ldf.fill f127=[%7],0x80\n;;" |
| |
| |
| : |
| :"r" (&((fctx->fr)[0])),"r" (&((fctx->fr)[1])),"r" (&((fctx->fr)[2])),"r" (&((fctx->fr)[3])), |
| "r" (&((fctx->fr)[4])),"r" (&((fctx->fr)[5])),"r" (&((fctx->fr)[6])),"r" (&((fctx->fr)[7])) |
| 283,6 → 275,7 |
|---|
| void fpu_enable(void) |
| { |
| uint64_t a = 0 ; |
| |
| asm volatile( |
| "rsm %0;;" |
| "srlz.i\n" |
| 290,8 → 283,8 |
|---|
| : |
| :"i" (PSR_DFH_MASK) |
| ); |
| asm volatile |
| ( |
| |
| asm volatile ( |
| "mov %0=ar.fpsr;;\n" |
| "or %0=%0,%1;;\n" |
| "mov ar.fpsr=%0;;\n" |
| 298,13 → 291,12 |
|---|
| : "+r" (a) |
| : "r" (0x38) |
| ); |
| |
| } |
| |
| void fpu_disable(void) |
| { |
| uint64_t a = 0 ; |
| |
| uint64_t a = 0 ; |
| asm volatile( |
| "ssm %0;;\n" |
| "srlz.i\n" |
| 312,8 → 304,8 |
|---|
| : |
| :"i" (PSR_DFH_MASK) |
| ); |
| asm volatile |
| ( |
| |
| asm volatile ( |
| "mov %0=ar.fpsr;;\n" |
| "or %0=%0,%1;;\n" |
| "mov ar.fpsr=%0;;\n" |
| 320,14 → 312,13 |
|---|
| : "+r" (a) |
| : "r" (0x38) |
| ); |
| |
| } |
| |
| void fpu_init(void) |
| { |
| uint64_t a = 0 ; |
| asm volatile |
| ( |
| |
| asm volatile ( |
| "mov %0=ar.fpsr;;\n" |
| "or %0=%0,%1;;\n" |
| "mov ar.fpsr=%0;;\n" |
| 474,12 → 465,9 |
|---|
| "mov f125=f0\n" |
| "mov f126=f0\n" |
| "mov f127=f0\n" |
| |
| ); |
| |
| } |
| |
| |
| /** @} |
| */ |
| |