| /trunk/kernel/arch/ia64/include/mm/page.h |
|---|
| 48,15 → 48,8 |
| #define IO_PAGE_WIDTH 26 /* 64M */ |
| #define FW_PAGE_WIDTH 28 /* 256M */ |
| #define USPACE_IO_PAGE_WIDTH 12 /* 4K */ |
| /** Staticly mapped IO spaces */ |
| /** Staticly mapped IO spaces - offsets to 0xe...00 of virtual adresses |
| becauce of "minimal virtual bits implemented is 51" |
| it is possible to have here values up to 0x0007000000000000 |
| */ |
| /* Firmware area (bellow 4GB in phys mem) */ |
| #define FW_OFFSET 0x00000000F0000000 |
| /* Legacy IO space */ |
| /trunk/kernel/arch/ia64/include/mm/tlb.h |
|---|
| 46,8 → 46,8 |
| /** Data and instruction Translation Register indices. */ |
| #define DTR_KERNEL 0 |
| #define ITR_KERNEL 0 |
| #define DTR_KSTACK1 4 |
| #define DTR_KSTACK2 5 |
| #define DTR_KSTACK1 1 |
| #define DTR_KSTACK2 2 |
| /** Portion of TLB insertion format data structure. */ |
| union tlb_entry { |