/trunk/kernel/arch/ia32xen/include/boot/boot.h |
---|
117,8 → 117,19 |
uint32_t flags; /**< SIF_xxx flags */ |
pfn_t store_mfn; /**< Shared page (machine page) */ |
evtchn_t store_evtchn; /**< Event channel for store communication */ |
pfn_t console_mfn; /**< Console page (machine page) */ |
evtchn_t console_evtchn; /**< Event channel for console messages */ |
union { |
struct { |
pfn_t mfn; /**< Console page (machine page) */ |
evtchn_t evtchn; /**< Event channel for console messages */ |
} domU; |
struct { |
uint32_t info_off; /**< Offset of console_info struct */ |
uint32_t info_size; /**< Size of console_info struct from start */ |
} dom0; |
} console; |
pte_t *ptl0; /**< Boot PTL0 (kernel address) */ |
uint32_t pt_frames; /**< Number of bootstrap page table frames */ |
pfn_t *pm_map; /**< Physical->machine frame map (kernel address) */ |
127,7 → 138,41 |
int8_t cmd_line[GUEST_CMDLINE]; |
} start_info_t; |
#define XEN_CONSOLE_VGA 0x03 |
#define XEN_CONSOLE_VESA 0x23 |
typedef struct { |
uint8_t video_type; |
union { |
struct { |
uint16_t font_height; |
uint16_t cursor_x; |
uint16_t cursor_y; |
uint16_t rows; |
uint16_t columns; |
} vga; |
struct { |
uint16_t width; |
uint16_t height; |
uint16_t bytes_per_line; |
uint16_t bits_per_pixel; |
uint32_t lfb_base; |
uint32_t lfb_size; |
uint8_t red_pos; |
uint8_t red_size; |
uint8_t green_pos; |
uint8_t green_size; |
uint8_t blue_pos; |
uint8_t blue_size; |
uint8_t rsvd_pos; |
uint8_t rsvd_size; |
} vesa_lfb; |
} info; |
} console_info_t; |
typedef struct { |
pfn_t start; |
pfn_t size; |
pfn_t reserved; |
/trunk/kernel/arch/ia32xen/include/hypercall.h |
---|
61,7 → 61,6 |
#define XEN_EVENT_CHANNEL_OP 16 |
#define XEN_VERSION 17 |
#define XEN_CONSOLE_IO 18 |
#define XEN_VM_ASSIST 21 |
#define XEN_MMUEXT_OP 26 |
101,16 → 100,6 |
#define UVMF_ALL (1 << 2) /**< Flush all TLBs */ |
/* |
* Commands to XEN_VM_ASSIST |
*/ |
#define VMASST_CMD_ENABLE 0 |
#define VMASST_CMD_DISABLE 1 |
#define VMASST_TYPE_4GB_SEGMENTS 0 |
#define VMASST_TYPE_4GB_SEGMENTS_NOTIFY 1 |
#define VMASST_TYPE_WRITABLE_PAGETABLES 2 |
#define DOMID_SELF (0x7FF0U) |
#define DOMID_IO (0x7FF1U) |
220,11 → 209,6 |
return hypercall3(XEN_CONSOLE_IO, cmd, count, str); |
} |
static inline int xen_vm_assist(const unsigned int cmd, const unsigned int type) |
{ |
return hypercall2(XEN_VM_ASSIST, cmd, type); |
} |
static inline int xen_set_callbacks(const unsigned int event_selector, const void *event_address, const unsigned int failsafe_selector, void *failsafe_address) |
{ |
return hypercall4(XEN_SET_CALLBACKS, event_selector, event_address, failsafe_selector, failsafe_address); |
/trunk/kernel/arch/ia32xen/include/mm/page.h |
---|
76,19 → 76,32 |
\ |
mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \ |
mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \ |
xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF); \ |
ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \ |
} |
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \ |
mmuext_op_t mmu_ext; \ |
\ |
mmu_ext.cmd = MMUEXT_PIN_L1_TABLE; \ |
mmu_ext.mfn = ADDR2PFN(PA2MA(a)); \ |
ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \ |
\ |
mmu_update_t update; \ |
\ |
update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \ |
update.val = PA2MA(a) | 0x0003; \ |
xen_mmu_update(&update, 1, NULL, DOMID_SELF); \ |
update.val = PA2MA(a); \ |
ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \ |
} |
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *) (ptl3))[(i)].frame_address = PA2MA(a) >> 12) |
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) { \ |
mmu_update_t update; \ |
\ |
update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl3))[(i)])); \ |
update.val = PA2MA(a); \ |
ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \ |
} |
#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *) (ptl0), (index_t)(i)) |
#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT |
196,18 → 209,24 |
static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
{ |
pte_t *p = &pt[i]; |
pte_t p = pt[i]; |
p->page_cache_disable = !(flags & PAGE_CACHEABLE); |
p->present = !(flags & PAGE_NOT_PRESENT); |
p->uaccessible = (flags & PAGE_USER) != 0; |
p->writeable = (flags & PAGE_WRITE) != 0; |
p->global = (flags & PAGE_GLOBAL) != 0; |
p.page_cache_disable = !(flags & PAGE_CACHEABLE); |
p.present = !(flags & PAGE_NOT_PRESENT); |
p.uaccessible = (flags & PAGE_USER) != 0; |
p.writeable = (flags & PAGE_WRITE) != 0; |
p.global = (flags & PAGE_GLOBAL) != 0; |
/* |
* Ensure that there is at least one bit set even if the present bit is cleared. |
*/ |
p->soft_valid = true; |
p.soft_valid = true; |
mmu_update_t update; |
update.ptr = PA2MA(KA2PA(&(pt[i]))); |
update.pte = p; |
xen_mmu_update(&update, 1, NULL, DOMID_SELF); |
} |
extern void page_arch_init(void); |