/trunk/kernel/arch/ia32/include/drivers/ega.h |
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36,7 → 36,7 |
#define KERN_ia32_EGA_H |
#define EGA_VIDEORAM 0xb8000 |
#define EGA_BASE 0x3d4 |
#define EGA_BASE ((ioport8_t *)0x3d4) |
#endif |
/trunk/kernel/arch/ia32/include/drivers/i8259.h |
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38,10 → 38,10 |
#include <arch/types.h> |
#include <arch/interrupt.h> |
#define PIC_PIC0PORT1 0x20 |
#define PIC_PIC0PORT2 0x21 |
#define PIC_PIC1PORT1 0xa0 |
#define PIC_PIC1PORT2 0xa1 |
#define PIC_PIC0PORT1 ((ioport8_t *) 0x20) |
#define PIC_PIC0PORT2 ((ioport8_t *) 0x21) |
#define PIC_PIC1PORT1 ((ioport8_t *) 0xa0) |
#define PIC_PIC1PORT2 ((ioport8_t *) 0xa1) |
#define PIC_NEEDICW4 (1<<0) |
#define PIC_ICW1 (1<<4) |
/trunk/kernel/arch/ia32/src/smp/smp.c |
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122,8 → 122,8 |
* Save 0xa to address 0xf of the CMOS RAM. |
* BIOS will not do the POST after the INIT signal. |
*/ |
pio_write_8(0x70, 0xf); |
pio_write_8(0x71, 0xa); |
pio_write_8((ioport8_t *)0x70, 0xf); |
pio_write_8((ioport8_t *)0x71, 0xa); |
pic_disable_irqs(0xffff); |
apic_init(); |
/trunk/kernel/arch/ia32/src/drivers/i8259.c |
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119,8 → 119,8 |
void pic_eoi(void) |
{ |
pio_write_8(0x20, 0x20); |
pio_write_8(0xa0, 0x20); |
pio_write_8((ioport8_t *)0x20, 0x20); |
pio_write_8((ioport8_t *)0xa0, 0x20); |
} |
void pic_spurious(int n __attribute__((unused)), istate_t *istate __attribute__((unused))) |
/trunk/kernel/arch/ia32/src/drivers/i8254.c |
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53,8 → 53,8 |
#include <ddi/irq.h> |
#include <ddi/device.h> |
#define CLK_PORT1 0x40 |
#define CLK_PORT4 0x43 |
#define CLK_PORT1 ((ioport8_t *)0x40) |
#define CLK_PORT4 ((ioport8_t *)0x43) |
#define CLK_CONST 1193180 |
#define MAGIC_NUMBER 1194 |