/trunk/kernel/arch/amd64/src/pm.c |
230,24 → 230,5 |
tr_load(gdtselector(TSS_DES)); |
} |
|
/* Reboot the machine by initiating |
* a triple fault |
*/ |
void arch_reboot(void) |
{ |
preemption_disable(); |
ipl_t ipl = interrupts_disable(); |
|
memsetb(idt, sizeof(idt), 0); |
idtr_load(&idtr); |
|
interrupts_restore(ipl); |
asm volatile ( |
"int $0x03\n" |
"cli\n" |
"hlt\n" |
); |
} |
|
/** @} |
*/ |
/trunk/kernel/arch/ia32/src/ia32.c |
237,5 → 237,12 |
return addr; |
} |
|
void arch_reboot(void) |
{ |
#ifdef CONFIG_PC_KBD |
i8042_cpu_reset((i8042_t *) I8042_BASE); |
#endif |
} |
|
/** @} |
*/ |
/trunk/kernel/arch/ia32/src/pm.c |
232,28 → 232,5 |
gdtr_load(&cpugdtr); |
} |
|
/* Reboot the machine by initiating |
* a triple fault |
*/ |
void arch_reboot(void) |
{ |
preemption_disable(); |
ipl_t ipl = interrupts_disable(); |
|
memsetb(idt, sizeof(idt), 0); |
|
ptr_16_32_t idtr; |
idtr.limit = sizeof(idt); |
idtr.base = (uintptr_t) idt; |
idtr_load(&idtr); |
|
interrupts_restore(ipl); |
asm volatile ( |
"int $0x03\n" |
"cli\n" |
"hlt\n" |
); |
} |
|
/** @} |
*/ |