/trunk/kernel/arch/amd64/include/interrupt.h |
---|
41,17 → 41,17 |
#define IVT_ITEMS IDT_ITEMS |
#define IVT_FIRST 0 |
#define EXC_COUNT 32 |
#define IRQ_COUNT 16 |
#define EXC_COUNT 32 |
#define IRQ_COUNT 16 |
#define IVT_EXCBASE 0 |
#define IVT_IRQBASE (IVT_EXCBASE + EXC_COUNT) |
#define IVT_FREEBASE (IVT_IRQBASE + IRQ_COUNT) |
#define IVT_FREEBASE (IVT_IRQBASE + IRQ_COUNT) |
#define IRQ_CLK 0 |
#define IRQ_KBD 1 |
#define IRQ_PIC1 2 |
#define IRQ_PIC_SPUR 7 |
#define IRQ_PIC_SPUR 7 |
#define IRQ_MOUSE 12 |
/* this one must have four least significant bits set to ones */ |
61,12 → 61,12 |
#error Wrong definition of VECTOR_APIC_SPUR |
#endif |
#define VECTOR_DEBUG 1 |
#define VECTOR_CLK (IVT_IRQBASE + IRQ_CLK) |
#define VECTOR_PIC_SPUR (IVT_IRQBASE + IRQ_PIC_SPUR) |
#define VECTOR_SYSCALL IVT_FREEBASE |
#define VECTOR_DEBUG 1 |
#define VECTOR_CLK (IVT_IRQBASE + IRQ_CLK) |
#define VECTOR_PIC_SPUR (IVT_IRQBASE + IRQ_PIC_SPUR) |
#define VECTOR_SYSCALL IVT_FREEBASE |
#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE + 1) |
#define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) |
#define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) |
/** This is passed to interrupt handlers */ |
typedef struct { |
/trunk/kernel/arch/ia32/include/interrupt.h |
---|
38,21 → 38,21 |
#include <arch/types.h> |
#include <arch/pm.h> |
#define IVT_ITEMS IDT_ITEMS |
#define IVT_FIRST 0 |
#define IVT_ITEMS IDT_ITEMS |
#define IVT_FIRST 0 |
#define EXC_COUNT 32 |
#define IRQ_COUNT 16 |
#define IVT_EXCBASE 0 |
#define IVT_IRQBASE (IVT_EXCBASE + EXC_COUNT) |
#define IVT_EXCBASE 0 |
#define IVT_IRQBASE (IVT_EXCBASE + EXC_COUNT) |
#define IVT_FREEBASE (IVT_IRQBASE + IRQ_COUNT) |
#define IRQ_CLK 0 |
#define IRQ_KBD 1 |
#define IRQ_PIC1 2 |
#define IRQ_CLK 0 |
#define IRQ_KBD 1 |
#define IRQ_PIC1 2 |
#define IRQ_PIC_SPUR 7 |
#define IRQ_MOUSE 12 |
#define IRQ_MOUSE 12 |
/* this one must have four least significant bits set to ones */ |
#define VECTOR_APIC_SPUR (IVT_ITEMS - 1) |
61,12 → 61,12 |
#error Wrong definition of VECTOR_APIC_SPUR |
#endif |
#define VECTOR_DEBUG 1 |
#define VECTOR_CLK (IVT_IRQBASE + IRQ_CLK) |
#define VECTOR_PIC_SPUR (IVT_IRQBASE + IRQ_PIC_SPUR) |
#define VECTOR_SYSCALL IVT_FREEBASE |
#define VECTOR_DEBUG 1 |
#define VECTOR_CLK (IVT_IRQBASE + IRQ_CLK) |
#define VECTOR_PIC_SPUR (IVT_IRQBASE + IRQ_PIC_SPUR) |
#define VECTOR_SYSCALL IVT_FREEBASE |
#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE + 1) |
#define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) |
#define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) |
typedef struct { |
uint32_t eax; |
/trunk/kernel/arch/ia32/include/pm.h |
---|
35,8 → 35,8 |
#ifndef KERN_ia32_PM_H_ |
#define KERN_ia32_PM_H_ |
#define IDT_ITEMS 64 |
#define GDT_ITEMS 7 |
#define IDT_ITEMS 64 |
#define GDT_ITEMS 7 |
#define VESA_INIT_SEGMENT 0x8000 |
63,20 → 63,20 |
#define PL_KERNEL 0 |
#define PL_USER 3 |
#define AR_PRESENT (1<<7) |
#define AR_DATA (2<<3) |
#define AR_CODE (3<<3) |
#define AR_WRITABLE (1<<1) |
#define AR_PRESENT (1 << 7) |
#define AR_DATA (2 << 3) |
#define AR_CODE (3 << 3) |
#define AR_WRITABLE (1 << 1) |
#define AR_INTERRUPT (0xe) |
#define AR_TSS (0x9) |
#define DPL_KERNEL (PL_KERNEL<<5) |
#define DPL_USER (PL_USER<<5) |
#define DPL_KERNEL (PL_KERNEL << 5) |
#define DPL_USER (PL_USER << 5) |
#define TSS_BASIC_SIZE 104 |
#define TSS_IOMAP_SIZE (16*1024+1) /* 16K for bitmap + 1 terminating byte for convenience */ |
#define TSS_IOMAP_SIZE (16 * 1024 + 1) /* 16K for bitmap + 1 terminating byte for convenience */ |
#define IO_PORTS (64*1024) |
#define IO_PORTS (64 * 1024) |
#ifndef __ASM__ |
/trunk/kernel/arch/ia32/src/pm.c |
---|
133,12 → 133,14 |
if (i == VECTOR_SYSCALL) { |
/* |
* The syscall interrupt gate must be calleable from userland. |
* The syscall interrupt gate must be calleable from |
* userland. |
*/ |
d->access |= DPL_USER; |
} |
idt_setoffset(d, ((uintptr_t) interrupt_handlers) + i * interrupt_handler_size); |
idt_setoffset(d, ((uintptr_t) interrupt_handlers) + |
i * interrupt_handler_size); |
} |
} |