/trunk/kernel/arch/sparc64/src/sparc64.c |
---|
136,7 → 136,7 |
void asm_delay_loop(const uint32_t usec) |
{ |
uint64_t stop = tick_read() + (uint64_t) usec * (uint64_t) |
CPU->arch.clock_frequency / 1000000; |
CPU->arch.clock_frequency / 1000000; |
while (tick_read() < stop) |
; |
146,9 → 146,9 |
void userspace(uspace_arg_t *kernel_uarg) |
{ |
switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE |
- (ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT) + STACK_BIAS), |
(uintptr_t) kernel_uarg->uspace_uarg); |
((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE |
- (ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT) + STACK_BIAS), |
(uintptr_t) kernel_uarg->uspace_uarg); |
for (;;) |
; |
/trunk/kernel/arch/sparc64/src/drivers/tick.c |
---|
99,8 → 99,8 |
drift -= CPU->arch.clock_frequency / HZ; |
CPU->missed_clock_ticks++; |
} |
CPU->arch.next_tick_cmpr = tick_read() + (CPU->arch.clock_frequency / |
HZ) - drift; |
CPU->arch.next_tick_cmpr = tick_read() + |
(CPU->arch.clock_frequency / HZ) - drift; |
tick_compare_write(CPU->arch.next_tick_cmpr); |
clock(); |
} |
/trunk/kernel/arch/ia64/src/ia64.c |
---|
82,8 → 82,6 |
} |
void arch_post_mm_init(void) |
{ |
irq_init(INR_COUNT, INR_COUNT); |
/trunk/kernel/arch/ia64/src/drivers/it.c |
---|
113,8 → 113,14 |
itm_write(m); |
srlz_d(); /* propagate changes */ |
/* |
* We are holding a lock which prevents preemption. |
* Release the lock, call clock() and reacquire the lock again. |
*/ |
spinlock_unlock(&irq->lock); |
clock(); |
spinlock_lock(&irq->lock); |
} |
/** @} |
/trunk/kernel/arch/ia32xen/src/ia32xen.c |
---|
162,9 → 162,9 |
if (config.cpu_active == 1) { |
memory_print_map(); |
#ifdef CONFIG_SMP |
#ifdef CONFIG_SMP |
acpi_init(); |
#endif /* CONFIG_SMP */ |
#endif /* CONFIG_SMP */ |
} |
} |
/trunk/kernel/arch/ia32xen/src/smp/apic.c |
---|
151,7 → 151,7 |
* Ensure that io_apic has unique ID. |
*/ |
idreg.value = io_apic_read(IOAPICID); |
if ((1<<idreg.apic_id) & apic_id_mask) { /* see if IO APIC ID is used already */ |
if ((1 << idreg.apic_id) & apic_id_mask) { /* see if IO APIC ID is used already */ |
for (i = 0; i < APIC_ID_COUNT; i++) { |
if (!((1<<i) & apic_id_mask)) { |
idreg.apic_id = i; |
302,7 → 302,7 |
/* |
* If this is not 82489DX-based l_apic we must send two STARTUP IPI's. |
*/ |
for (i = 0; i<2; i++) { |
for (i = 0; i < 2; i++) { |
icr.lo = l_apic[ICRlo]; |
icr.delmod = DELMOD_STARTUP; |
icr.destmod = DESTMOD_PHYS; |
401,8 → 401,8 |
/* Program Logical Destination Register. */ |
ldr.value = l_apic[LDR]; |
if (CPU->id < sizeof(CPU->id)*8) /* size in bits */ |
ldr.id = (1<<CPU->id); |
if (CPU->id < sizeof(CPU->id) * 8) /* size in bits */ |
ldr.id = (1 << CPU->id); |
l_apic[LDR] = ldr.value; |
/* Program Destination Format Register for Flat mode. */ |
507,8 → 507,8 |
if (flags & LOPRI) |
dlvr = DELMOD_LOWPRI; |
reg.lo = io_apic_read(IOREDTBL + pin*2); |
reg.hi = io_apic_read(IOREDTBL + pin*2 + 1); |
reg.lo = io_apic_read(IOREDTBL + pin * 2); |
reg.hi = io_apic_read(IOREDTBL + pin * 2 + 1); |
reg.dest = dest; |
reg.destmod = DESTMOD_LOGIC; |
517,8 → 517,8 |
reg.delmod = dlvr; |
reg.intvec = v; |
io_apic_write(IOREDTBL + pin*2, reg.lo); |
io_apic_write(IOREDTBL + pin*2 + 1, reg.hi); |
io_apic_write(IOREDTBL + pin * 2, reg.lo); |
io_apic_write(IOREDTBL + pin * 2 + 1, reg.hi); |
} |
/** Mask IRQs in IO APIC. |
539,7 → 539,7 |
*/ |
pin = smp_irq_to_pin(i); |
if (pin != -1) { |
reg.lo = io_apic_read(IOREDTBL + pin*2); |
reg.lo = io_apic_read(IOREDTBL + pin * 2); |
reg.masked = true; |
io_apic_write(IOREDTBL + pin*2, reg.lo); |
} |
566,7 → 566,7 |
*/ |
pin = smp_irq_to_pin(i); |
if (pin != -1) { |
reg.lo = io_apic_read(IOREDTBL + pin*2); |
reg.lo = io_apic_read(IOREDTBL + pin * 2); |
reg.masked = false; |
io_apic_write(IOREDTBL + pin*2, reg.lo); |
} |
/trunk/kernel/arch/mips32/src/interrupt.c |
---|
113,7 → 113,14 |
} |
nextcount = cp0_count_read() + cp0_compare_value - drift; |
cp0_compare_write(nextcount); |
/* |
* We are holding a lock which prevents preemption. |
* Release the lock, call clock() and reacquire the lock again. |
*/ |
spinlock_unlock(&irq->lock); |
clock(); |
spinlock_lock(&irq->lock); |
if (virtual_timer_fnc != NULL) |
virtual_timer_fnc(); |
/trunk/kernel/arch/ia32/src/ia32.c |
---|
118,9 → 118,9 |
if (config.cpu_active == 1) { |
memory_print_map(); |
#ifdef CONFIG_SMP |
#ifdef CONFIG_SMP |
acpi_init(); |
#endif /* CONFIG_SMP */ |
#endif /* CONFIG_SMP */ |
} |
} |
/trunk/kernel/arch/ia32/src/smp/smp.c |
---|
112,15 → 112,15 |
/* |
* Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot() |
*/ |
*((uint16_t *) (PA2KA(0x467+0))) = ((uintptr_t) ap_boot) >> 4; /* segment */ |
*((uint16_t *) (PA2KA(0x467+2))) = 0; /* offset */ |
*((uint16_t *) (PA2KA(0x467 + 0))) = ((uintptr_t) ap_boot) >> 4; /* segment */ |
*((uint16_t *) (PA2KA(0x467 + 2))) = 0; /* offset */ |
/* |
* Save 0xa to address 0xf of the CMOS RAM. |
* BIOS will not do the POST after the INIT signal. |
*/ |
outb(0x70,0xf); |
outb(0x71,0xa); |
outb(0x70, 0xf); |
outb(0x71, 0xa); |
pic_disable_irqs(0xffff); |
apic_init(); |
/trunk/kernel/arch/ia32/src/interrupt.c |
---|
140,13 → 140,12 |
static void simd_fp_exception(int n, istate_t *istate) |
{ |
uint32_t mxcsr; |
asm |
( |
asm ( |
"stmxcsr %0;\n" |
:"=m"(mxcsr) |
); |
fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx", |
(unative_t)mxcsr); |
(unative_t)mxcsr); |
decode_istate(istate); |
printf("MXCSR: %#zx\n",(unative_t)(mxcsr)); |
/trunk/kernel/arch/ia32/src/drivers/i8259.c |
---|
86,7 → 86,7 |
eoi_function = pic_eoi; |
pic_disable_irqs(0xffff); /* disable all irq's */ |
pic_enable_irqs(1<<IRQ_PIC1); /* but enable pic1 */ |
pic_enable_irqs(1 << IRQ_PIC1); /* but enable pic1 */ |
} |
void pic_enable_irqs(uint16_t irqmask) |
119,8 → 119,8 |
void pic_eoi(void) |
{ |
outb(0x20,0x20); |
outb(0xa0,0x20); |
outb(0x20, 0x20); |
outb(0xa0, 0x20); |
} |
void pic_spurious(int n, istate_t *istate) |
/trunk/kernel/arch/ia32/src/drivers/i8254.c |
---|
68,7 → 68,15 |
static void i8254_irq_handler(irq_t *irq, void *arg, ...) |
{ |
/* |
* This IRQ is responsible for kernel preemption. |
* Nevertheless, we are now holding a spinlock which prevents |
* preemption. For this particular IRQ, we don't need the |
* lock. We just release it, call clock() and then reacquire it again. |
*/ |
spinlock_unlock(&irq->lock); |
clock(); |
spinlock_lock(&irq->lock); |
} |
void i8254_init(void) |
136,7 → 144,9 |
o2 = inb(CLK_PORT1); |
o2 |= inb(CLK_PORT1) << 8; |
CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0); |
CPU->delay_loop_const = |
((MAGIC_NUMBER * LOOPS) / 1000) / ((t1 - t2) - (o1 - o2)) + |
(((MAGIC_NUMBER * LOOPS) / 1000) % ((t1 - t2) - (o1 - o2)) ? 1 : 0); |
clk1 = get_cycle(); |
delay(1 << SHIFT); |