/trunk/kernel/arch/sparc64/src/mm/tsb.c |
---|
98,7 → 98,7 |
tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT; |
tsb->data.value = 0; |
tsb->data.size = PAGESIZE_8K; |
tsb->data.pfn = t->frame >> PAGE_WIDTH; |
tsb->data.pfn = t->frame >> FRAME_WIDTH; |
tsb->data.cp = t->c; |
#ifdef CONFIG_VIRT_IDX_CACHE |
tsb->data.cv = t->c; |
140,7 → 140,7 |
tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT; |
tsb->data.value = 0; |
tsb->data.size = PAGESIZE_8K; |
tsb->data.pfn = t->frame >> PAGE_WIDTH; |
tsb->data.pfn = t->frame >> FRAME_WIDTH; |
tsb->data.cp = t->c; |
#ifdef CONFIG_VIRT_IDX_CACHE |
tsb->data.cv = t->c; |
/trunk/kernel/arch/sparc64/src/start.S |
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64,13 → 64,13 |
.global kernel_image_start |
kernel_image_start: |
mov BSP_FLAG, %l0 |
and %o0, %l0, %l7 ! l7 <= bootstrap processor? |
andn %o0, %l0, %l6 ! l6 <= start of physical memory |
and %o0, %l0, %l7 ! l7 <= bootstrap processor? |
andn %o0, %l0, %l6 ! l6 <= start of physical memory |
! Get bits 40:13 of physmem_base. |
srlx %l6, 13, %l5 |
sllx %l5, 13 + (63 - 40), %l5 |
srlx %l5, 63 - 40, %l5 ! l5 <= physmem_base[40:13] |
srlx %l5, 63 - 40, %l5 ! l5 <= physmem_base[40:13] |
/* |
* Setup basic runtime environment. |