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Compare Revisions

• This comparison shows the changes necessary to convert path

  → /trunk/kernel/arch/ @ 1879

  → /trunk/kernel/arch/ @ 1880

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

Ignore whitespace Rev 1879 → Rev 1880

/trunk/kernel/arch/sparc64/_link.ld.in
43,8 → 43,7
}
/DISCARD/ : {
*(.comment);
*(.note*);
*(*);
}
}

/trunk/kernel/arch/sparc64/include/asm.h
222,7 → 222,7
{
uintptr_t v;
__asm__ volatile ("and %%sp, %1, %0\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
__asm__ volatile ("andn %%sp, %1, %0\n" : "=r" (v) : "r" (STACK_SIZE-1));
return v;
}

/trunk/kernel/arch/sparc64/include/trap/exception.h
50,6 → 50,8
#include <typedefs.h>
extern void dump_istate(istate_t *istate);
extern void instruction_access_exception(int n, istate_t *istate);
extern void instruction_access_error(int n, istate_t *istate);
extern void illegal_instruction(int n, istate_t *istate);

/trunk/kernel/arch/sparc64/src/asm.S
227,23 → 227,17
.macro WRITE_ALTERNATE_REGISTER reg, bit
save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
rdpr %pstate, %l0
wrpr %l0, \bit, %pstate
mov %i0, \reg
wrpr %l0, 0, %pstate
ret
restore
wrpr %g0, (\bit | PSTATE_PRIV_BIT), %pstate
mov %o0, \reg
retl
wrpr %g0, PSTATE_PRIV_BIT, %pstate
.endm
.macro READ_ALTERNATE_REGISTER reg, bit
save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
rdpr %pstate, %l0
wrpr %l0, \bit, %pstate
mov \reg, %i0
wrpr %l0, 0, %pstate
ret
restore
wrpr %g0, (\bit | PSTATE_PRIV_BIT), %pstate
mov \reg, %o0
retl
wrpr %g0, PSTATE_PRIV_BIT, %pstate
.endm
.global write_to_ag_g6
305,3 → 299,4
wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate
done ! jump to userspace

/trunk/kernel/arch/sparc64/src/console.c
53,6 → 53,7
#include <proc/thread.h>
#include <arch/mm/tlb.h>
#include <arch/boot/boot.h>
#include <arch.h>
#define KEYBOARD_POLL_PAUSE 50000 /* 50ms */
79,6 → 80,8
*/
void kkbdpoll(void *arg)
{
thread_detach(THREAD);
if (!bootinfo.keyboard.addr)
return;

/trunk/kernel/arch/sparc64/src/trap/exception.c
39,12 → 39,22
#include <arch/asm.h>
#include <debug.h>
#include <typedefs.h>
#include <symtab.h>
#include <print.h>
void dump_istate(istate_t *istate)
{
printf("TSTATE=%#llx\n", istate->tstate);
printf("TPC=%#llx (%s)\n", istate->tpc, get_symtab_entry(istate->tpc));
printf("TNPC=%#llx (%s)\n", istate->tnpc, get_symtab_entry(istate->tnpc));
}
/** Handle instruction_access_exception. (0x8) */
void instruction_access_exception(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
panic("%s at %p.\n", __FUNCTION__, istate->tpc);
dump_istate(istate);
panic("%s\n", __FUNCTION__);
}
/** Handle instruction_access_error. (0xa) */
51,7 → 61,8
void instruction_access_error(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
panic("%s at %p.\n", __FUNCTION__, istate->tpc);
dump_istate(istate);
panic("%s\n", __FUNCTION__);
}
/** Handle illegal_instruction. (0x10) */
58,7 → 69,8
void illegal_instruction(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
panic("%s at %p.\n", __FUNCTION__, istate->tpc);
dump_istate(istate);
panic("%s\n", __FUNCTION__);
}
/** Handle privileged_opcode. (0x11) */
65,7 → 77,8
void privileged_opcode(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
panic("%s at %p.\n", __FUNCTION__, istate->tpc);
dump_istate(istate);
panic("%s\n", __FUNCTION__);
}
/** Handle division_by_zero. (0x28) */
72,7 → 85,8
void division_by_zero(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
panic("%s at %p.\n", __FUNCTION__, istate->tpc);
dump_istate(istate);
panic("%s\n", __FUNCTION__);
}
/** Handle data_access_exception. (0x30) */
79,7 → 93,8
void data_access_exception(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
panic("%s from %p.\n", __FUNCTION__, istate->tpc);
dump_istate(istate);
panic("%s\n", __FUNCTION__);
}
/** Handle data_access_error. (0x32) */
86,7 → 101,8
void data_access_error(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
panic("%s from %p.\n", __FUNCTION__, istate->tpc);
dump_istate(istate);
panic("%s\n", __FUNCTION__);
}
/** Handle mem_address_not_aligned. (0x34) */
93,7 → 109,8
void mem_address_not_aligned(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
panic("%s from %p.\n", __FUNCTION__, istate->tpc);
dump_istate(istate);
panic("%s\n", __FUNCTION__);
}
/** Handle privileged_action. (0x37) */
100,7 → 117,8
void privileged_action(int n, istate_t *istate)
{
fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
panic("%s at %p.\n", __FUNCTION__, istate->tpc);
dump_istate(istate);
panic("%s\n", __FUNCTION__);
}
/** @}

/trunk/kernel/arch/sparc64/src/trap/trap_table.S
650,7 → 650,6
.if NOT(\is_syscall)
ba 1f
nop
0:
save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
781,7 → 780,7
/*
* OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.
* The CWP has already been restored to the value it had prior to the SAVE
* The CWP has already been restored to the value it had after the SAVE
* at the beginning of this function.
*/
0:

/trunk/kernel/arch/sparc64/src/mm/tlb.c
47,9 → 47,9
#include <typedefs.h>
#include <config.h>
#include <arch/trap/trap.h>
#include <arch/trap/exception.h>
#include <panic.h>
#include <arch/asm.h>
#include <symtab.h>
static void dtlb_pte_copy(pte_t *t, bool ro);
static void itlb_pte_copy(pte_t *t);
307,10 → 307,8
void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str)
{
char *tpc_str = get_symtab_entry(istate->tpc);
fault_if_from_uspace(istate, "%s\n", str);
printf("TPC=%p, (%s)\n", istate->tpc, tpc_str);
dump_istate(istate);
panic("%s\n", str);
}
317,13 → 315,12
void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str)
{
uintptr_t va;
char *tpc_str = get_symtab_entry(istate->tpc);
va = tag.vpn << PAGE_WIDTH;
fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context);
dump_istate(istate);
printf("Faulting page: %p, ASID=%d\n", va, tag.context);
printf("TPC=%p, (%s)\n", istate->tpc, tpc_str);
panic("%s\n", str);
}
330,13 → 327,12
void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str)
{
uintptr_t va;
char *tpc_str = get_symtab_entry(istate->tpc);
va = tag.vpn << PAGE_WIDTH;
fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context);
printf("Faulting page: %p, ASID=%d\n", va, tag.context);
printf("TPC=%p, (%s)\n", istate->tpc, tpc_str);
dump_istate(istate);
panic("%s\n", str);
}

/trunk/kernel/arch/sparc64/src/start.S
76,15 → 76,15
*/
mov %o1, %o2
mov %o0, %o1
set bootinfo, %o0
sethi %hi(bootinfo), %o0
call memcpy
nop
or %o0, %lo(bootinfo), %o0
/*
* Switch to kernel trap table.
*/
set trap_table, %g1
wrpr %g1, 0, %tba
sethi %hi(trap_table), %g1
wrpr %g1, %lo(trap_table), %tba
/*
* Take over the DMMU by installing global locked
120,7 → 120,7
set PAGESIZE_4M, %r2; \
sllx %r2, TTE_SIZE_SHIFT, %r2; \
or %r1, %r2, %r1; \
set 1, %r2; \
mov 1, %r2; \
sllx %r2, TTE_V_SHIFT, %r2; \
or %r1, %r2, %r1;
172,7 → 172,7
! write ITLB tag of context 1
SET_TLB_TAG(g1, MEM_CONTEXT_TEMP)
set VA_DMMU_TAG_ACCESS, %g2
mov VA_DMMU_TAG_ACCESS, %g2
stxa %g1, [%g2] ASI_IMMU
flush %g5
182,7 → 182,7
flush %g5
! switch to context 1
set MEM_CONTEXT_TEMP, %g1
mov MEM_CONTEXT_TEMP, %g1
stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!!
flush %g5
193,7 → 193,7
! write ITLB tag of context 0
SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
set VA_DMMU_TAG_ACCESS, %g2
mov VA_DMMU_TAG_ACCESS, %g2
stxa %g1, [%g2] ASI_IMMU
flush %g5
210,7 → 210,7
wrpr %g0, 1, %tl
! set context 1 in the primary context register
set MEM_CONTEXT_TEMP, %g1
mov MEM_CONTEXT_TEMP, %g1
stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!!
flush %g5