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Regard whitespace Rev 2467 → Rev 2468

/trunk/boot/arch/arm32/loader/mm.h
1,5 → 1,6
/*
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* Copyright (c) 2007 Pavel Jancik
* Copyright (c) 2007 Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
33,9 → 34,10
/** @file
* @brief Memory management used while booting the kernel.
*
* So called "section" paging is used while booting the kernel. The term "section"
* comes from the ARM architecture specification and stands for the following:
* one-level paging, 1MB sized pages, 4096 entries in the page table.
* So called "section" paging is used while booting the kernel. The term
* "section" comes from the ARM architecture specification and stands for the
* following: one-level paging, 1MB sized pages, 4096 entries in the page
* table.
*/
 
 
54,7 → 56,9
/** Frame size. */
#define FRAME_SIZE (1 << FRAME_WIDTH)
 
/** Page size in 2-level paging which is switched on later after the kernel initialization. */
/** Page size in 2-level paging which is switched on later after the kernel
* initialization.
*/
#define KERNEL_PAGE_SIZE (1 << 12)
 
 
88,8 → 92,8
#ifndef __ASM__
 
 
/** Page table level 0 entry - "section" format is used (one-level paging, 1MB sized
* pages). Used only while booting the kernel.
/** Page table level 0 entry - "section" format is used (one-level paging, 1MB
* sized pages). Used only while booting the kernel.
*/
typedef struct {
unsigned descriptor_type : 2;
104,7 → 108,9
} __attribute__ ((packed)) pte_level0_section_t;
 
 
/** Page table that holds 1:1 virtual to physical mapping used while booting the kernel. */
/** Page table that holds 1:1 virtual to physical mapping used while booting the
* kernel.
*/
extern pte_level0_section_t page_table[PTL0_ENTRIES];
 
extern void mmu_start(void);
117,18 → 123,18
* 0b01 - behave as a client (user) of a domain
*/
asm volatile (
// behave as a client of domains
/* behave as a client of domains */
"ldr r0, =0x55555555 \n"
"mcr p15, 0, r0, c3, c0, 0 \n"
 
// current settings
/* current settings */
"mrc p15, 0, r0, c1, c0, 0 \n"
 
// mask to enable paging
/* mask to enable paging */
"ldr r1, =0x00000001 \n"
"orr r0, r0, r1 \n"
 
// store settings
/* store settings */
"mcr p15, 0, r0, c1, c0, 0 \n"
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