/trunk/boot/arch/arm32/loader/mm.h |
---|
1,5 → 1,6 |
/* |
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
* Copyright (c) 2007 Pavel Jancik |
* Copyright (c) 2007 Michal Kebrt |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
33,9 → 34,10 |
/** @file |
* @brief Memory management used while booting the kernel. |
* |
* So called "section" paging is used while booting the kernel. The term "section" |
* comes from the ARM architecture specification and stands for the following: |
* one-level paging, 1MB sized pages, 4096 entries in the page table. |
* So called "section" paging is used while booting the kernel. The term |
* "section" comes from the ARM architecture specification and stands for the |
* following: one-level paging, 1MB sized pages, 4096 entries in the page |
* table. |
*/ |
54,7 → 56,9 |
/** Frame size. */ |
#define FRAME_SIZE (1 << FRAME_WIDTH) |
/** Page size in 2-level paging which is switched on later after the kernel initialization. */ |
/** Page size in 2-level paging which is switched on later after the kernel |
* initialization. |
*/ |
#define KERNEL_PAGE_SIZE (1 << 12) |
88,8 → 92,8 |
#ifndef __ASM__ |
/** Page table level 0 entry - "section" format is used (one-level paging, 1MB sized |
* pages). Used only while booting the kernel. |
/** Page table level 0 entry - "section" format is used (one-level paging, 1MB |
* sized pages). Used only while booting the kernel. |
*/ |
typedef struct { |
unsigned descriptor_type : 2; |
104,7 → 108,9 |
} __attribute__ ((packed)) pte_level0_section_t; |
/** Page table that holds 1:1 virtual to physical mapping used while booting the kernel. */ |
/** Page table that holds 1:1 virtual to physical mapping used while booting the |
* kernel. |
*/ |
extern pte_level0_section_t page_table[PTL0_ENTRIES]; |
extern void mmu_start(void); |
117,18 → 123,18 |
* 0b01 - behave as a client (user) of a domain |
*/ |
asm volatile ( |
// behave as a client of domains |
/* behave as a client of domains */ |
"ldr r0, =0x55555555 \n" |
"mcr p15, 0, r0, c3, c0, 0 \n" |
// current settings |
/* current settings */ |
"mrc p15, 0, r0, c1, c0, 0 \n" |
// mask to enable paging |
/* mask to enable paging */ |
"ldr r1, =0x00000001 \n" |
"orr r0, r0, r1 \n" |
// store settings |
/* store settings */ |
"mcr p15, 0, r0, c1, c0, 0 \n" |
: |
: |
/trunk/boot/arch/arm32/loader/asm.h |
---|
62,12 → 62,11 |
* @param bootinfo Structure holding information about loaded tasks. |
* @param bootinfo_size Size of the bootinfo structure. |
*/ |
extern void jump_to_kernel(void *entry, void *bootinfo, unsigned int bootinfo_size) __attribute__((noreturn)); |
extern void jump_to_kernel(void *entry, void *bootinfo, |
unsigned int bootinfo_size) __attribute__((noreturn)); |
#endif |
/** @} |
*/ |
/trunk/boot/arch/arm32/loader/main.h |
---|
68,7 → 68,6 |
} bootinfo_t; |
extern void bootstrap(void); |
#endif |
/trunk/boot/arch/arm32/loader/mm.c |
---|
46,9 → 46,11 |
* @param pte Section entry to initialize. |
* @param frame First frame in the section (frame number). |
* |
* @note If frame is not 1MB aligned, first lower 1MB aligned frame will be used. |
* @note If frame is not 1MB aligned, first lower 1MB aligned frame will be |
* used. |
*/ |
static void init_pte_level0_section(pte_level0_section_t* pte, unsigned int frame) |
static void init_pte_level0_section(pte_level0_section_t* pte, |
unsigned int frame) |
{ |
pte->descriptor_type = PTE_DESCRIPTOR_SECTION; |
pte->bufferable = 0; |
61,7 → 63,6 |
pte->section_base_addr = frame; |
} |
/** Initializes page table used while booting the kernel. */ |
static void init_page_table(void) |
{ |
68,19 → 69,20 |
int i; |
const unsigned int first_kernel_page = ADDR2PFN(PA2KA(0)); |
// create 1:1 virtual-physical mapping (in lower 2GB) |
/* Create 1:1 virtual-physical mapping (in lower 2GB). */ |
for (i = 0; i < first_kernel_page; i++) { |
init_pte_level0_section(&page_table[i], i); |
} |
// create 1:1 virtual-physical mapping in kernel space (upper 2GB), |
// physical addresses start from 0 |
/* |
* Create 1:1 virtual-physical mapping in kernel space (upper 2GB), |
* physical addresses start from 0. |
*/ |
for (i = first_kernel_page; i < PTL0_ENTRIES; i++) { |
init_pte_level0_section(&page_table[i], i - first_kernel_page); |
} |
} |
/** Starts the MMU - initializes page table and enables paging. */ |
void mmu_start() { |
init_page_table(); |
88,7 → 90,6 |
enable_paging(); |
} |
/** @} |
*/ |
/trunk/boot/arch/arm32/loader/types.h |
---|
57,4 → 57,3 |
/** @} |
*/ |
/trunk/boot/arch/mips32/loader/regname.h |
---|
26,8 → 26,8 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __mips32_REGNAME_H_ |
#define __mips32_REGNAME_H_ |
#ifndef BOOT_mips32_REGNAME_H_ |
#define BOOT_mips32_REGNAME_H_ |
#define zero 0 |
#define at 1 |
85,5 → 85,4 |
#define depc 24 |
#define eepc 30 |
#endif /* _REGNAME_H_ */ |
/trunk/boot/arch/mips32/loader/asm.h |
---|
26,8 → 26,8 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __ASM_H__ |
#define __ASM_H__ |
#ifndef BOOT_mips32_ASM_H_ |
#define BOOT_mips32_ASM_H_ |
#define PAGE_SIZE 16384 |
#define PAGE_WIDTH 14 |
/trunk/boot/arch/mips32/loader/main.h |
---|
26,8 → 26,8 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __MAIN_H__ |
#define __MAIN_H__ |
#ifndef BOOT_mips32_MAIN_H_ |
#define BOOT_mips32_MAIN_H_ |
/** Align to the nearest higher address. |
* |
/trunk/boot/arch/mips32/loader/types.h |
---|
26,8 → 26,8 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef TYPES_H__ |
#define TYPES_H__ |
#ifndef BOOT_mips32_TYPES_H_ |
#define BOOT_mips32_TYPES_H_ |
#include <gentypes.h> |
/trunk/boot/arch/mips32/loader/msim.h |
---|
26,8 → 26,8 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __MSIM_H__ |
#define __MSIM_H__ |
#ifndef BOOT_mips32_MSIM_H_ |
#define BOOT_mips32_MSIM_H_ |
extern void init(void); |
extern void halt(void); |