WebSVN – HelenOS – Path Comparison – / – /trunk/ Rev 3672 and /trunk Rev 3671

Ignore whitespace Rev 3672 → Rev 3671

/trunk/uspace/srv/console/console.c
327,6 → 327,7
break;
case KBD_PUSHCHAR:
/* got key from keyboard driver */

retval = 0;
c = IPC_GET_ARG1(call);
/* switch to another virtual console */

 /trunk/uspace/srv/kbd/arch/sparc64/src/kbd.c
 ,7 → 35,6
  */
 #include <arch/kbd.h>
-#include <arch/sgcn.h>
 #include <ipc/ipc.h>
 #include <sysinfo.h>
 #include <kbd.h>
 ,7 → 78,6
 #define KBD_Z8530   1
 #define KBD_NS16550 2
-#define KBD_SGCN    3
 int kbd_arch_init(void)
 {
 ,9 → 91,6
         ns16550_cmds[0].addr = (void *) sysinfo_value("kbd.address.virtual");
         ipc_register_irq(sysinfo_value("kbd.inr"), sysinfo_value("kbd.devno"), 0, &ns16550_kbd);
         break;
-    case KBD_SGCN:
-        sgcn_init();
-        break;
     default:
         break;
     }
 ,11 → 100,6
 /** Process keyboard events */
 int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
 {
-    if (sysinfo_value("kbd.type") == KBD_SGCN) {
-        sgcn_key_pressed();
-        return 1;
-    }
     int scan_code = IPC_GET_ARG1(*call);
     if (scan_code == KBD_ALL_KEYS_UP)

 /trunk/uspace/srv/kbd/arch/mips32/src/kbd.c
 ,7 → 34,6
 /** @file
  */
 #include <arch/kbd.h>
-#include <genarch/nofb.h>
 #include <ipc/ipc.h>
 #include <sysinfo.h>
 #include <kbd.h>
 ,6 → 99,146
 }
 */
+static int kbd_arch_process_no_fb(keybuffer_t *keybuffer, int scan_code)
+{
+    static unsigned long buf = 0;
+    static int count = 0;
+    /* Please preserve this code (it can be used to determine scancodes)
+    keybuffer_push(keybuffer, to_hex((scan_code>>4)&0xf));
+    keybuffer_push(keybuffer, to_hex(scan_code&0xf));
+    keybuffer_push(keybuffer, ' ');
+    keybuffer_push(keybuffer, ' ');
+    return 1;
+    */
+    if(scan_code == 0x7e) {
+        switch (buf) {
+        case MSIM_KEY_F5:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 5);
+            buf = count = 0;
+            return 1;
+        case MSIM_KEY_F6:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 6);
+            buf = count = 0;
+            return 1;
+        case MSIM_KEY_F7:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 7);
+            buf = count = 0;
+            return 1;
+        case MSIM_KEY_F8:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 8);
+            buf = count = 0;
+            return 1;
+        case MSIM_KEY_F9:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 9);
+            buf = count = 0;
+            return 1;
+        case MSIM_KEY_F10:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 10);
+            buf = count = 0;
+            return 1;
+        case MSIM_KEY_F11:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 11);
+            buf = count = 0;
+            return 1;
+        case MSIM_KEY_F12:
+            keybuffer_push(keybuffer,FUNCTION_KEYS | 12);
+            buf = count = 0;
+            return 1;
+        default:
+            keybuffer_push(keybuffer, buf & 0xff);
+            keybuffer_push(keybuffer, (buf >> 8) &0xff);
+            keybuffer_push(keybuffer, (buf >> 16) &0xff);
+            keybuffer_push(keybuffer, (buf >> 24) &0xff);
+            keybuffer_push(keybuffer, scan_code);
+            buf = count = 0;
+            return 1;
+        }
+    }
+    buf |= ((unsigned long) scan_code)<<(8*(count++));
+    if((buf & 0xff) != (MSIM_KEY_F1 & 0xff)) {
+        keybuffer_push(keybuffer, buf);
+        buf = count = 0;
+        return 1;
+    }
+    if (count <= 1)
+        return 1;
+    if ((buf & 0xffff) != (MSIM_KEY_F1 & 0xffff)
+        && (buf & 0xffff) != (MSIM_KEY_F5 & 0xffff) ) {
+        keybuffer_push(keybuffer, buf & 0xff);
+        keybuffer_push(keybuffer, (buf >> 8) &0xff);
+        buf = count = 0;
+        return 1;
+    }
+    if (count <= 2)
+        return 1;
+    switch (buf) {
+    case MSIM_KEY_F1:
+        keybuffer_push(keybuffer,FUNCTION_KEYS | 1);
+        buf = count = 0;
+        return 1;
+    case MSIM_KEY_F2:
+        keybuffer_push(keybuffer,FUNCTION_KEYS | 2);
+        buf = count = 0;
+        return 1;
+    case MSIM_KEY_F3:
+        keybuffer_push(keybuffer,FUNCTION_KEYS | 3);
+        buf = count = 0;
+        return 1;
+    case MSIM_KEY_F4:
+        keybuffer_push(keybuffer,FUNCTION_KEYS | 4);
+        buf = count = 0;
+        return 1;
+    }
+    if((buf & 0xffffff) != (MSIM_KEY_F5 & 0xffffff)
+        && (buf & 0xffffff) != (MSIM_KEY_F9 & 0xffffff)) {
+        keybuffer_push(keybuffer, buf & 0xff);
+        keybuffer_push(keybuffer, (buf >> 8) & 0xff);
+        keybuffer_push(keybuffer, (buf >> 16) & 0xff);
+        buf=count=0;
+        return 1;
+    }
+    if (count <= 3)
+        return 1;
+    switch (buf) {
+    case MSIM_KEY_F5:
+    case MSIM_KEY_F6:
+    case MSIM_KEY_F7:
+    case MSIM_KEY_F8:
+    case MSIM_KEY_F9:
+    case MSIM_KEY_F10:
+    case MSIM_KEY_F11:
+    case MSIM_KEY_F12:
+        return 1;
+    default:
+        keybuffer_push(keybuffer, buf & 0xff);
+        keybuffer_push(keybuffer, (buf >> 8) &0xff);
+        keybuffer_push(keybuffer, (buf >> 16) &0xff);
+        keybuffer_push(keybuffer, (buf >> 24) &0xff);
+        buf = count = 0;
+        return 1;
+    }
+    return 1;
+}
 static int kbd_arch_process_fb(keybuffer_t *keybuffer, int scan_code)
 {
     static unsigned long buf = 0;
 ,7 → 371,7
     if (fb_fb)
         return kbd_arch_process_fb(keybuffer, scan_code);
-    return kbd_process_no_fb(keybuffer, scan_code);
+    return kbd_arch_process_no_fb(keybuffer, scan_code);
 }
 /** @}
 */

 /trunk/uspace/srv/kbd/Makefile
 ,21 → 78,16
 endif
 ifeq ($(ARCH), sparc64)
     ARCH_SOURCES += \
-        arch/$(ARCH)/src/scanc.c \
-        arch/$(ARCH)/src/sgcn.c
+        arch/$(ARCH)/src/scanc.c
     GENARCH_SOURCES = \
-        genarch/src/kbd.c \
-        genarch/src/nofb.c
+        genarch/src/kbd.c
 endif
 ifeq ($(ARCH), arm32)
     ARCH_SOURCES += \
         arch/$(ARCH)/src/kbd_gxemul.c
 endif
-ifeq ($(ARCH), mips32)
-    GENARCH_SOURCES += \
-        genarch/src/nofb.c
-endif
 GENERIC_OBJECTS := $(addsuffix .o,$(basename $(GENERIC_SOURCES)))
 ARCH_OBJECTS := $(addsuffix .o,$(basename $(ARCH_SOURCES)))
 GENARCH_OBJECTS := $(addsuffix .o,$(basename $(GENARCH_SOURCES)))

 /trunk/uspace/srv/fb/Makefile
 ,15 → 65,9
     CFLAGS += -DEGA_ENABLED
 endif
 ifeq ($(ARCH), mips32)
-    SOURCES += msim.c \
-                   serial_console.c
+    SOURCES += msim.c
     CFLAGS += -DMSIM_ENABLED -DFB_INVERT_ENDIAN
 endif
-ifeq ($(ARCH), sparc64)
-    SOURCES += sgcn.c \
-               serial_console.c
-    CFLAGS += -DSGCN_ENABLED
-endif
 CFLAGS += -D$(ARCH)

 /trunk/uspace/srv/fb/msim.c
 ,7 → 49,6
 #include <align.h>
 #include <ddi.h>
-#include "serial_console.h"
 #include "msim.h"
 #define WIDTH 80
 ,6 → 66,57
     *virt_addr = c;
 }
+static void msim_puts(char *str)
+{
+    while (*str)
+        *virt_addr = *(str++);
+}
+static void msim_clrscr(void)
+{
+    msim_puts("\033[2J");
+}
+static void msim_goto(const unsigned int row, const unsigned int col)
+{
+    if ((row > HEIGHT) || (col > WIDTH))
+        return;
+    char control[MAX_CONTROL];
+    snprintf(control, MAX_CONTROL, "\033[%u;%uf", row + 1, col + 1);
+    msim_puts(control);
+}
+static void msim_set_style(const unsigned int mode)
+{
+    char control[MAX_CONTROL];
+    snprintf(control, MAX_CONTROL, "\033[%um", mode);
+    msim_puts(control);
+}
+static void msim_cursor_disable(void)
+{
+    msim_puts("\033[?25l");
+}
+static void msim_cursor_enable(void)
+{
+    msim_puts("\033[?25h");
+}
+static void msim_scroll(int i)
+{
+    if (i > 0) {
+        msim_goto(HEIGHT - 1, 0);
+        while (i--)
+            msim_puts("\033D");
+    } else if (i < 0) {
+        msim_goto(0, 0);
+        while (i++)
+            msim_puts("\033M");
+    }
+}
 static void msim_client_connection(ipc_callid_t iid, ipc_call_t *icall)
 {
     int retval;
 ,9 → 141,9
     /* Clear the terminal, set scrolling region
        to 0 - 25 lines */
-    serial_clrscr();
-    serial_goto(0, 0);
-    serial_puts("\033[0;25r");
+    msim_clrscr();
+    msim_goto(0, 0);
+    msim_puts("\033[0;25r");
     while (true) {
         callid = async_get_call(&call);
 ,7 → 157,7
             newrow = IPC_GET_ARG2(call);
             newcol = IPC_GET_ARG3(call);
             if ((lastcol != newcol) || (lastrow != newrow))
-                serial_goto(newrow, newcol);
+                msim_goto(newrow, newcol);
             lastcol = newcol + 1;
             lastrow = newrow;
             msim_putc(c);
 ,7 → 166,7
         case FB_CURSOR_GOTO:
             newrow = IPC_GET_ARG1(call);
             newcol = IPC_GET_ARG2(call);
-            serial_goto(newrow, newcol);
+            msim_goto(newrow, newcol);
             lastrow = newrow;
             lastcol = newcol;
             retval = 0;
 ,7 → 175,7
             ipc_answer_2(callid, EOK, HEIGHT, WIDTH);
             continue;
         case FB_CLEAR:
-            serial_clrscr();
+            msim_clrscr();
             retval = 0;
             break;
         case FB_SET_STYLE:
 ,9 → 182,9
             fgcolor = IPC_GET_ARG1(call);
             bgcolor = IPC_GET_ARG2(call);
             if (fgcolor < bgcolor)
-                serial_set_style(0);
+                msim_set_style(0);
             else
-                serial_set_style(7);
+                msim_set_style(7);
             retval = 0;
             break;
         case FB_SCROLL:
 ,15 → 193,15
                 retval = EINVAL;
                 break;
             }
-            serial_scroll(i);
-            serial_goto(lastrow, lastcol);
+            msim_scroll(i);
+            msim_goto(lastrow, lastcol);
             retval = 0;
             break;
         case FB_CURSOR_VISIBILITY:
             if(IPC_GET_ARG1(call))
-                serial_cursor_enable();
+                msim_cursor_enable();
             else
-                serial_cursor_disable();
+                msim_cursor_disable();
             retval = 0;
             break;
         default:
 ,8 → 218,6
     physmem_map(phys_addr, virt_addr, 1, AS_AREA_READ | AS_AREA_WRITE);
-    serial_console_init(msim_putc, WIDTH, HEIGHT);
     async_set_client_connection(msim_client_connection);
     return 0;
 }

 /trunk/uspace/srv/fb/main.c
 ,7 → 38,6
 #include "fb.h"
 #include "ega.h"
 #include "msim.h"
-#include "sgcn.h"
 #include "main.h"
 #define NAME "fb"
 ,12 → 79,6
             initialized = true;
     }
 #endif
-#ifdef SGCN_ENABLED
-    if ((!initialized) && (sysinfo_value("fb.kind") == 4)) {
-        if (sgcn_init() == 0)
-            initialized = true;
-    }
-#endif
     if (!initialized)
         return -1;

 /trunk/kernel/kernel.config
 ,11 → 76,6
 @ "opteron" Opteron
 ! [ARCH=amd64] MACHINE (choice)
-# CPU type
-@ "us" UltraSPARC I-II subarchitecture
-@ "us3" UltraSPARC III-IV subarchitecture
-! [ARCH=sparc64] MACHINE (choice)
 # Machine type
 @ "msim" MSIM Simulator
 @ "simics" Virtutech Simics simulator
 ,13 → 138,13
 # Support for Z8530 serial port
 ! [ARCH=sparc64] CONFIG_Z8530 (y/n)
-# Support for NS16550 serial port
-! [ARCH=sparc64|(ARCH=ia64&MACHINE!=ski)] CONFIG_NS16550 (n/y)
+# Support for NS16550 serial port (On IA64 as a console instead legacy keyboard)
+! [ARCH=sparc64] CONFIG_NS16550 (y/n)
-# Support for Serengeti console
-! [ARCH=sparc64] CONFIG_SGCN (y/n)
+# Support for NS16550 serial port (On IA64 as a console instead legacy keyboard)
+! [ARCH=ia64&MACHINE!=ski] CONFIG_NS16550 (n/y)
-# IOSapic on default address support
+# IOSapic on default address support (including legacy IRQ)
 ! [ARCH=ia64&MACHINE!=ski] CONFIG_IOSAPIC (y/n)
 # Interrupt-driven driver for Legacy Keyboard?

 /trunk/kernel/genarch/src/ofw/ofw_tree.c
 ,14 → 54,12
 /** Get OpenFirmware node property.
  *
- * @param node      Node in which to lookup the property.
- * @param name      Name of the property.
+ * @param node Node in which to lookup the property.
+ * @param name Name of the property.
  *
- * @return      Pointer to the property structure or NULL if no such
- *          property.
+ * @return Pointer to the property structure or NULL if no such property.
  */
-ofw_tree_property_t *
-ofw_tree_getprop(const ofw_tree_node_t *node, const char *name)
+ofw_tree_property_t *ofw_tree_getprop(const ofw_tree_node_t *node, const char *name)
 {
     unsigned int i;
 ,9 → 73,9
 /** Return value of the 'name' property.
  *
- * @param node      Node of interest.
+ * @param node Node of interest.
  *
- * @return      Value of the 'name' property belonging to the node.
+ * @return Value of the 'name' property belonging to the node.
  */
 const char *ofw_tree_node_name(const ofw_tree_node_t *node)
 {
 ,11 → 93,10
 /** Lookup child of given name.
  *
- * @param node      Node whose child is being looked up.
- * @param name      Name of the child being looked up.
+ * @param node Node whose child is being looked up.
+ * @param name Name of the child being looked up.
  *
- * @return      NULL if there is no such child or pointer to the
- *          matching child node.
+ * @return NULL if there is no such child or pointer to the matching child node.
  */
 ofw_tree_node_t *ofw_tree_find_child(ofw_tree_node_t *node, const char *name)
 {
 ,14 → 127,12
 /** Lookup first child of given device type.
  *
- * @param node      Node whose child is being looked up.
- * @param name      Device type of the child being looked up.
+ * @param node Node whose child is being looked up.
+ * @param name Device type of the child being looked up.
  *
- * @return      NULL if there is no such child or pointer to the
- *          matching child node.
+ * @return NULL if there is no such child or pointer to the matching child node.
  */
-ofw_tree_node_t *
-ofw_tree_find_child_by_device_type(ofw_tree_node_t *node, const char *name)
+ofw_tree_node_t *ofw_tree_find_child_by_device_type(ofw_tree_node_t *node, const char *name)
 {
     ofw_tree_node_t *cur;
     ofw_tree_property_t *prop;
 ,14 → 153,12
  * Child nodes are looked up recursively contrary to peer nodes that
  * are looked up iteratively to avoid stack overflow.
  *
- * @param root      Root of the searched subtree.
- * @param handle    OpenFirmware handle.
+ * @param root Root of the searched subtree.
+ * @param handle OpenFirmware handle.
  *
- * @return      NULL if there is no such node or pointer to the matching
- *          node.
+ * @return NULL if there is no such node or pointer to the matching node.
  */
-ofw_tree_node_t *
-ofw_tree_find_node_by_handle(ofw_tree_node_t *root, uint32_t handle)
+ofw_tree_node_t *ofw_tree_find_node_by_handle(ofw_tree_node_t *root, uint32_t handle)
 {
     ofw_tree_node_t *cur;
 ,14 → 180,12
 /** Lookup first peer of given device type.
  *
- * @param node      Node whose peer is being looked up.
- * @param name      Device type of the child being looked up.
+ * @param node Node whose peer is being looked up.
+ * @param name Device type of the child being looked up.
  *
- * @return      NULL if there is no such child or pointer to the
- *          matching child node.
+ * @return NULL if there is no such child or pointer to the matching child node.
  */
-ofw_tree_node_t *
-ofw_tree_find_peer_by_device_type(ofw_tree_node_t *node, const char *name)
+ofw_tree_node_t *ofw_tree_find_peer_by_device_type(ofw_tree_node_t *node, const char *name)
 {
     ofw_tree_node_t *cur;
     ofw_tree_property_t *prop;
 ,41 → 202,15
 }
-/** Lookup first peer of given name.
- *
- * @param node      Node whose peer is being looked up.
- * @param name      Name of the child being looked up.
- *
- * @return      NULL if there is no such peer or pointer to the matching
- *          peer node.
- */
-ofw_tree_node_t *
-ofw_tree_find_peer_by_name(ofw_tree_node_t *node, const char *name)
-{
-    ofw_tree_node_t *cur;
-    ofw_tree_property_t *prop;
-    for (cur = node->peer; cur; cur = cur->peer) {
-        prop = ofw_tree_getprop(cur, "name");
-        if (!prop || !prop->value)
-            continue;
-        if (strcmp(prop->value, name) == 0)
-            return cur;
-    }
-    return NULL;
-}
 /** Lookup OpenFirmware node by its path.
  *
- * @param path      Path to the node.
+ * @param path Path to the node.
  *
- * @return      NULL if there is no such node or pointer to the leaf
- *          node.
+ * @return NULL if there is no such node or pointer to the leaf node.
  */
 ofw_tree_node_t *ofw_tree_lookup(const char *path)
 {
-    char buf[NAME_BUF_LEN + 1];
+    char buf[NAME_BUF_LEN+1];
     ofw_tree_node_t *node = ofw_root;
     index_t i, j;
 ,8 → 236,8
  * Child nodes are processed recursively and peer nodes are processed
  * iteratively in order to avoid stack overflow.
  *
- * @param node      Root of the subtree.
- * @param path      Current path, NULL for the very root of the entire tree.
+ * @param node Root of the subtree.
+ * @param path Current path, NULL for the very root of the entire tree.
  */
 static void ofw_tree_node_print(const ofw_tree_node_t *node, const char *path)
 {

 /trunk/kernel/genarch/src/fb/fb.c
 ,26 → 191,6
         BLUE(rgb, 3);
 }
-static void sb1500rgb_byte8(void *dst, int rgb)
-{
-    if (RED(rgb, 1) && GREEN(rgb, 1) && BLUE(rgb, 1))
-        *((uint8_t *) dst) = 255;
-    else if (RED(rgb, 1) && GREEN(rgb, 1))
-        *((uint8_t *) dst) = 150;
-    else if (GREEN(rgb, 1) && BLUE(rgb, 1))
-        *((uint8_t *) dst) = 47;
-    else if (RED(rgb, 1) && BLUE(rgb, 1))
-        *((uint8_t *) dst) = 48;
-    else if (RED(rgb, 1))
-        *((uint8_t *) dst) = 32;
-    else if (GREEN(rgb, 1))
-        *((uint8_t *) dst) = 47;
-    else if (BLUE(rgb, 1))
-        *((uint8_t *) dst) = 2;
-    else
-        *((uint8_t *) dst) = 1;
-}
 /** Return pixel color - 8-bit depth (color palette/3:2:3)
  *
  * See the comment for rgb_byte().
 ,21 → 436,22
 /** Initialize framebuffer as a chardev output device
  *
- * @param props     Properties of the framebuffer device.
+ * @param addr   Physical address of the framebuffer
+ * @param x      Screen width in pixels
+ * @param y      Screen height in pixels
+ * @param scan   Bytes per one scanline
+ * @param visual Color model
+ *
  */
-void fb_init(fb_properties_t *props)
+void fb_init(uintptr_t addr, unsigned int x, unsigned int y, unsigned int scan,
+    unsigned int visual)
 {
-    switch (props->visual) {
+    switch (visual) {
     case VISUAL_INDIRECT_8:
         rgb2scr = rgb_byte8;
         scr2rgb = byte8_rgb;
         pixelbytes = 1;
         break;
-    case VISUAL_SB1500_PALETTE:
-        rgb2scr = sb1500rgb_byte8;
-        scr2rgb = byte8_rgb;
-        pixelbytes = 1;
-        break;
     case VISUAL_RGB_5_5_5:
         rgb2scr = rgb_byte555;
         scr2rgb = byte555_rgb;
 ,20 → 486,19
         panic("Unsupported visual.\n");
     }
-    unsigned int fbsize = props->scan * props->y + props->offset;
+    unsigned int fbsize = scan * y;
     /* Map the framebuffer */
-    fbaddress = (uint8_t *) hw_map((uintptr_t) props->addr, fbsize);
-    fbaddress += props->offset;
+    fbaddress = (uint8_t *) hw_map((uintptr_t) addr, fbsize);
-    xres = props->x;
-    yres = props->y;
-    scanline = props->scan;
+    xres = x;
+    yres = y;
+    scanline = scan;
-    rows = props->y / FONT_SCANLINES;
-    columns = props->x / COL_WIDTH;
+    rows = y / FONT_SCANLINES;
+    columns = x / COL_WIDTH;
-    fb_parea.pbase = (uintptr_t) props->addr;
+    fb_parea.pbase = (uintptr_t) addr;
     fb_parea.vbase = (uintptr_t) fbaddress;
     fb_parea.frames = SIZE2FRAMES(fbsize);
     fb_parea.cacheable = false;
 ,9 → 508,9
     sysinfo_set_item_val("fb.kind", NULL, 1);
     sysinfo_set_item_val("fb.width", NULL, xres);
     sysinfo_set_item_val("fb.height", NULL, yres);
-    sysinfo_set_item_val("fb.scanline", NULL, props->scan);
-    sysinfo_set_item_val("fb.visual", NULL, props->visual);
-    sysinfo_set_item_val("fb.address.physical", NULL, props->addr);
+    sysinfo_set_item_val("fb.scanline", NULL, scan);
+    sysinfo_set_item_val("fb.visual", NULL, visual);
+    sysinfo_set_item_val("fb.address.physical", NULL, addr);
     sysinfo_set_item_val("fb.invert-colors", NULL, invert_colors);
     /* Allocate double buffer */
 ,7 → 524,6
     blankline = (uint8_t *) malloc(ROW_BYTES, FRAME_ATOMIC);
     if (!blankline)
         panic("Failed to allocate blank line for framebuffer.");
-    unsigned int x, y;
     for (y = 0; y < FONT_SCANLINES; y++)
         for (x = 0; x < xres; x++)
             (*rgb2scr)(&blankline[POINTPOS(x, y)], COLOR(BGCOLOR));

 /trunk/kernel/genarch/include/ofw/ofw_tree.h
 ,8 → 172,6
     const char *);
 extern ofw_tree_node_t *ofw_tree_find_peer_by_device_type(ofw_tree_node_t *,
     const char *);
-extern ofw_tree_node_t *ofw_tree_find_peer_by_name(ofw_tree_node_t *node,
-    const char *name);
 extern ofw_tree_node_t *ofw_tree_find_node_by_handle(ofw_tree_node_t *,
     uint32_t);

 /trunk/kernel/genarch/include/fb/fb.h
 ,34 → 38,8
 #include <arch/types.h>
 #include <synch/spinlock.h>
-/**
- * Properties of the framebuffer device.
- */
-typedef struct fb_properties {
-    /** Physical address of the framebuffer device. */
-    uintptr_t addr;
-    /**
-     * Address where the first (top left) pixel is mapped,
-     * relative to "addr".
-     */
-    unsigned int offset;
-    /** Screen width in pixels. */
-    unsigned int x;
-    /** Screen height in pixels. */
-    unsigned int y;
-    /** Bytes per one scanline. */
-    unsigned int scan;
-    /** Color model. */
-    unsigned int visual;
-} fb_properties_t;
 SPINLOCK_EXTERN(fb_lock);
-void fb_init(fb_properties_t *props);
+void fb_init(uintptr_t addr, unsigned int x, unsigned int y, unsigned int scan, unsigned int visual);
 #endif

/trunk/kernel/genarch/include/fb/visuals.h
44,7 → 44,6
#define VISUAL_RGB_0_8_8_8 5

#define VISUAL_BGR_0_8_8_8 6
#define VISUAL_SB1500_PALETTE 7

#endif

 /trunk/kernel/arch/sparc64/include/drivers/scr.h
 ,8 → 42,7
     SCR_UNKNOWN,
     SCR_ATYFB,
     SCR_FFB,
-    SCR_CGSIX,
-    SCR_XVR
+    SCR_CGSIX
 } scr_type_t;
 extern scr_type_t scr_type;

 /trunk/kernel/arch/sparc64/include/drivers/kbd.h
 ,8 → 41,7
 typedef enum {
     KBD_UNKNOWN,
     KBD_Z8530,
-    KBD_NS16550,
-    KBD_SGCN
+    KBD_NS16550
 } kbd_type_t;
 extern kbd_type_t kbd_type;

 /trunk/kernel/arch/sparc64/include/asm.h
 ,28 → 136,6
     asm volatile ("wr %0, %1, %%tick_cmpr\n" : : "r" (v), "i" (0));
 }
-/** Read STICK_compare Register.
- *
- * @return Value of STICK_compare register.
- */
-static inline uint64_t stick_compare_read(void)
-{
-    uint64_t v;
-    asm volatile ("rd %%asr25, %0\n" : "=r" (v));
-    return v;
-}
-/** Write STICK_compare Register.
- *
- * @param v New value of STICK_comapre register.
- */
-static inline void stick_compare_write(uint64_t v)
-{
-    asm volatile ("wr %0, %1, %%asr25\n" : : "r" (v), "i" (0));
-}
 /** Read TICK Register.
  *
  * @return Value of TICK register.
 ,6 → 407,15
     asm volatile ("wrpr %g0, %g0, %tl\n");
 }
+/** Read UPA_CONFIG register.
+ *
+ * @return Value of the UPA_CONFIG register.
+ */
+static inline uint64_t upa_config_read(void)
+{
+    return asi_u64_read(ASI_UPA_CONFIG, 0);
+}
 extern void cpu_halt(void);
 extern void cpu_sleep(void);
 extern void asm_delay_loop(const uint32_t usec);

 /trunk/kernel/arch/sparc64/include/trap/interrupt.h
 ,43 → 49,21
 /* Interrupt ASI registers. */
-#define ASI_INTR_W          0x77
+#define ASI_UDB_INTR_W          0x77
 #define ASI_INTR_DISPATCH_STATUS    0x48
-#define ASI_INTR_R          0x7f
+#define ASI_UDB_INTR_R          0x7f
 #define ASI_INTR_RECEIVE        0x49
-/* VA's used with ASI_INTR_W register. */
-#if defined (US)
+/* VA's used with ASI_UDB_INTR_W register. */
 #define ASI_UDB_INTR_W_DATA_0   0x40
 #define ASI_UDB_INTR_W_DATA_1   0x50
 #define ASI_UDB_INTR_W_DATA_2   0x60
-#elif defined (US3)
-#define VA_INTR_W_DATA_0    0x40
-#define VA_INTR_W_DATA_1    0x48
-#define VA_INTR_W_DATA_2    0x50
-#define VA_INTR_W_DATA_3    0x58
-#define VA_INTR_W_DATA_4    0x60
-#define VA_INTR_W_DATA_5    0x68
-#define VA_INTR_W_DATA_6    0x80
-#define VA_INTR_W_DATA_7    0x88
-#endif
-#define VA_INTR_W_DISPATCH  0x70
+#define ASI_UDB_INTR_W_DISPATCH 0x70
-/* VA's used with ASI_INTR_R register. */
-#if defined(US)
+/* VA's used with ASI_UDB_INTR_R register. */
 #define ASI_UDB_INTR_R_DATA_0   0x40
 #define ASI_UDB_INTR_R_DATA_1   0x50
 #define ASI_UDB_INTR_R_DATA_2   0x60
-#elif defined (US3)
-#define VA_INTR_R_DATA_0    0x40
-#define VA_INTR_R_DATA_1    0x48
-#define VA_INTR_R_DATA_2    0x50
-#define VA_INTR_R_DATA_3    0x58
-#define VA_INTR_R_DATA_4    0x60
-#define VA_INTR_R_DATA_5    0x68
-#define VA_INTR_R_DATA_6    0x80
-#define VA_INTR_R_DATA_7    0x88
-#endif
 /* Shifts in the Interrupt Vector Dispatch virtual address. */
 #define INTR_VEC_DISPATCH_MID_SHIFT 14

 /trunk/kernel/arch/sparc64/include/mm/tlb.h
 ,17 → 35,9
 #ifndef KERN_sparc64_TLB_H_
 #define KERN_sparc64_TLB_H_
-#if defined (US)
 #define ITLB_ENTRY_COUNT        64
 #define DTLB_ENTRY_COUNT        64
-#define DTLB_MAX_LOCKED_ENTRIES     DTLB_ENTRY_COUNT
-#endif
-/** TLB_DSMALL is the only of the three DMMUs that can hold locked entries. */
-#if defined (US3)
-#define DTLB_MAX_LOCKED_ENTRIES     16
-#endif
 #define MEM_CONTEXT_KERNEL      0
 #define MEM_CONTEXT_TEMP        1
 ,9 → 53,6
 /* TLB Demap Operation types. */
 #define TLB_DEMAP_PAGE      0
 #define TLB_DEMAP_CONTEXT   1
-#if defined (US3)
-#define TLB_DEMAP_ALL       2
-#endif
 #define TLB_DEMAP_TYPE_SHIFT    6
 ,18 → 61,6
 #define TLB_DEMAP_SECONDARY 1
 #define TLB_DEMAP_NUCLEUS   2
-/* There are more TLBs in one MMU in US3, their codes are defined here. */
-#if defined (US3)
-/* D-MMU: one small (16-entry) TLB and two big (512-entry) TLBs */
-#define TLB_DSMALL  0
-#define TLB_DBIG_0  2
-#define TLB_DBIG_1  3
-/* I-MMU: one small (16-entry) TLB and one big TLB */
-#define TLB_ISMALL  0
-#define TLB_IBIG    2
-#endif
 #define TLB_DEMAP_CONTEXT_SHIFT 4
 /* TLB Tag Access shifts */
 ,8 → 76,6
 #include <arch/asm.h>
 #include <arch/barrier.h>
 #include <arch/types.h>
-#include <arch/register.h>
-#include <arch/cpu.h>
 union tlb_context_reg {
     uint64_t v;
 ,9 → 90,6
 typedef tte_data_t tlb_data_t;
 /** I-/D-TLB Data Access Address in Alternate Space. */
-#if defined (US)
 union tlb_data_access_addr {
     uint64_t value;
     struct {
 ,54 → 98,9
         unsigned : 3;
     } __attribute__ ((packed));
 };
-typedef union tlb_data_access_addr dtlb_data_access_addr_t;
-typedef union tlb_data_access_addr dtlb_tag_read_addr_t;
-typedef union tlb_data_access_addr itlb_data_access_addr_t;
-typedef union tlb_data_access_addr itlb_tag_read_addr_t;
+typedef union tlb_data_access_addr tlb_data_access_addr_t;
+typedef union tlb_data_access_addr tlb_tag_read_addr_t;
-#elif defined (US3)
-/*
- * In US3, I-MMU and D-MMU have different formats of the data
- * access register virtual address. In the corresponding
- * structures the member variable for the entry number is
- * called "local_tlb_entry" - it contrasts with the "tlb_entry"
- * for the US data access register VA structure. The rationale
- * behind this is to prevent careless mistakes in the code
- * caused by setting only the entry number and not the TLB
- * number in the US3 code (when taking the code from US).
- */
-union dtlb_data_access_addr {
-    uint64_t value;
-    struct {
-        uint64_t : 45;
-        unsigned : 1;
-        unsigned tlb_number : 2;
-        unsigned : 4;
-        unsigned local_tlb_entry : 9;
-        unsigned : 3;
-    } __attribute__ ((packed));
-};
-typedef union dtlb_data_access_addr dtlb_data_access_addr_t;
-typedef union dtlb_data_access_addr dtlb_tag_read_addr_t;
-union itlb_data_access_addr {
-    uint64_t value;
-    struct {
-        uint64_t : 45;
-        unsigned : 1;
-        unsigned tlb_number : 2;
-        unsigned : 6;
-        unsigned local_tlb_entry : 7;
-        unsigned : 3;
-    } __attribute__ ((packed));
-};
-typedef union itlb_data_access_addr itlb_data_access_addr_t;
-typedef union itlb_data_access_addr itlb_tag_read_addr_t;
-#endif
 /** I-/D-TLB Tag Read Register. */
 union tlb_tag_read_reg {
     uint64_t value;
 ,13 → 118,8
     uint64_t value;
     struct {
         uint64_t vpn: 51;   /**< Virtual Address bits 63:13. */
-#if defined (US)
         unsigned : 6;       /**< Ignored. */
         unsigned type : 1;  /**< The type of demap operation. */
-#elif defined (US3)
-        unsigned : 5;       /**< Ignored. */
-        unsigned type: 2;   /**< The type of demap operation. */
-#endif
         unsigned context : 2;   /**< Context register selection. */
         unsigned : 4;       /**< Zero. */
     } __attribute__ ((packed));
 ,19 → 130,10
 union tlb_sfsr_reg {
     uint64_t value;
     struct {
-#if defined (US)
         unsigned long : 40; /**< Implementation dependent. */
         unsigned asi : 8;   /**< ASI. */
         unsigned : 2;
         unsigned ft : 7;    /**< Fault type. */
-#elif defined (US3)
-        unsigned long : 39; /**< Implementation dependent. */
-        unsigned nf : 1;    /**< Non-faulting load. */
-        unsigned asi : 8;   /**< ASI. */
-        unsigned tm : 1;    /**< I-TLB miss. */
-        unsigned : 3;       /**< Reserved. */
-        unsigned ft : 5;    /**< Fault type. */
-#endif
         unsigned e : 1;     /**< Side-effect bit. */
         unsigned ct : 2;    /**< Context Register selection. */
         unsigned pr : 1;    /**< Privilege bit. */
 ,53 → 144,9
 };
 typedef union tlb_sfsr_reg tlb_sfsr_reg_t;
-#if defined (US3)
-/*
- * Functions for determining the number of entries in TLBs. They either return
- * a constant value or a value based on the CPU autodetection.
- */
-/**
- * Determine the number of entries in the DMMU's small TLB.
- */
-static inline uint16_t tlb_dsmall_size(void)
-{
-    return 16;
-}
-/**
- * Determine the number of entries in each DMMU's big TLB.
- */
-static inline uint16_t tlb_dbig_size(void)
-{
-    return 512;
-}
-/**
- * Determine the number of entries in the IMMU's small TLB.
- */
-static inline uint16_t tlb_ismall_size(void)
-{
-    return 16;
-}
-/**
- * Determine the number of entries in the IMMU's big TLB.
- */
-static inline uint16_t tlb_ibig_size(void)
-{
-    if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIV_PLUS)
-        return 512;
-    else
-        return 128;
-}
-#endif
 /** Read MMU Primary Context Register.
  *
- * @return      Current value of Primary Context Register.
+ * @return Current value of Primary Context Register.
  */
 static inline uint64_t mmu_primary_context_read(void)
 {
 ,7 → 155,7
 /** Write MMU Primary Context Register.
  *
- * @param v     New value of Primary Context Register.
+ * @param v New value of Primary Context Register.
  */
 static inline void mmu_primary_context_write(uint64_t v)
 {
 ,7 → 165,7
 /** Read MMU Secondary Context Register.
  *
- * @return      Current value of Secondary Context Register.
+ * @return Current value of Secondary Context Register.
  */
 static inline uint64_t mmu_secondary_context_read(void)
 {
 ,7 → 174,7
 /** Write MMU Primary Context Register.
  *
- * @param v     New value of Primary Context Register.
+ * @param v New value of Primary Context Register.
  */
 static inline void mmu_secondary_context_write(uint64_t v)
 {
 ,18 → 182,15
     flush_pipeline();
 }
-#if defined (US)
 /** Read IMMU TLB Data Access Register.
  *
- * @param entry     TLB Entry index.
+ * @param entry TLB Entry index.
  *
- * @return      Current value of specified IMMU TLB Data Access
- *          Register.
+ * @return Current value of specified IMMU TLB Data Access Register.
  */
 static inline uint64_t itlb_data_access_read(index_t entry)
 {
-    itlb_data_access_addr_t reg;
+    tlb_data_access_addr_t reg;
     reg.value = 0;
     reg.tlb_entry = entry;
 ,12 → 199,12
 /** Write IMMU TLB Data Access Register.
  *
- * @param entry     TLB Entry index.
- * @param value     Value to be written.
+ * @param entry TLB Entry index.
+ * @param value Value to be written.
  */
 static inline void itlb_data_access_write(index_t entry, uint64_t value)
 {
-    itlb_data_access_addr_t reg;
+    tlb_data_access_addr_t reg;
     reg.value = 0;
     reg.tlb_entry = entry;
 ,14 → 214,13
 /** Read DMMU TLB Data Access Register.
  *
- * @param entry     TLB Entry index.
+ * @param entry TLB Entry index.
  *
- * @return      Current value of specified DMMU TLB Data Access
- *          Register.
+ * @return Current value of specified DMMU TLB Data Access Register.
  */
 static inline uint64_t dtlb_data_access_read(index_t entry)
 {
-    dtlb_data_access_addr_t reg;
+    tlb_data_access_addr_t reg;
     reg.value = 0;
     reg.tlb_entry = entry;
 ,12 → 229,12
 /** Write DMMU TLB Data Access Register.
  *
- * @param entry     TLB Entry index.
- * @param value     Value to be written.
+ * @param entry TLB Entry index.
+ * @param value Value to be written.
  */
 static inline void dtlb_data_access_write(index_t entry, uint64_t value)
 {
-    dtlb_data_access_addr_t reg;
+    tlb_data_access_addr_t reg;
     reg.value = 0;
     reg.tlb_entry = entry;
 ,13 → 244,13
 /** Read IMMU TLB Tag Read Register.
  *
- * @param entry     TLB Entry index.
+ * @param entry TLB Entry index.
  *
- * @return      Current value of specified IMMU TLB Tag Read Register.
+ * @return Current value of specified IMMU TLB Tag Read Register.
  */
 static inline uint64_t itlb_tag_read_read(index_t entry)
 {
-    itlb_tag_read_addr_t tag;
+    tlb_tag_read_addr_t tag;
     tag.value = 0;
     tag.tlb_entry = entry;
 ,13 → 259,13
 /** Read DMMU TLB Tag Read Register.
  *
- * @param entry     TLB Entry index.
+ * @param entry TLB Entry index.
  *
- * @return      Current value of specified DMMU TLB Tag Read Register.
+ * @return Current value of specified DMMU TLB Tag Read Register.
  */
 static inline uint64_t dtlb_tag_read_read(index_t entry)
 {
-    dtlb_tag_read_addr_t tag;
+    tlb_tag_read_addr_t tag;
     tag.value = 0;
     tag.tlb_entry = entry;
 ,120 → 272,9
     return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value);
 }
-#elif defined (US3)
-/** Read IMMU TLB Data Access Register.
- *
- * @param tlb       TLB number (one of TLB_ISMALL or TLB_IBIG)
- * @param entry     TLB Entry index.
- *
- * @return      Current value of specified IMMU TLB Data Access
- *          Register.
- */
-static inline uint64_t itlb_data_access_read(int tlb, index_t entry)
-{
-    itlb_data_access_addr_t reg;
-    reg.value = 0;
-    reg.tlb_number = tlb;
-    reg.local_tlb_entry = entry;
-    return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value);
-}
-/** Write IMMU TLB Data Access Register.
- * @param tlb       TLB number (one of TLB_ISMALL or TLB_IBIG)
- * @param entry     TLB Entry index.
- * @param value     Value to be written.
- */
-static inline void itlb_data_access_write(int tlb, index_t entry,
-    uint64_t value)
-{
-    itlb_data_access_addr_t reg;
-    reg.value = 0;
-    reg.tlb_number = tlb;
-    reg.local_tlb_entry = entry;
-    asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value);
-    flush_pipeline();
-}
-/** Read DMMU TLB Data Access Register.
- *
- * @param tlb       TLB number (one of TLB_DSMALL, TLB_DBIG, TLB_DBIG)
- * @param entry     TLB Entry index.
- *
- * @return      Current value of specified DMMU TLB Data Access
- *          Register.
- */
-static inline uint64_t dtlb_data_access_read(int tlb, index_t entry)
-{
-    dtlb_data_access_addr_t reg;
-    reg.value = 0;
-    reg.tlb_number = tlb;
-    reg.local_tlb_entry = entry;
-    return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value);
-}
-/** Write DMMU TLB Data Access Register.
- *
- * @param tlb       TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1)
- * @param entry     TLB Entry index.
- * @param value     Value to be written.
- */
-static inline void dtlb_data_access_write(int tlb, index_t entry,
-    uint64_t value)
-{
-    dtlb_data_access_addr_t reg;
-    reg.value = 0;
-    reg.tlb_number = tlb;
-    reg.local_tlb_entry = entry;
-    asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value);
-    membar();
-}
-/** Read IMMU TLB Tag Read Register.
- *
- * @param tlb       TLB number (one of TLB_ISMALL or TLB_IBIG)
- * @param entry     TLB Entry index.
- *
- * @return      Current value of specified IMMU TLB Tag Read Register.
- */
-static inline uint64_t itlb_tag_read_read(int tlb, index_t entry)
-{
-    itlb_tag_read_addr_t tag;
-    tag.value = 0;
-    tag.tlb_number = tlb;
-    tag.local_tlb_entry = entry;
-    return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value);
-}
-/** Read DMMU TLB Tag Read Register.
- *
- * @param tlb       TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1)
- * @param entry     TLB Entry index.
- *
- * @return      Current value of specified DMMU TLB Tag Read Register.
- */
-static inline uint64_t dtlb_tag_read_read(int tlb, index_t entry)
-{
-    dtlb_tag_read_addr_t tag;
-    tag.value = 0;
-    tag.tlb_number = tlb;
-    tag.local_tlb_entry = entry;
-    return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value);
-}
-#endif
 /** Write IMMU TLB Tag Access Register.
  *
- * @param v     Value to be written.
+ * @param v Value to be written.
  */
 static inline void itlb_tag_access_write(uint64_t v)
 {
 ,7 → 284,7
 /** Read IMMU TLB Tag Access Register.
  *
- * @return      Current value of IMMU TLB Tag Access Register.
+ * @return Current value of IMMU TLB Tag Access Register.
  */
 static inline uint64_t itlb_tag_access_read(void)
 {
 ,7 → 293,7
 /** Write DMMU TLB Tag Access Register.
  *
- * @param v     Value to be written.
+ * @param v Value to be written.
  */
 static inline void dtlb_tag_access_write(uint64_t v)
 {
 ,7 → 303,7
 /** Read DMMU TLB Tag Access Register.
  *
- * @return      Current value of DMMU TLB Tag Access Register.
+ * @return Current value of DMMU TLB Tag Access Register.
  */
 static inline uint64_t dtlb_tag_access_read(void)
 {
 ,7 → 313,7
 /** Write IMMU TLB Data in Register.
  *
- * @param v     Value to be written.
+ * @param v Value to be written.
  */
 static inline void itlb_data_in_write(uint64_t v)
 {
 ,7 → 323,7
 /** Write DMMU TLB Data in Register.
  *
- * @param v     Value to be written.
+ * @param v Value to be written.
  */
 static inline void dtlb_data_in_write(uint64_t v)
 {
 ,7 → 333,7
 /** Read ITLB Synchronous Fault Status Register.
  *
- * @return      Current content of I-SFSR register.
+ * @return Current content of I-SFSR register.
  */
 static inline uint64_t itlb_sfsr_read(void)
 {
 ,7 → 342,7
 /** Write ITLB Synchronous Fault Status Register.
  *
- * @param v     New value of I-SFSR register.
+ * @param v New value of I-SFSR register.
  */
 static inline void itlb_sfsr_write(uint64_t v)
 {
 ,7 → 352,7
 /** Read DTLB Synchronous Fault Status Register.
  *
- * @return      Current content of D-SFSR register.
+ * @return Current content of D-SFSR register.
  */
 static inline uint64_t dtlb_sfsr_read(void)
 {
 ,7 → 361,7
 /** Write DTLB Synchronous Fault Status Register.
  *
- * @param v     New value of D-SFSR register.
+ * @param v New value of D-SFSR register.
  */
 static inline void dtlb_sfsr_write(uint64_t v)
 {
 ,7 → 371,7
 /** Read DTLB Synchronous Fault Address Register.
  *
- * @return      Current content of D-SFAR register.
+ * @return Current content of D-SFAR register.
  */
 static inline uint64_t dtlb_sfar_read(void)
 {
 ,11 → 380,10
 /** Perform IMMU TLB Demap Operation.
  *
- * @param type      Selects between context and page demap (and entire MMU
- *          demap on US3).
+ * @param type Selects between context and page demap.
  * @param context_encoding Specifies which Context register has Context ID for
- *          demap.
- * @param page      Address which is on the page to be demapped.
+ *  demap.
+ * @param page Address which is on the page to be demapped.
  */
 static inline void itlb_demap(int type, int context_encoding, uintptr_t page)
 {
 ,19 → 397,18
     da.context = context_encoding;
     da.vpn = pg.vpn;
-    /* da.value is the address within the ASI */
-    asi_u64_write(ASI_IMMU_DEMAP, da.value, 0);
+    asi_u64_write(ASI_IMMU_DEMAP, da.value, 0); /* da.value is the
+                             * address within the
+                             * ASI */
     flush_pipeline();
 }
 /** Perform DMMU TLB Demap Operation.
  *
- * @param type      Selects between context and page demap (and entire MMU
- *          demap on US3).
+ * @param type Selects between context and page demap.
  * @param context_encoding Specifies which Context register has Context ID for
- *          demap.
- * @param page      Address which is on the page to be demapped.
+ *   demap.
+ * @param page Address which is on the page to be demapped.
  */
 static inline void dtlb_demap(int type, int context_encoding, uintptr_t page)
 {
 ,17 → 422,17
     da.context = context_encoding;
     da.vpn = pg.vpn;
-    /* da.value is the address within the ASI */
-    asi_u64_write(ASI_DMMU_DEMAP, da.value, 0);
+    asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); /* da.value is the
+                             * address within the
+                             * ASI */
     membar();
 }
-extern void fast_instruction_access_mmu_miss(unative_t, istate_t *);
-extern void fast_data_access_mmu_miss(tlb_tag_access_reg_t, istate_t *);
-extern void fast_data_access_protection(tlb_tag_access_reg_t , istate_t *);
+extern void fast_instruction_access_mmu_miss(unative_t unused, istate_t *istate);
+extern void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate);
+extern void fast_data_access_protection(tlb_tag_access_reg_t tag , istate_t *istate);
-extern void dtlb_insert_mapping(uintptr_t, uintptr_t, int, bool, bool);
+extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable);
 extern void dump_sfsr_and_sfar(void);

 /trunk/kernel/arch/sparc64/include/mm/cache_spec.h
 ,20 → 38,19
 /*
  * The following macros are valid for the following processors:
  *
- *  UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III,
- *  UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+
+ *  UltraSPARC, UltraSPARC II, UltraSPARC IIi
  *
  * Should we support other UltraSPARC processors, we need to make sure that
  * the macros are defined correctly for them.
  */
-#if defined (US)
 #define DCACHE_SIZE     (16 * 1024)
-#elif defined (US3)
-#define DCACHE_SIZE     (64 * 1024)
-#endif
 #define DCACHE_LINE_SIZE    32
+#define ICACHE_SIZE     (16 * 1024)
+#define ICACHE_WAYS     2
+#define ICACHE_LINE_SIZE    32
 #endif
 /** @}

 /trunk/kernel/arch/sparc64/include/mm/frame.h
 ,13 → 59,8
 union frame_address {
     uintptr_t address;
     struct {
-#if defined (US)
         unsigned : 23;
         uint64_t pfn : 28;      /**< Physical Frame Number. */
-#elif defined (US3)
-        unsigned : 21;
-        uint64_t pfn : 30;      /**< Physical Frame Number. */
-#endif
         unsigned offset : 13;       /**< Offset. */
     } __attribute__ ((packed));
 };

 /trunk/kernel/arch/sparc64/include/mm/cache.h
 ,6 → 38,15
 #include <mm/page.h>
 #include <mm/frame.h>
+#define dcache_flush_page(p) \
+    dcache_flush_color(PAGE_COLOR((p)))
+#define dcache_flush_frame(p, f) \
+    dcache_flush_tag(PAGE_COLOR((p)), ADDR2PFN((f)));
+extern void dcache_flush(void);
+extern void dcache_flush_color(int c);
+extern void dcache_flush_tag(int c, pfn_t tag);
 #endif
 /** @}

 /trunk/kernel/arch/sparc64/include/mm/tsb.h
 ,55 → 107,6
     asi_u64_write(ASI_DMMU, VA_DMMU_TSB_BASE, v);
 }
-#if defined (US3)
-/** Write DTSB Primary Extension register.
- *
- * @param v New content of the DTSB Primary Extension register.
- */
-static inline void dtsb_primary_extension_write(uint64_t v)
-{
-    asi_u64_write(ASI_DMMU, VA_DMMU_PRIMARY_EXTENSION, v);
-}
-/** Write DTSB Secondary Extension register.
- *
- * @param v New content of the DTSB Secondary Extension register.
- */
-static inline void dtsb_secondary_extension_write(uint64_t v)
-{
-    asi_u64_write(ASI_DMMU, VA_DMMU_SECONDARY_EXTENSION, v);
-}
-/** Write DTSB Nucleus Extension register.
- *
- * @param v New content of the DTSB Nucleus Extension register.
- */
-static inline void dtsb_nucleus_extension_write(uint64_t v)
-{
-    asi_u64_write(ASI_DMMU, VA_DMMU_NUCLEUS_EXTENSION, v);
-}
-/** Write ITSB Primary Extension register.
- *
- * @param v New content of the ITSB Primary Extension register.
- */
-static inline void itsb_primary_extension_write(uint64_t v)
-{
-    asi_u64_write(ASI_IMMU, VA_IMMU_PRIMARY_EXTENSION, v);
-}
-/** Write ITSB Nucleus Extension register.
- *
- * @param v New content of the ITSB Nucleus Extension register.
- */
-static inline void itsb_nucleus_extension_write(uint64_t v)
-{
-    asi_u64_write(ASI_IMMU, VA_IMMU_NUCLEUS_EXTENSION, v);
-}
-#endif
 /* Forward declarations. */
 struct as;
 struct pte;

 /trunk/kernel/arch/sparc64/include/mm/mmu.h
 ,10 → 35,8
 #ifndef KERN_sparc64_MMU_H_
 #define KERN_sparc64_MMU_H_
-#if defined(US)
 /* LSU Control Register ASI. */
 #define ASI_LSU_CONTROL_REG     0x45    /**< Load/Store Unit Control Register. */
-#endif
 /* I-MMU ASIs. */
 #define ASI_IMMU            0x50
 ,12 → 52,7
 #define VA_IMMU_SFSR            0x18    /**< IMMU sync fault status register. */
 #define VA_IMMU_TSB_BASE        0x28    /**< IMMU TSB base register. */
 #define VA_IMMU_TAG_ACCESS      0x30    /**< IMMU TLB tag access register. */
-#if defined (US3)
-#define VA_IMMU_PRIMARY_EXTENSION   0x48    /**< IMMU TSB primary extension register */
-#define VA_IMMU_NUCLEUS_EXTENSION   0x58    /**< IMMU TSB nucleus extension register */
-#endif
 /* D-MMU ASIs. */
 #define ASI_DMMU            0x58
 #define ASI_DMMU_TSB_8KB_PTR_REG    0x59
 ,11 → 73,6
 #define VA_DMMU_TAG_ACCESS      0x30    /**< DMMU TLB tag access register. */
 #define VA_DMMU_VA_WATCHPOINT_REG   0x38    /**< DMMU VA data watchpoint register. */
 #define VA_DMMU_PA_WATCHPOINT_REG   0x40    /**< DMMU PA data watchpoint register. */
-#if defined (US3)
-#define VA_DMMU_PRIMARY_EXTENSION   0x48    /**< DMMU TSB primary extension register */
-#define VA_DMMU_SECONDARY_EXTENSION 0x50    /**< DMMU TSB secondary extension register */
-#define VA_DMMU_NUCLEUS_EXTENSION   0x58    /**< DMMU TSB nucleus extension register */
-#endif
 #ifndef __ASM__
 ,7 → 80,6
 #include <arch/barrier.h>
 #include <arch/types.h>
-#if defined(US)
 /** LSU Control Register. */
 typedef union {
     uint64_t value;
 ,7 → 100,6
     } __attribute__ ((packed));
 } lsu_cr_reg_t;
-#endif /* US */
 #endif /* !def __ASM__ */

 /trunk/kernel/arch/sparc64/include/mm/tte.h
 ,7 → 50,6
 #include <arch/types.h>
-/* TTE tag's VA_tag field contains bits <63:VA_TAG_PAGE_SHIFT> of the VA */
 #define VA_TAG_PAGE_SHIFT   22
 /** Translation Table Entry - Tag. */
 ,13 → 75,8
         unsigned nfo : 1;   /**< No-Fault-Only. */
         unsigned ie : 1;    /**< Invert Endianness. */
         unsigned soft2 : 9; /**< Software defined field. */
-#if defined (US)
         unsigned diag : 9;  /**< Diagnostic data. */
         unsigned pfn : 28;  /**< Physical Address bits, bits 40:13. */
-#elif defined (US3)
-        unsigned : 7;       /**< Reserved. */
-        unsigned pfn : 30;  /**< Physical Address bits, bits 42:13 */
-#endif
         unsigned soft : 6;  /**< Software defined field. */
         unsigned l : 1;     /**< Lock. */
         unsigned cp : 1;    /**< Cacheable in physically indexed cache. */

 /trunk/kernel/arch/sparc64/include/cpu.h
 ,6 → 35,15
 #ifndef KERN_sparc64_CPU_H_
 #define KERN_sparc64_CPU_H_
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/register.h>
+#include <arch/asm.h>
+#ifdef CONFIG_SMP
+#include <arch/mm/cache.h>
+#endif
 #define MANUF_FUJITSU       0x04
 #define MANUF_ULTRASPARC    0x17    /**< UltraSPARC I, UltraSPARC II */
 #define MANUF_SUN       0x3e
 ,29 → 52,14
 #define IMPL_ULTRASPARCII   0x11
 #define IMPL_ULTRASPARCII_I 0x12
 #define IMPL_ULTRASPARCII_E 0x13
-#define IMPL_ULTRASPARCIII  0x14
-#define IMPL_ULTRASPARCIII_PLUS 0x15
-#define IMPL_ULTRASPARCIII_I    0x16
-#define IMPL_ULTRASPARCIV   0x18
+#define IMPL_ULTRASPARCIII  0x15
 #define IMPL_ULTRASPARCIV_PLUS  0x19
 #define IMPL_SPARC64V       0x5
-#ifndef __ASM__
-#include <arch/types.h>
-#include <typedefs.h>
-#include <arch/register.h>
-#include <arch/regdef.h>
-#include <arch/asm.h>
-#ifdef CONFIG_SMP
-#include <arch/mm/cache.h>
-#endif
 typedef struct {
     uint32_t mid;           /**< Processor ID as read from
-                         UPA_CONFIG/FIREPLANE_CONFIG. */
+                         UPA_CONFIG. */
     ver_reg_t ver;
     uint32_t clock_frequency;   /**< Processor frequency in Hz. */
     uint64_t next_tick_cmpr;    /**< Next clock interrupt should be
 ,28 → 66,8
                          generated when the TICK register
                          matches this value. */
 } cpu_arch_t;
-/**
- * Reads the module ID (agent ID/CPUID) of the current CPU.
- */
-static inline uint32_t read_mid(void)
-{
-    uint64_t icbus_config = asi_u64_read(ASI_ICBUS_CONFIG, 0);
-    icbus_config = icbus_config >> ICBUS_CONFIG_MID_SHIFT;
-#if defined (US)
-    return icbus_config & 0x1f;
-#elif defined (US3)
-    if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIII_I)
-        return icbus_config & 0x1f;
-    else
-        return icbus_config & 0x3ff;
 #endif
-}
-#endif
-#endif
 /** @}
  */

 /trunk/kernel/arch/sparc64/include/regdef.h
 ,11 → 55,8
 #define WSTATE_NORMAL(n)    (n)
 #define WSTATE_OTHER(n)     ((n) << 3)
-/*
- * The following definitions concern the UPA_CONFIG register on US and the
- * FIREPLANE_CONFIG register on US3.
- */
-#define ICBUS_CONFIG_MID_SHIFT    17
+#define UPA_CONFIG_MID_SHIFT    17
+#define UPA_CONFIG_MID_MASK     0x1f
 #endif

 /trunk/kernel/arch/sparc64/include/arch.h
 ,7 → 41,7
 #define ASI_AIUS        0x11    /** Access to secondary context with user privileges. */
 #define ASI_NUCLEUS_QUAD_LDD    0x24    /** ASI for 16-byte atomic loads. */
 #define ASI_DCACHE_TAG      0x47    /** ASI D-Cache Tag. */
-#define ASI_ICBUS_CONFIG        0x4a    /** ASI of the UPA_CONFIG/FIREPLANE_CONFIG register. */
+#define ASI_UPA_CONFIG      0x4a    /** ASI of the UPA_CONFIG register. */
 #define NWINDOWS        8   /** Number of register window sets. */

 /trunk/kernel/arch/sparc64/include/register.h
 ,6 → 117,23
 };
 typedef union fprs_reg fprs_reg_t;
+/** UPA_CONFIG register.
+ *
+ * Note that format of this register differs significantly from
+ * processor version to version. The format defined here
+ * is the common subset for all supported processor versions.
+ */
+union upa_config {
+    uint64_t value;
+    struct {
+        uint64_t : 34;
+        unsigned pcon : 8;  /**< Processor configuration. */
+        unsigned mid : 5;   /**< Module (processor) ID register. */
+        unsigned pcap : 17; /**< Processor capabilities. */
+    } __attribute__ ((packed));
+};
+typedef union upa_config upa_config_t;
 #endif
 /** @}

 /trunk/kernel/arch/sparc64/src/trap/interrupt.c
 ,19 → 67,11
  */
 void interrupt(int n, istate_t *istate)
 {
-    uint64_t status;
     uint64_t intrcv;
     uint64_t data0;
-    status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
-    if (status & (!INTR_DISPATCH_STATUS_BUSY))
-        panic("Interrupt Dispatch Status busy bit not set\n");
     intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
-#if defined (US)
-    data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);
-#elif defined (US3)
-    data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);
-#endif
+    data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0);
     irq_t *irq = irq_dispatch_and_lock(data0);
     if (irq) {

 /trunk/kernel/arch/sparc64/src/drivers/scr.c
 ,10 → 55,6
 void scr_init(ofw_tree_node_t *node)
 {
     ofw_tree_property_t *prop;
-    ofw_pci_reg_t *pci_reg;
-    ofw_pci_reg_t pci_abs_reg;
-    ofw_upa_reg_t *upa_reg;
-    ofw_sbus_reg_t *sbus_reg;
     const char *name;
     name = ofw_tree_node_name(node);
 ,8 → 61,6
     if (strcmp(name, "SUNW,m64B") == 0)
         scr_type = SCR_ATYFB;
-    else if (strcmp(name, "SUNW,XVR-100") == 0)
-        scr_type = SCR_XVR;
     else if (strcmp(name, "SUNW,ffb") == 0)
         scr_type = SCR_FFB;
     else if (strcmp(name, "cgsix") == 0)
 ,7 → 67,7
         scr_type = SCR_CGSIX;
     if (scr_type == SCR_UNKNOWN) {
-        printf("Unknown screen device.\n");
+        printf("Unknown keyboard device.\n");
         return;
     }
 ,15 → 106,15
             return;
         }
-        pci_reg = &((ofw_pci_reg_t *) prop->value)[1];
+        ofw_pci_reg_t *fb_reg = &((ofw_pci_reg_t *) prop->value)[1];
+        ofw_pci_reg_t abs_reg;
-        if (!ofw_pci_reg_absolutize(node, pci_reg, &pci_abs_reg)) {
+        if (!ofw_pci_reg_absolutize(node, fb_reg, &abs_reg)) {
             printf("Failed to absolutize fb register.\n");
             return;
         }
-        if (!ofw_pci_apply_ranges(node->parent, &pci_abs_reg,
-            &fb_addr)) {
+        if (!ofw_pci_apply_ranges(node->parent, &abs_reg , &fb_addr)) {
             printf("Failed to determine screen address.\n");
             return;
         }
 ,54 → 142,12
         }
         break;
-    case SCR_XVR:
-        if (prop->size / sizeof(ofw_pci_reg_t) < 2) {
-            printf("Too few screen registers.\n");
-            return;
-        }
-        pci_reg = &((ofw_pci_reg_t *) prop->value)[1];
-        if (!ofw_pci_reg_absolutize(node, pci_reg, &pci_abs_reg)) {
-            printf("Failed to absolutize fb register.\n");
-            return;
-        }
-        if (!ofw_pci_apply_ranges(node->parent, &pci_abs_reg,
-            &fb_addr)) {
-            printf("Failed to determine screen address.\n");
-            return;
-        }
-        switch (fb_depth) {
-        case 8:
-            fb_scanline = fb_linebytes * (fb_depth >> 3);
-            visual = VISUAL_SB1500_PALETTE;
-            break;
-        case 16:
-            fb_scanline = fb_linebytes * (fb_depth >> 3);
-            visual = VISUAL_RGB_5_6_5;
-            break;
-        case 24:
-            fb_scanline = fb_linebytes * 4;
-            visual = VISUAL_RGB_8_8_8_0;
-            break;
-        case 32:
-            fb_scanline = fb_linebytes * (fb_depth >> 3);
-            visual = VISUAL_RGB_0_8_8_8;
-            break;
-        default:
-            printf("Unsupported bits per pixel.\n");
-            return;
-        }
-        break;
     case SCR_FFB:
         fb_scanline = 8192;
         visual = VISUAL_BGR_0_8_8_8;
-        upa_reg = &((ofw_upa_reg_t *) prop->value)[FFB_REG_24BPP];
-        if (!ofw_upa_apply_ranges(node->parent, upa_reg, &fb_addr)) {
+        ofw_upa_reg_t *reg = &((ofw_upa_reg_t *) prop->value)[FFB_REG_24BPP];
+        if (!ofw_upa_apply_ranges(node->parent, reg, &fb_addr)) {
             printf("Failed to determine screen address.\n");
             return;
         }
 ,8 → 164,8
             return;
         }
-        sbus_reg = &((ofw_sbus_reg_t *) prop->value)[0];
-        if (!ofw_sbus_apply_ranges(node->parent, sbus_reg, &fb_addr)) {
+        ofw_sbus_reg_t *cg6_reg = &((ofw_sbus_reg_t *) prop->value)[0];
+        if (!ofw_sbus_apply_ranges(node->parent, cg6_reg, &fb_addr)) {
             printf("Failed to determine screen address.\n");
             return;
         }
 ,15 → 175,7
         panic("Unexpected type.\n");
     }
-    fb_properties_t props = {
-        .addr = fb_addr,
-        .offset = 0,
-        .x = fb_width,
-        .y = fb_height,
-        .scan = fb_scanline,
-        .visual = visual,
-    };
-    fb_init(&props);
+    fb_init(fb_addr, fb_width, fb_height, fb_scanline, visual);
 }
 /** @}

 /trunk/kernel/arch/sparc64/src/drivers/tick.c
 ,12 → 45,11
 #define TICK_RESTART_TIME   50  /* Worst case estimate. */
-/** Initialize tick and stick interrupt. */
+/** Initialize tick interrupt. */
 void tick_init(void)
 {
-    /* initialize TICK interrupt */
     tick_compare_reg_t compare;
     interrupt_register(14, "tick_int", tick_interrupt);
     compare.int_dis = false;
     compare.tick_cmpr = CPU->arch.clock_frequency / HZ;
 ,21 → 56,6
     CPU->arch.next_tick_cmpr = compare.tick_cmpr;
     tick_compare_write(compare.value);
     tick_write(0);
-#if defined (US3)
-    /* disable STICK interrupts and clear any pending ones */
-    tick_compare_reg_t stick_compare;
-    softint_reg_t clear;
-    stick_compare.value = stick_compare_read();
-    stick_compare.int_dis = true;
-    stick_compare.tick_cmpr = 0;
-    stick_compare_write(stick_compare.value);
-    clear.value = 0;
-    clear.stick_int = 1;
-    clear_softint_write(clear.value);
-#endif
 }
 /** Process tick interrupt.
 ,7 → 67,7
 {
     softint_reg_t softint, clear;
     uint64_t drift;
     softint.value = softint_read();
     /*

 /trunk/kernel/arch/sparc64/src/console.c
 ,8 → 38,6
 #include <arch/drivers/scr.h>
 #include <arch/drivers/kbd.h>
-#include <arch/drivers/sgcn.h>
 #ifdef CONFIG_Z8530
 #include <genarch/kbd/z8530.h>
 #endif
 ,25 → 54,24
 #include <genarch/ofw/ofw_tree.h>
 #include <arch.h>
 #include <panic.h>
-#include <func.h>
 #include <print.h>
 #define KEYBOARD_POLL_PAUSE 50000   /* 50ms */
-/**
- * Initialize kernel console to use framebuffer and keyboard directly.
- * Called on UltraSPARC machines with standard keyboard and framebuffer.
- *
- * @param aliases   the "/aliases" OBP node
- */
-static void standard_console_init(ofw_tree_node_t *aliases)
+/** Initialize kernel console to use framebuffer and keyboard directly. */
+void standalone_sparc64_console_init(void)
 {
     stdin = NULL;
+    ofw_tree_node_t *aliases;
     ofw_tree_property_t *prop;
     ofw_tree_node_t *screen;
     ofw_tree_node_t *keyboard;
+    aliases = ofw_tree_lookup("/aliases");
+    if (!aliases)
+        panic("Can't find /aliases.\n");
     prop = ofw_tree_getprop(aliases, "screen");
     if (!prop)
         panic("Can't find property \"screen\".\n");
 ,36 → 95,6
     kbd_init(keyboard);
 }
-/** Initilize I/O on the Serengeti machine. */
-static void serengeti_init(void)
-{
-    sgcn_init();
-}
-/**
- * Initialize input/output. Auto-detects the type of machine
- * and calls the appropriate I/O init routine.
- */
-void standalone_sparc64_console_init(void)
-{
-    ofw_tree_node_t *aliases;
-    ofw_tree_property_t *prop;
-    aliases = ofw_tree_lookup("/aliases");
-    if (!aliases)
-        panic("Can't find /aliases.\n");
-    /* "def-cn" = "default console" */
-    prop = ofw_tree_getprop(aliases, "def-cn");
-    if ((!prop) || (!prop->value) || (strcmp(prop->value, "/sgcn") != 0)) {
-        standard_console_init(aliases);
-    } else {
-        serengeti_init();
-    }
-}
 /** Kernel thread for polling keyboard.
  *
  * @param arg Ignored.
 ,10 → 129,6
             ns16550_poll();
 #endif
 #endif
-#ifdef CONFIG_SGCN
-        if (kbd_type == KBD_SGCN)
-            sgcn_poll();
-#endif
         thread_usleep(KEYBOARD_POLL_PAUSE);
     }
 }
 ,11 → 149,6
         ns16550_grab();
         break;
 #endif
-#ifdef CONFIG_SGCN
-    case KBD_SGCN:
-        sgcn_grab();
-        break;
-#endif
     default:
         break;
     }
 ,11 → 170,6
         ns16550_release();
         break;
 #endif
-#ifdef CONFIG_SGCN
-    case KBD_SGCN:
-        sgcn_release();
-        break;
-#endif
     default:
         break;
     }

 /trunk/kernel/arch/sparc64/src/mm/cache.S
 ,3 → 47,45
     retl
     ! beware SF Erratum #51, do not put the MEMBAR here
     nop
+/** Flush only D-cache lines of one virtual color.
+ *
+ * @param o0    Virtual color to be flushed.
+ */
+.global dcache_flush_color
+dcache_flush_color:
+    mov (DCACHE_SIZE / DCACHE_LINE_SIZE) / 2, %g1
+    set DCACHE_SIZE / 2, %g2
+    sllx %g2, %o0, %g2
+    sub %g2, DCACHE_LINE_SIZE, %g2
+:  stxa %g0, [%g2] ASI_DCACHE_TAG
+    membar #Sync
+    subcc %g1, 1, %g1
+    bnz,pt %xcc, 0b
+    sub %g2, DCACHE_LINE_SIZE, %g2
+    retl
+    nop
+/** Flush only D-cache lines of one virtual color and one tag.
+ *
+ * @param o0    Virtual color to lookup the tag.
+ * @param o1    Tag of the cachelines to be flushed.
+ */
+.global dcache_flush_tag
+dcache_flush_tag:
+    mov (DCACHE_SIZE / DCACHE_LINE_SIZE) / 2, %g1
+    set DCACHE_SIZE / 2, %g2
+    sllx %g2, %o0, %g2
+    sub %g2, DCACHE_LINE_SIZE, %g2
+:  ldxa [%g2] ASI_DCACHE_TAG, %g3
+    srlx %g3, DCACHE_TAG_SHIFT, %g3
+    cmp %g3, %o1
+    bnz 1f
+    nop
+    stxa %g0, [%g2] ASI_DCACHE_TAG
+    membar #Sync
+:  subcc %g1, 1, %g1
+    bnz,pt %xcc, 0b
+    sub %g2, DCACHE_LINE_SIZE, %g2
+    retl
+    nop

 /trunk/kernel/arch/sparc64/src/mm/as.c
 ,25 → 164,7
     itsb_base_write(tsb_base.value);
     tsb_base.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH;
     dtsb_base_write(tsb_base.value);
-#if defined (US3)
-    /*
-     * Clear the extension registers.
-     * In HelenOS, primary and secondary context registers contain
-     * equal values and kernel misses (context 0, ie. the nucleus context)
-     * are excluded from the TSB miss handler, so it makes no sense
-     * to have separate TSBs for primary, secondary and nucleus contexts.
-     * Clearing the extension registers will ensure that the value of the
-     * TSB Base register will be used as an address of TSB, making the code
-     * compatible with the US port.
-     */
-    itsb_primary_extension_write(0);
-    itsb_nucleus_extension_write(0);
-    dtsb_primary_extension_write(0);
-    dtsb_secondary_extension_write(0);
-    dtsb_nucleus_extension_write(0);
 #endif
-#endif
 }
 /** Perform sparc64-specific tasks when an address space is removed from the

 /trunk/kernel/arch/sparc64/src/mm/tlb.c
 ,13 → 54,14
 #include <arch/mm/tsb.h>
 #endif
-static void dtlb_pte_copy(pte_t *, index_t, bool);
-static void itlb_pte_copy(pte_t *, index_t);
-static void do_fast_instruction_access_mmu_miss_fault(istate_t *, const char *);
-static void do_fast_data_access_mmu_miss_fault(istate_t *, tlb_tag_access_reg_t,
-    const char *);
-static void do_fast_data_access_protection_fault(istate_t *,
-    tlb_tag_access_reg_t, const char *);
+static void dtlb_pte_copy(pte_t *t, index_t index, bool ro);
+static void itlb_pte_copy(pte_t *t, index_t index);
+static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate,
+    const char *str);
+static void do_fast_data_access_mmu_miss_fault(istate_t *istate,
+    tlb_tag_access_reg_t tag, const char *str);
+static void do_fast_data_access_protection_fault(istate_t *istate,
+    tlb_tag_access_reg_t tag, const char *str);
 char *context_encoding[] = {
     "Primary",
 ,11 → 86,11
 /** Insert privileged mapping into DMMU TLB.
  *
- * @param page      Virtual page address.
- * @param frame     Physical frame address.
- * @param pagesize  Page size.
- * @param locked    True for permanent mappings, false otherwise.
- * @param cacheable True if the mapping is cacheable, false otherwise.
+ * @param page Virtual page address.
+ * @param frame Physical frame address.
+ * @param pagesize Page size.
+ * @param locked True for permanent mappings, false otherwise.
+ * @param cacheable True if the mapping is cacheable, false otherwise.
  */
 void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize,
     bool locked, bool cacheable)
 ,7 → 103,7
     pg.address = page;
     fr.address = frame;
-    tag.context = ASID_KERNEL;
+    tag.value = ASID_KERNEL;
     tag.vpn = pg.vpn;
     dtlb_tag_access_write(tag.value);
 ,10 → 126,10
 /** Copy PTE to TLB.
  *
- * @param t         Page Table Entry to be copied.
- * @param index     Zero if lower 8K-subpage, one if higher 8K-subpage.
- * @param ro        If true, the entry will be created read-only, regardless
- *          of its w field.
+ * @param t     Page Table Entry to be copied.
+ * @param index Zero if lower 8K-subpage, one if higher 8K-subpage.
+ * @param ro    If true, the entry will be created read-only, regardless of its
+ *      w field.
  */
 void dtlb_pte_copy(pte_t *t, index_t index, bool ro)
 {
 ,8 → 165,8
 /** Copy PTE to ITLB.
  *
- * @param t     Page Table Entry to be copied.
- * @param index     Zero if lower 8K-subpage, one if higher 8K-subpage.
+ * @param t     Page Table Entry to be copied.
+ * @param index Zero if lower 8K-subpage, one if higher 8K-subpage.
  */
 void itlb_pte_copy(pte_t *t, index_t index)
 {
 ,11 → 235,10
  * Note that some faults (e.g. kernel faults) were already resolved by the
  * low-level, assembly language part of the fast_data_access_mmu_miss handler.
  *
- * @param tag       Content of the TLB Tag Access register as it existed
- *          when the trap happened. This is to prevent confusion
- *          created by clobbered Tag Access register during a nested
- *          DTLB miss.
- * @param istate    Interrupted state saved on the stack.
+ * @param tag Content of the TLB Tag Access register as it existed when the
+ *    trap happened. This is to prevent confusion created by clobbered
+ *    Tag Access register during a nested DTLB miss.
+ * @param istate Interrupted state saved on the stack.
  */
 void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate)
 {
 ,11 → 287,10
 /** DTLB protection fault handler.
  *
- * @param tag       Content of the TLB Tag Access register as it existed
- *          when the trap happened. This is to prevent confusion
- *          created by clobbered Tag Access register during a nested
- *          DTLB miss.
- * @param istate    Interrupted state saved on the stack.
+ * @param tag Content of the TLB Tag Access register as it existed when the
+ *    trap happened. This is to prevent confusion created by clobbered
+ *    Tag Access register during a nested DTLB miss.
+ * @param istate Interrupted state saved on the stack.
  */
 void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate)
 {
 ,26 → 331,6
     }
 }
-/** Print TLB entry (for debugging purposes).
- *
- * The diag field has been left out in order to make this function more generic
- * (there is no diag field in US3 architeture).
- *
- * @param i     TLB entry number
- * @param t     TLB entry tag
- * @param d     TLB entry data
- */
-static void print_tlb_entry(int i, tlb_tag_read_reg_t t, tlb_data_t d)
-{
-    printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
-        "ie=%d, soft2=%#x, pfn=%#x, soft=%#x, l=%d, "
-        "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
-        t.context, d.v, d.size, d.nfo, d.ie, d.soft2,
-        d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
-}
-#if defined (US)
 /** Print contents of both TLBs. */
 void tlb_print(void)
 {
 ,7 → 342,12
     for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
         d.value = itlb_data_access_read(i);
         t.value = itlb_tag_read_read(i);
-        print_tlb_entry(i, t, d);
+        printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
+            "ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, "
+            "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
+            t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag,
+            d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
     }
     printf("D-TLB contents:\n");
 ,57 → 354,16
     for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
         d.value = dtlb_data_access_read(i);
         t.value = dtlb_tag_read_read(i);
-        print_tlb_entry(i, t, d);
+        printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
+            "ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, "
+            "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
+            t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag,
+            d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
     }
-}
-#elif defined (US3)
-/** Print contents of all TLBs. */
-void tlb_print(void)
-{
-    int i;
-    tlb_data_t d;
-    tlb_tag_read_reg_t t;
-    printf("TLB_ISMALL contents:\n");
-    for (i = 0; i < tlb_ismall_size(); i++) {
-        d.value = dtlb_data_access_read(TLB_ISMALL, i);
-        t.value = dtlb_tag_read_read(TLB_ISMALL, i);
-        print_tlb_entry(i, t, d);
-    }
-    printf("TLB_IBIG contents:\n");
-    for (i = 0; i < tlb_ibig_size(); i++) {
-        d.value = dtlb_data_access_read(TLB_IBIG, i);
-        t.value = dtlb_tag_read_read(TLB_IBIG, i);
-        print_tlb_entry(i, t, d);
-    }
-    printf("TLB_DSMALL contents:\n");
-    for (i = 0; i < tlb_dsmall_size(); i++) {
-        d.value = dtlb_data_access_read(TLB_DSMALL, i);
-        t.value = dtlb_tag_read_read(TLB_DSMALL, i);
-        print_tlb_entry(i, t, d);
-    }
-    printf("TLB_DBIG_1 contents:\n");
-    for (i = 0; i < tlb_dbig_size(); i++) {
-        d.value = dtlb_data_access_read(TLB_DBIG_0, i);
-        t.value = dtlb_tag_read_read(TLB_DBIG_0, i);
-        print_tlb_entry(i, t, d);
-    }
-    printf("TLB_DBIG_2 contents:\n");
-    for (i = 0; i < tlb_dbig_size(); i++) {
-        d.value = dtlb_data_access_read(TLB_DBIG_1, i);
-        t.value = dtlb_tag_read_read(TLB_DBIG_1, i);
-        print_tlb_entry(i, t, d);
-    }
 }
-#endif
 void do_fast_instruction_access_mmu_miss_fault(istate_t *istate,
     const char *str)
 {
 ,71 → 411,30
     sfsr.value = dtlb_sfsr_read();
     sfar = dtlb_sfar_read();
-#if defined (US)
     printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, "
         "fv=%d\n", sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w,
         sfsr.ow, sfsr.fv);
-#elif defined (US3)
-    printf("DTLB SFSR: nf=%d, asi=%#x, tm=%d, ft=%#x, e=%d, ct=%d, pr=%d, "
-        "w=%d, ow=%d, fv=%d\n", sfsr.nf, sfsr.asi, sfsr.tm, sfsr.ft,
-        sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv);
-#endif
     printf("DTLB SFAR: address=%p\n", sfar);
     dtlb_sfsr_write(0);
 }
-#if defined (US3)
-/** Invalidates given TLB entry if and only if it is non-locked or global.
- *
- * @param tlb       TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1,
- *          TLB_ISMALL, TLB_IBIG).
- * @param entry     Entry index within the given TLB.
- */
-static void tlb_invalidate_entry(int tlb, index_t entry)
+/** Invalidate all unlocked ITLB and DTLB entries. */
+void tlb_invalidate_all(void)
 {
+    int i;
     tlb_data_t d;
     tlb_tag_read_reg_t t;
-    if (tlb == TLB_DSMALL || tlb == TLB_DBIG_0 || tlb == TLB_DBIG_1) {
-        d.value = dtlb_data_access_read(tlb, entry);
-        if (!d.l || d.g) {
-            t.value = dtlb_tag_read_read(tlb, entry);
-            d.v = false;
-            dtlb_tag_access_write(t.value);
-            dtlb_data_access_write(tlb, entry, d.value);
-        }
-    } else if (tlb == TLB_ISMALL || tlb == TLB_IBIG) {
-        d.value = itlb_data_access_read(tlb, entry);
-        if (!d.l || d.g) {
-            t.value = itlb_tag_read_read(tlb, entry);
-            d.v = false;
-            itlb_tag_access_write(t.value);
-            itlb_data_access_write(tlb, entry, d.value);
-        }
-    }
-}
-#endif
-/** Invalidate all unlocked ITLB and DTLB entries. */
-void tlb_invalidate_all(void)
-{
-    int i;
     /*
      * Walk all ITLB and DTLB entries and remove all unlocked mappings.
      *
      * The kernel doesn't use global mappings so any locked global mappings
-     * found must have been created by someone else. Their only purpose now
+     * found  must have been created by someone else. Their only purpose now
      * is to collide with proper mappings. Invalidate immediately. It should
      * be safe to invalidate them as late as now.
      */
-#if defined (US)
-    tlb_data_t d;
-    tlb_tag_read_reg_t t;
     for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
         d.value = itlb_data_access_read(i);
         if (!d.l || d.g) {
 ,7 → 444,7
             itlb_data_access_write(i, d.value);
         }
     }
     for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
         d.value = dtlb_data_access_read(i);
         if (!d.l || d.g) {
 ,21 → 454,7
             dtlb_data_access_write(i, d.value);
         }
     }
-#elif defined (US3)
-    for (i = 0; i < tlb_ismall_size(); i++)
-        tlb_invalidate_entry(TLB_ISMALL, i);
-    for (i = 0; i < tlb_ibig_size(); i++)
-        tlb_invalidate_entry(TLB_IBIG, i);
-    for (i = 0; i < tlb_dsmall_size(); i++)
-        tlb_invalidate_entry(TLB_DSMALL, i);
-    for (i = 0; i < tlb_dbig_size(); i++)
-        tlb_invalidate_entry(TLB_DBIG_0, i);
-    for (i = 0; i < tlb_dbig_size(); i++)
-        tlb_invalidate_entry(TLB_DBIG_1, i);
-#endif
 }
 /** Invalidate all ITLB and DTLB entries that belong to specified ASID
 ,9 → 484,9
 /** Invalidate all ITLB and DTLB entries for specified page range in specified
  * address space.
  *
- * @param asid      Address Space ID.
- * @param page      First page which to sweep out from ITLB and DTLB.
- * @param cnt       Number of ITLB and DTLB entries to invalidate.
+ * @param asid Address Space ID.
+ * @param page First page which to sweep out from ITLB and DTLB.
+ * @param cnt Number of ITLB and DTLB entries to invalidate.
  */
 void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
 {

 /trunk/kernel/arch/sparc64/src/mm/page.c
 ,7 → 52,7
     uintptr_t virt_page;
     uintptr_t phys_page;
     int pagesize_code;
-} bsp_locked_dtlb_entry[DTLB_MAX_LOCKED_ENTRIES];
+} bsp_locked_dtlb_entry[DTLB_ENTRY_COUNT];
 /** Number of entries in bsp_locked_dtlb_entry array. */
 static count_t bsp_locked_dtlb_entries = 0;
 ,4 → 166,3
 /** @}
  */

 /trunk/kernel/arch/sparc64/src/mm/tsb.c
 ,9 → 112,9
     tsb->data.value = 0;
     tsb->data.size = PAGESIZE_8K;
     tsb->data.pfn = (t->frame >> MMU_FRAME_WIDTH) + index;
-    tsb->data.cp = t->c;    /* cp as cache in phys.-idxed, c as cacheable */
-    tsb->data.p = t->k; /* p as privileged, k as kernel */
-    tsb->data.v = t->p; /* v as valid, p as present */
+    tsb->data.cp = t->c;
+    tsb->data.p = t->k;     /* p as privileged */
+    tsb->data.v = t->p;
     write_barrier();
 ,4 → 173,3
 /** @}
  */

 /trunk/kernel/arch/sparc64/src/smp/smp.c
 ,7 → 35,6
 #include <smp/smp.h>
 #include <genarch/ofw/ofw_tree.h>
 #include <cpu.h>
-#include <arch/cpu_family.h>
 #include <arch/cpu.h>
 #include <arch.h>
 #include <config.h>
 ,7 → 43,6
 #include <synch/synch.h>
 #include <synch/waitq.h>
 #include <print.h>
-#include <arch/cpu_node.h>
 /**
  * This global variable is used to pick-up application processors
 ,55 → 61,15
     ofw_tree_node_t *node;
     count_t cnt = 0;
-    if (is_us() || is_us_iii()) {
-        node = ofw_tree_find_child_by_device_type(cpus_parent(), "cpu");
-        while (node) {
-            cnt++;
-            node = ofw_tree_find_peer_by_device_type(node, "cpu");
-        }
-    } else if (is_us_iv()) {
-        node = ofw_tree_find_child(cpus_parent(), "cmp");
-        while (node) {
-            cnt += 2;
-            node = ofw_tree_find_peer_by_name(node, "cmp");
-        }
+    node = ofw_tree_find_child_by_device_type(ofw_tree_lookup("/"), "cpu");
+    while (node) {
+        cnt++;
+        node = ofw_tree_find_peer_by_device_type(node, "cpu");
     }
     config.cpu_count = max(1, cnt);
 }
-/**
- * Wakes up the CPU which is represented by the "node" OFW tree node.
- * If "node" represents the current CPU, calling the function has
- * no effect.
- */
-static void wakeup_cpu(ofw_tree_node_t *node)
-{
-    uint32_t mid;
-    ofw_tree_property_t *prop;
-    /* 'upa-portid' for US, 'portid' for US-III, 'cpuid' for US-IV */
-    prop = ofw_tree_getprop(node, "upa-portid");
-    if ((!prop) || (!prop->value))
-        prop = ofw_tree_getprop(node, "portid");
-    if ((!prop) || (!prop->value))
-        prop = ofw_tree_getprop(node, "cpuid");
-    if (!prop || prop->value == NULL)
-        return;
-    mid = *((uint32_t *) prop->value);
-    if (CPU->arch.mid == mid)
-        return;
-    waking_up_mid = mid;
-    if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) ==
-        ESYNCH_TIMEOUT)
-        printf("%s: waiting for processor (mid = %" PRIu32
-            ") timed out\n", __func__, mid);
-}
 /** Wake application processors up. */
 void kmp(void *arg)
 {
 ,18 → 76,31
     ofw_tree_node_t *node;
     int i;
-    if (is_us() || is_us_iii()) {
-        node = ofw_tree_find_child_by_device_type(cpus_parent(), "cpu");
-        for (i = 0; node;
-                     node = ofw_tree_find_peer_by_device_type(node, "cpu"), i++)
-            wakeup_cpu(node);
-    } else if (is_us_iv()) {
-        node = ofw_tree_find_child(cpus_parent(), "cmp");
-        while (node) {
-            wakeup_cpu(ofw_tree_find_child(node, "cpu@0"));
-            wakeup_cpu(ofw_tree_find_child(node, "cpu@1"));
-            node = ofw_tree_find_peer_by_name(node, "cmp");
+    node = ofw_tree_find_child_by_device_type(ofw_tree_lookup("/"), "cpu");
+    for (i = 0; node; node = ofw_tree_find_peer_by_device_type(node, "cpu"), i++) {
+        uint32_t mid;
+        ofw_tree_property_t *prop;
+        prop = ofw_tree_getprop(node, "upa-portid");
+        if (!prop || !prop->value)
+            continue;
+        mid = *((uint32_t *) prop->value);
+        if (CPU->arch.mid == mid) {
+            /*
+             * Skip the current CPU.
+             */
+            continue;
         }
+        /*
+         * Processor with ID == mid can proceed with its initialization.
+         */
+        waking_up_mid = mid;
+        if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT)
+            printf("%s: waiting for processor (mid = %" PRIu32 ") timed out\n",
+                __func__, mid);
     }
 }

 /trunk/kernel/arch/sparc64/src/smp/ipi.c
 ,33 → 46,6
 #include <time/delay.h>
 #include <panic.h>
-/** Set the contents of the outgoing interrupt vector data.
- *
- * The first data item (data 0) will be set to the value of func, the
- * rest of the vector will contain zeros.
- *
- * This is a helper function used from within the cross_call function.
- *
- * @param func value the first data item of the vector will be set to
- */
-static inline void set_intr_w_data(void (* func)(void))
-{
-#if defined (US)
-    asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_0, (uintptr_t) func);
-    asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_1, 0);
-    asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_2, 0);
-#elif defined (US3)
-    asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_0, (uintptr_t) func);
-    asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_1, 0);
-    asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_2, 0);
-    asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_3, 0);
-    asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_4, 0);
-    asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_5, 0);
-    asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_6, 0);
-    asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_7, 0);
-#endif
-}
 /** Invoke function on another processor.
  *
  * Currently, only functions without arguments are supported.
 ,13 → 73,14
     if (status & INTR_DISPATCH_STATUS_BUSY)
         panic("Interrupt Dispatch Status busy bit set\n");
-    ASSERT(!(pstate_read() & PSTATE_IE_BIT));
     do {
-        set_intr_w_data(func);
-        asi_u64_write(ASI_INTR_W,
+        asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_0,
+            (uintptr_t) func);
+        asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_1, 0);
+        asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_2, 0);
+        asi_u64_write(ASI_UDB_INTR_W,
             (mid << INTR_VEC_DISPATCH_MID_SHIFT) |
-            VA_INTR_W_DISPATCH, 0);
+            ASI_UDB_INTR_W_DISPATCH, 0);
         membar();

 /trunk/kernel/arch/sparc64/src/cpu/cpu.c
 ,46 → 32,12
 /** @file
  */
-#include <arch/cpu_family.h>
 #include <cpu.h>
 #include <arch.h>
 #include <genarch/ofw/ofw_tree.h>
 #include <arch/drivers/tick.h>
 #include <print.h>
-#include <arch/cpu_node.h>
-/**
- * Finds out the clock frequency of the current CPU.
- *
- * @param node  node representing the current CPU in the OFW tree
- * @return  clock frequency if "node" is the current CPU and no error
- *      occurs, -1 if "node" is not the current CPU or on error
- */
-static int find_cpu_frequency(ofw_tree_node_t *node)
-{
-    ofw_tree_property_t *prop;
-    uint32_t mid;
-    /* 'upa-portid' for US, 'portid' for US-III, 'cpuid' for US-IV */
-    prop = ofw_tree_getprop(node, "upa-portid");
-    if ((!prop) || (!prop->value))
-        prop = ofw_tree_getprop(node, "portid");
-    if ((!prop) || (!prop->value))
-        prop = ofw_tree_getprop(node, "cpuid");
-    if (prop && prop->value) {
-        mid = *((uint32_t *) prop->value);
-        if (mid == CPU->arch.mid) {
-            prop = ofw_tree_getprop(node, "clock-frequency");
-            if (prop && prop->value) {
-                return *((uint32_t *) prop->value);
-            }
-        }
-    }
-    return -1;
-}
 /** Perform sparc64 specific initialization of the processor structure for the
  * current processor.
  */
 ,37 → 44,34
 void cpu_arch_init(void)
 {
     ofw_tree_node_t *node;
+    uint32_t mid;
     uint32_t clock_frequency = 0;
+    upa_config_t upa_config;
-    CPU->arch.mid = read_mid();
+    upa_config.value = upa_config_read();
+    CPU->arch.mid = upa_config.mid;
     /*
      * Detect processor frequency.
      */
-    if (is_us() || is_us_iii()) {
-        node = ofw_tree_find_child_by_device_type(cpus_parent(), "cpu");
-        while (node) {
-            int f = find_cpu_frequency(node);
-            if (f != -1)
-                clock_frequency = (uint32_t) f;
-            node = ofw_tree_find_peer_by_device_type(node, "cpu");
+    node = ofw_tree_find_child_by_device_type(ofw_tree_lookup("/"), "cpu");
+    while (node) {
+        ofw_tree_property_t *prop;
+        prop = ofw_tree_getprop(node, "upa-portid");
+        if (prop && prop->value) {
+            mid = *((uint32_t *) prop->value);
+            if (mid == CPU->arch.mid) {
+                prop = ofw_tree_getprop(node,
+                    "clock-frequency");
+                if (prop && prop->value)
+                    clock_frequency = *((uint32_t *)
+                        prop->value);
+            }
         }
-    } else if (is_us_iv()) {
-        node = ofw_tree_find_child(cpus_parent(), "cmp");
-        while (node) {
-            int f;
-            f = find_cpu_frequency(
-                ofw_tree_find_child(node, "cpu@0"));
-            if (f != -1)
-                clock_frequency = (uint32_t) f;
-            f = find_cpu_frequency(
-                ofw_tree_find_child(node, "cpu@1"));
-            if (f != -1)
-                clock_frequency = (uint32_t) f;
-            node = ofw_tree_find_peer_by_name(node, "cmp");
-        }
+        node = ofw_tree_find_peer_by_device_type(node, "cpu");
     }
     CPU->arch.clock_frequency = clock_frequency;
     tick_init();
 }
 ,15 → 124,6
     case IMPL_ULTRASPARCIII:
         impl = "UltraSPARC III";
         break;
-    case IMPL_ULTRASPARCIII_PLUS:
-        impl = "UltraSPARC III+";
-        break;
-    case IMPL_ULTRASPARCIII_I:
-        impl = "UltraSPARC IIIi";
-        break;
-    case IMPL_ULTRASPARCIV:
-        impl = "UltraSPARC IV";
-        break;
     case IMPL_ULTRASPARCIV_PLUS:
         impl = "UltraSPARC IV+";
         break;

 /trunk/kernel/arch/sparc64/src/sparc64.c
 ,7 → 86,7
          * But we only create 128 buckets.
          */
         irq_init(1 << 11, 128);
         standalone_sparc64_console_init();
     }
 }

 /trunk/kernel/arch/sparc64/src/ddi/ddi.c
 ,7 → 41,7
  * Interrupts are disabled and task is locked.
  *
  * @param task Task.
- * @param ioaddr Starting I/O space address.
+ * @param ioaddr Startign I/O space address.
  * @param size Size of the enabled I/O range.
  *
  * @return 0 on success or an error code from errno.h.

 /trunk/kernel/arch/sparc64/src/start.S
 ,7 → 27,6
 #
 #include <arch/arch.h>
-#include <arch/cpu.h>
 #include <arch/regdef.h>
 #include <arch/boot/boot.h>
 #include <arch/stack.h>
 ,16 → 47,6
 #define BSP_FLAG    1
 /*
- * 2^PHYSMEM_ADDR_SIZE is the size of the physical address space on
- * a given processor.
- */
-#if defined (US)
-    #define PHYSMEM_ADDR_SIZE   41
-#elif defined (US3)
-    #define PHYSMEM_ADDR_SIZE   43
-#endif
-/*
  * Here is where the kernel is passed control from the boot loader.
  *
  * The registers are expected to be in this state:
 ,13 → 67,11
     and %o0, %l0, %l7           ! l7 <= bootstrap processor?
     andn %o0, %l0, %l6          ! l6 <= start of physical memory
-    ! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.
+    ! Get bits 40:13 of physmem_base.
     srlx %l6, 13, %l5
+    sllx %l5, 13 + (63 - 40), %l5
+    srlx %l5, 63 - 40, %l5          ! l5 <= physmem_base[40:13]
-    ! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
-    sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
-    srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5
     /*
      * Setup basic runtime environment.
      */
 ,8 → 83,6
                         ! consistent
     wrpr %g0, NWINDOWS - 1, %cleanwin   ! prevent needless clean_window
                         ! traps for kernel
-    wrpr %g0, 0, %wstate            ! use default spill/fill trap
     wrpr %g0, 0, %tl            ! TL = 0, primary context
                         ! register is used
 ,8 → 244,7
     /*
      * Precompute kernel 8K TLB data template.
-     * %l5 contains starting physical address
-     * bits [(PHYSMEM_ADDR_SIZE - 1):13]
+     * %l5 contains starting physical address bits [40:13]
      */
     sethi %hi(kernel_8k_tlb_data_template), %l4
     ldx [%l4 + %lo(kernel_8k_tlb_data_template)], %l3
 ,32 → 282,15
     nop
-:
-#ifdef CONFIG_SMP
     /*
-     * Determine the width of the MID and save its mask to %g3. The width
-     * is
-     *  * 5 for US and US-IIIi,
-     *  * 10 for US3 except US-IIIi.
-     */
-#if defined(US)
-    mov 0x1f, %g3
-#elif defined(US3)
-    mov 0x3ff, %g3
-    rdpr %ver, %g2
-    sllx %g2, 16, %g2
-    srlx %g2, 48, %g2
-    cmp %g2, IMPL_ULTRASPARCIII_I
-    move %xcc, 0x1f, %g3
-#endif
-    /*
      * Read MID from the processor.
      */
-    ldxa [%g0] ASI_ICBUS_CONFIG, %g1
-    srlx %g1, ICBUS_CONFIG_MID_SHIFT, %g1
-    and %g1, %g3, %g1
+:
+    ldxa [%g0] ASI_UPA_CONFIG, %g1
+    srlx %g1, UPA_CONFIG_MID_SHIFT, %g1
+    and %g1, UPA_CONFIG_MID_MASK, %g1
+#ifdef CONFIG_SMP
     /*
      * Active loop for APs until the BSP picks them up. A processor cannot
      * leave the loop until the global variable 'waking_up_mid' equals its

 /trunk/kernel/arch/sparc64/Makefile.inc
 ,18 → 80,6
     DEFS += -DCONFIG_SMP
 endif
-ifeq ($(CONFIG_SGCN),y)
-        DEFS += -DCONFIG_SGCN
-endif
-ifeq ($(MACHINE),us)
-    DEFS += -DUS
-endif
-ifeq ($(MACHINE),us3)
-    DEFS += -DUS3
-endif
 ARCH_SOURCES = \
     arch/$(ARCH)/src/cpu/cpu.c \
     arch/$(ARCH)/src/asm.S \
 ,10 → 106,8
     arch/$(ARCH)/src/drivers/tick.c \
     arch/$(ARCH)/src/drivers/kbd.c \
     arch/$(ARCH)/src/drivers/scr.c \
-    arch/$(ARCH)/src/drivers/sgcn.c \
-    arch/$(ARCH)/src/drivers/pci.c
+    arch/$(ARCH)/src/drivers/pci.c
 ifeq ($(CONFIG_SMP),y)
 ARCH_SOURCES += \
     arch/$(ARCH)/src/smp/ipi.c \

 /trunk/kernel/arch/ia32/src/drivers/vesa.c
 ,15 → 86,7
         panic("Unsupported bits per pixel");
     }
-    fb_properties_t vesa_props = {
-        .addr = vesa_ph_addr,
-        .offset = 0,
-        .x = vesa_width,
-        .y = vesa_height,
-        .scan = vesa_scanline,
-        .visual = visual,
-    };
-    fb_init(&vesa_props);
+    fb_init(vesa_ph_addr, vesa_width, vesa_height, vesa_scanline, visual);
 }
 #endif

 /trunk/kernel/arch/ppc32/src/ppc32.c
 ,15 → 94,7
         default:
             panic("Unsupported bits per pixel");
         }
-        fb_properties_t prop = {
-            .addr = bootinfo.screen.addr,
-            .offset = 0,
-            .x = bootinfo.screen.width,
-            .y = bootinfo.screen.height,
-            .scan = bootinfo.screen.scanline,
-            .visual = visual,
-        };
-        fb_init(&prop);
+        fb_init(bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.scanline, visual);
         /* Initialize IRQ routing */
         irq_init(IRQ_COUNT, IRQ_COUNT);
 ,8 → 103,7
         pic_init(bootinfo.keyboard.addr, PAGE_SIZE);
         /* Initialize I/O controller */
-        cuda_init(device_assign_devno(),
-            bootinfo.keyboard.addr + 0x16000, 2 * PAGE_SIZE);
+        cuda_init(device_assign_devno(), bootinfo.keyboard.addr + 0x16000, 2 * PAGE_SIZE);
         /* Merge all zones to 1 big zone */
         zone_merge_all();
 ,10 → 128,7
 void userspace(uspace_arg_t *kernel_uarg)
 {
-    userspace_asm((uintptr_t) kernel_uarg->uspace_uarg,
-        (uintptr_t) kernel_uarg->uspace_stack +
-        THREAD_STACK_SIZE - SP_DELTA,
-        (uintptr_t) kernel_uarg->uspace_entry);
+    userspace_asm((uintptr_t) kernel_uarg->uspace_uarg, (uintptr_t) kernel_uarg->uspace_stack + THREAD_STACK_SIZE - SP_DELTA, (uintptr_t) kernel_uarg->uspace_entry);
     /* Unreachable */
     for (;;)

 /trunk/kernel/arch/mips32/src/mips32.c
 ,15 → 126,7
     console_init(device_assign_devno());
 #ifdef CONFIG_FB
     /* GXemul framebuffer */
-    fb_properties_t gxemul_prop = {
-        .addr = 0x12000000,
-        .offset = 0,
-        .x = 640,
-        .y = 480,
-        .scan = 1920,
-        .visual = VISUAL_RGB_8_8_8,
-    };
-    fb_init(&gxemul_prop);
+    fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8);
 #endif
     sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1);
 }

 /trunk/kernel/arch/arm32/src/arm32.c
 ,15 → 86,7
     console_init(device_assign_devno());
 #ifdef CONFIG_FB
-    fb_properties_t prop = {
-        .addr = machine_get_fb_address(),
-        .offset = 0,
-        .x = 640,
-        .y = 480,
-        .scan = 1920,
-        .visual = VISUAL_RGB_8_8_8,
-    };
-    fb_init(&prop);
+    fb_init(machine_get_fb_address(), 640, 480, 1920, VISUAL_RGB_8_8_8);
 #endif
 }

 /trunk/boot/arch/sparc64/loader/main.c
 ,7 → 39,6
 #include <string.h>
 bootinfo_t bootinfo;
 component_t components[COMPONENTS];
 char *release = RELEASE;
 ,15 → 55,6
     char *timestamp = "";
 #endif
-/** UltraSPARC subarchitecture - 1 for US, 3 for US3 */
-uint8_t subarchitecture;
-/**
- * mask of the MID field inside the ICBUS_CONFIG register shifted by
- * MID_SHIFT bits to the right
- */
-uint16_t mid_mask;
 /** Print version information. */
 static void version_print(void)
 {
 ,39 → 63,6
         release, revision, timestamp);
 }
-/* the lowest ID (read from the VER register) of some US3 CPU model */
-#define FIRST_US3_CPU   0x14
-/* the greatest ID (read from the VER register) of some US3 CPU model */
-#define LAST_US3_CPU    0x19
-/* UltraSPARC IIIi processor implementation code */
-#define US_IIIi_CODE    0x15
-/**
- * Sets the global variables "subarchitecture" and "mid_mask" to
- * correct values.
- */
-static void detect_subarchitecture(void)
-{
-    uint64_t v;
-    asm volatile ("rdpr %%ver, %0\n" : "=r" (v));
-    v = (v << 16) >> 48;
-    if ((v >= FIRST_US3_CPU) && (v <= LAST_US3_CPU)) {
-        subarchitecture = SUBARCH_US3;
-        if (v == US_IIIi_CODE)
-            mid_mask = (1 << 5) - 1;
-        else
-            mid_mask = (1 << 10) - 1;
-    } else if (v < FIRST_US3_CPU) {
-        subarchitecture = SUBARCH_US;
-        mid_mask = (1 << 5) - 1;
-    } else {
-        printf("\nThis CPU is not supported by HelenOS.");
-    }
-}
 void bootstrap(void)
 {
     void *base = (void *) KERNEL_VIRTUAL_ADDRESS;
 ,7 → 72,6
     version_print();
-    detect_subarchitecture();
     init_components(components);
     if (!ofw_get_physmem_start(&bootinfo.physmem_start)) {
 ,7 → 83,7
         printf("Error: unable to get memory map, halting.\n");
         halt();
     }
     if (bootinfo.memmap.total == 0) {
         printf("Error: no memory detected, halting.\n");
         halt();

 /trunk/boot/arch/sparc64/loader/main.h
 ,9 → 41,6
 #define BSP_PROCESSOR   1
 #define AP_PROCESSOR    0
-#define SUBARCH_US  1
-#define SUBARCH_US3 3
 typedef struct {
     void *addr;
     uint32_t size;

 /trunk/boot/arch/sparc64/loader/asm.S
 ,28 → 105,9
      * 1. Make sure that the code we have moved has drained to main memory.
      * 2. Invalidate I-cache.
      * 3. Flush instruction pipeline.
-     */
-    /*
-     * US3 processors have a write-invalidate cache, so explicitly
-     * invalidating it is not required. Whether to invalidate I-cache
-     * or not is decided according to the value of the global
-     * "subarchitecture" variable (set in the bootstrap).
-     */
-    set subarchitecture, %g2
-    ldub [%g2], %g2
-    cmp %g2, 3
-    be 1f
-    nop
-:
-    call icache_flush
-    nop
-:
-    membar #StoreStore
-    /*
-     * Flush the instruction pipeline.
-     */
+     */
+    call    icache_flush
+    membar  #StoreStore
     flush   %i7
     mov %o0, %l1
 ,6 → 134,7
     retl
     ! SF Erratum #51
     nop
 .global ofw
 ofw:
     save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp

 /trunk/boot/arch/sparc64/loader/ofwarch.c
 ,10 → 40,6
 #include "main.h"
 #include "asm.h"
-/* these tho variables will be set by the detect_subarchitecture function */
-extern uint8_t subarchitecture;
-extern uint16_t mid_mask;
 void write(const char *str, const int len)
 {
     int i;
 ,40 → 56,36
     return flag != -1;
 }
-/**
- * Starts all CPUs represented by following siblings of the given node,
- * except for the current CPU.
- *
- * @param child     The first child of the OFW tree node whose children
- *          represent CPUs to be woken up.
- * @param current_mid   MID of the current CPU, the current CPU will
- *          (of course) not be woken up.
- * @return      Number of CPUs which have the same parent node as
- *          "child".
- */
-static int wake_cpus_in_node(phandle child, uint64_t current_mid)
+int ofw_cpu(void)
 {
-    int cpus;
     char type_name[BUF_SIZE];
+    phandle node;
+    node = ofw_get_child_node(ofw_root);
+    if (node == 0 || node == -1) {
+        printf("Could not find any child nodes of the root node.\n");
+        return 0;
+    }
-    for (cpus = 0; child != 0 && child != -1;
-        child = ofw_get_peer_node(child), cpus++) {
-        if (ofw_get_property(child, "device_type", type_name,
+    uint64_t current_mid;
+    asm volatile ("ldxa [%1] %2, %0\n"
+        : "=r" (current_mid)
+        : "r" (0), "i" (ASI_UPA_CONFIG));
+    current_mid >>= UPA_CONFIG_MID_SHIFT;
+    current_mid &= UPA_CONFIG_MID_MASK;
+    int cpus;
+    for (cpus = 0; node != 0 && node != -1; node = ofw_get_peer_node(node),
+        cpus++) {
+        if (ofw_get_property(node, "device_type", type_name,
             sizeof(type_name)) > 0) {
             if (strcmp(type_name, "cpu") == 0) {
                 uint32_t mid;
-                /*
-                 * "upa-portid" for US, "portid" for US-III,
-                 * "cpuid" for US-IV
-                 */
-                if (ofw_get_property(
-                    child, "upa-portid",
-                    &mid, sizeof(mid)) <= 0
-                    && ofw_get_property(child, "portid",
-                    &mid, sizeof(mid)) <= 0
-                    && ofw_get_property(child, "cpuid",
-                    &mid, sizeof(mid)) <= 0)
+                if (ofw_get_property(node, "upa-portid", &mid,
+                    sizeof(mid)) <= 0)
                     continue;
                 if (current_mid != mid) {
 ,7 → 93,7
                      * Start secondary processor.
                      */
                     (void) ofw_call("SUNW,start-cpu", 3, 1,
-                        NULL, child, KERNEL_VIRTUAL_ADDRESS,
+                        NULL, node, KERNEL_VIRTUAL_ADDRESS,
                         bootinfo.physmem_start |
                         AP_PROCESSOR);
                 }
 ,59 → 104,12
     return cpus;
 }
-/**
- * Finds out the current CPU's MID and wakes up all AP processors.
- */
-int ofw_cpu(void)
-{
-    int cpus;
-    phandle node;
-    phandle subnode;
-    phandle cpus_parent;
-    phandle cmp;
-    char name[BUF_SIZE];
-    /* get the current CPU MID */
-    uint64_t current_mid;
-    asm volatile ("ldxa [%1] %2, %0\n"
-        : "=r" (current_mid)
-        : "r" (0), "i" (ASI_ICBUS_CONFIG));
-    current_mid >>= ICBUS_CONFIG_MID_SHIFT;
-    current_mid &= mid_mask;
-    /* wake up CPUs */
-    cpus_parent = ofw_find_device("/ssm@0,0");
-    if (cpus_parent == 0 || cpus_parent == -1) {
-        cpus_parent = ofw_find_device("/");
-    }
-    node = ofw_get_child_node(cpus_parent);
-    cpus = wake_cpus_in_node(node, current_mid);
-    while (node != 0 && node != -1) {
-        if (ofw_get_property(node, "name", name,
-            sizeof(name)) > 0) {
-            if (strcmp(name, "cmp") == 0) {
-                subnode = ofw_get_child_node(node);
-                cpus += wake_cpus_in_node(subnode,
-                    current_mid);
-            }
-        }
-        node = ofw_get_peer_node(node);
-    }
-    return cpus;
-}
 /** Get physical memory starting address.
  *
- * @param start     Pointer to variable where the physical memory starting
- *          address will be stored.
+ * @param start Pointer to variable where the physical memory starting
+ *      address will be stored.
  *
- * @return      Non-zero on succes, zero on failure.
+ * @return Non-zero on succes, zero on failure.
  */
 int ofw_get_physmem_start(uintptr_t *start)
 {

 /trunk/boot/arch/sparc64/loader/register.h
 ,7 → 33,8
 #define PSTATE_PRIV_BIT 4
 #define PSTATE_AM_BIT   8
-#define ASI_ICBUS_CONFIG        0x4a
-#define ICBUS_CONFIG_MID_SHIFT      17
+#define ASI_UPA_CONFIG          0x4a
+#define UPA_CONFIG_MID_SHIFT    17
+#define UPA_CONFIG_MID_MASK     0x1f
 #endif

 /trunk/boot/arch/sparc64/Makefile.inc
 ,14 → 28,6
 TMP = distroot
-ifeq ($(CONFIG_AOUT_ISOFS_B),n)
-    SILO_PACKAGE=silo.patched.tar.gz
-endif
-ifeq ($(CONFIG_AOUT_ISOFS_B),y)
-    SILO_PACKAGE=silo.tar.gz
-endif
 build: $(BASE)/image.iso
 ifeq ($(CONFIG_RD_EXTERNAL),y)
 ,7 → 39,7
 $(BASE)/image.iso: depend arch/$(ARCH)/loader/image.boot
     mkdir -p $(TMP)/boot
     mkdir -p $(TMP)/HelenOS
-    cat arch/$(ARCH)/silo/$(SILO_PACKAGE) | (cd $(TMP)/boot; tar xvfz -)
+    cat arch/$(ARCH)/silo/silo.tar.gz | (cd $(TMP)/boot; tar xvfz -)
     cp arch/$(ARCH)/silo/README arch/$(ARCH)/silo/COPYING $(TMP)/boot
     cat arch/$(ARCH)/silo/silo.conf | $(SILO_CONF_FILTER) >$(TMP)/boot/silo.conf
     cp arch/$(ARCH)/loader/image.boot $(TMP)/HelenOS/image.boot

/trunk/boot/arch/sparc64/silo/silo.patched.tar.gz
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Deleted: svn:mime-type
-application/octet-stream
\ No newline at end of property

 /trunk/boot/arch/ppc64/Makefile.inc
 ,8 → 26,6
 # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
-DEFS += -DOPEN_BOOT
 build: $(BASE)/image.boot
 $(BASE)/image.boot: depend arch/$(ARCH)/loader/image.boot
 ,7 → 35,7
     -rm arch/$(ARCH)/loader/image.boot
 arch/$(ARCH)/loader/image.boot:
-    make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) "DEFS=$(DEFS)"
+    make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)
 clean: generic_clean
     make -C arch/$(ARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR)

 /trunk/boot/boot.config
 ,8 → 83,5
 @ "fat" FAT16 image
 ! RDFMT (choice)
-# Preserve A.OUT header in isofs.b
-! [ARCH=sparc64] CONFIG_AOUT_ISOFS_B (y/n)
 # External ramdisk
 ! [ARCH=sparc64] CONFIG_RD_EXTERNAL (y/n)

 /trunk/boot/genarch/balloc.h
 ,7 → 31,7
 #include <types.h>
-#define BALLOC_MAX_SIZE     (128 * 1024)
+#define BALLOC_MAX_SIZE     (1024 * 1024)
 typedef struct {
     uintptr_t base;

 /trunk/boot/genarch/ofw.c
 ,8 → 48,7
     if (ofw_chosen == -1)
         halt();
-    if (ofw_get_property(ofw_chosen, "stdout", &ofw_stdout,
-        sizeof(ofw_stdout)) <= 0)
+    if (ofw_get_property(ofw_chosen, "stdout", &ofw_stdout, sizeof(ofw_stdout)) <= 0)
         ofw_stdout = 0;
     ofw_root = ofw_find_device("/");
 ,13 → 57,11
         halt();
     }
-    if (ofw_get_property(ofw_chosen, "mmu", &ofw_mmu,
-        sizeof(ofw_mmu)) <= 0) {
+    if (ofw_get_property(ofw_chosen, "mmu", &ofw_mmu, sizeof(ofw_mmu)) <= 0) {
         puts("\r\nError: Unable to get mmu property, halted.\r\n");
         halt();
     }
-    if (ofw_get_property(ofw_chosen, "memory", &ofw_memory_prop,
-        sizeof(ofw_memory_prop)) <= 0) {
+    if (ofw_get_property(ofw_chosen, "memory", &ofw_memory_prop, sizeof(ofw_memory_prop)) <= 0) {
         puts("\r\nError: Unable to get memory property, halted.\r\n");
         halt();
     }
 ,18 → 81,14
 /** Perform a call to OpenFirmware client interface.
  *
- * @param service   String identifying the service requested.
- * @param nargs     Number of input arguments.
- * @param nret      Number of output arguments. This includes the return
- *          value.
- * @param rets      Buffer for output arguments or NULL. The buffer must
- *          accommodate nret - 1 items.
+ * @param service String identifying the service requested.
+ * @param nargs Number of input arguments.
+ * @param nret Number of output arguments. This includes the return value.
+ * @param rets Buffer for output arguments or NULL. The buffer must accommodate nret - 1 items.
  *
- * @return      Return value returned by the client interface.
+ * @return Return value returned by the client interface.
  */
-unsigned long
-ofw_call(const char *service, const int nargs, const int nret, ofw_arg_t *rets,
-    ...)
+unsigned long ofw_call(const char *service, const int nargs, const int nret, ofw_arg_t *rets, ...)
 {
     va_list list;
     ofw_args_t args;
 ,9 → 119,7
     return ofw_call("finddevice", 1, 1, NULL, name);
 }
-int
-ofw_get_property(const phandle device, const char *name, void *buf,
-    const int buflen)
+int ofw_get_property(const phandle device, const char *name, void *buf, const int buflen)
 {
     return ofw_call("getprop", 4, 1, NULL, device, name, buf, buflen);
 }
 ,8 → 144,7
     unsigned int ret = 1;
     if (ofw_get_property(device, "#address-cells", &ret, sizeof(ret)) <= 0)
-        if (ofw_get_property(ofw_root, "#address-cells", &ret,
-            sizeof(ret)) <= 0)
+        if (ofw_get_property(ofw_root, "#address-cells", &ret, sizeof(ret)) <= 0)
             ret = OFW_ADDRESS_CELLS;
     return ret;
 ,8 → 156,7
     unsigned int ret;
     if (ofw_get_property(device, "#size-cells", &ret, sizeof(ret)) <= 0)
-        if (ofw_get_property(ofw_root, "#size-cells", &ret,
-            sizeof(ret)) <= 0)
+        if (ofw_get_property(ofw_root, "#size-cells", &ret, sizeof(ret)) <= 0)
             ret = OFW_SIZE_CELLS;
     return ret;
 ,8 → 192,7
     ofw_arg_t result[4];
     int shift;
-    if (ofw_call("call-method", 3, 5, result, "translate", ofw_mmu,
-        virt) != 0) {
+    if (ofw_call("call-method", 3, 5, result, "translate", ofw_mmu, virt) != 0) {
         puts("Error: MMU method translate() failed, halting.\n");
         halt();
     }
 ,8 → 212,7
 {
     ofw_arg_t retaddr;
-    if (ofw_call("call-method", 5, 2, &retaddr, "claim", ofw_mmu, 0, len,
-        virt) != 0) {
+    if (ofw_call("call-method", 5, 2, &retaddr, "claim", ofw_mmu, 0, len, virt) != 0) {
         puts("Error: MMU method claim() failed, halting.\n");
         halt();
     }
 ,8 → 269,8
         phys_lo = (uintptr_t) phys;
     }
-    return ofw_call("call-method", 7, 1, NULL, "map", ofw_mmu, mode, size,
-        virt, phys_hi, phys_lo);
+    return ofw_call("call-method", 7, 1, NULL, "map", ofw_mmu, mode, size, virt,
+        phys_hi, phys_lo);
 }
 /** Save OpenFirmware physical memory map.
 ,13 → 281,10
  */
 int ofw_memmap(memmap_t *map)
 {
-    unsigned int ac = ofw_get_address_cells(ofw_memory) /
-        (sizeof(uintptr_t) / sizeof(uint32_t));
-    unsigned int sc = ofw_get_size_cells(ofw_memory) /
-        (sizeof(uintptr_t) / sizeof(uint32_t));
-    printf("address cells: %d, size cells: %d. ", ac, sc);
+    unsigned int ac = ofw_get_address_cells(ofw_memory);
+    unsigned int sc = ofw_get_size_cells(ofw_memory);
-    uintptr_t buf[((ac + sc) * MEMMAP_MAX_RECORDS)];
+    uint32_t buf[((ac + sc) * MEMMAP_MAX_RECORDS)];
     int ret = ofw_get_property(ofw_memory, "reg", buf, sizeof(buf));
     if (ret <= 0)       /* ret is the number of written bytes */
         return false;
 ,22 → 292,11
     int pos;
     map->total = 0;
     map->count = 0;
-    for (pos = 0; (pos < ret / sizeof(uintptr_t)) &&
+    for (pos = 0; (pos < ret / sizeof(uint32_t)) &&
         (map->count < MEMMAP_MAX_RECORDS); pos += ac + sc) {
-        void *start = (void *) (buf[pos + ac - 1]);
+        void * start = (void *) ((uintptr_t) buf[pos + ac - 1]);
         unsigned int size = buf[pos + ac + sc - 1];
-        /*
-         * This is a hot fix of the issue which occurs on machines
-         * where there are holes in the physical memory (such as
-         * SunBlade 1500). Should we detect a hole in the physical
-         * memory, we will ignore any memory detected behind
-         * the hole and pretend the hole does not exist.
-         */
-        if ((map->count > 0) && (map->zones[map->count - 1].start +
-            map->zones[map->count - 1].size < start))
-            break;
         if (size > 0) {
             map->zones[map->count].start = start;
             map->zones[map->count].size = size;
 ,13 → 308,13
     return true;
 }
 int ofw_screen(screen_t *screen)
 {
     char device_name[BUF_SIZE];
     uint32_t virtaddr;
-    if (ofw_get_property(ofw_aliases, "screen", device_name,
-        sizeof(device_name)) <= 0)
+    if (ofw_get_property(ofw_aliases, "screen", device_name, sizeof(device_name)) <= 0)
         return false;
     phandle device = ofw_find_device(device_name);
 ,26 → 321,21
     if (device == -1)
         return false;
-    if (ofw_get_property(device, "address", &virtaddr,
-        sizeof(virtaddr)) <= 0)
+    if (ofw_get_property(device, "address", &virtaddr, sizeof(virtaddr)) <= 0)
         return false;
     screen->addr = (void *) ((uintptr_t) virtaddr);
-    if (ofw_get_property(device, "width", &screen->width,
-        sizeof(screen->width)) <= 0)
+    if (ofw_get_property(device, "width", &screen->width, sizeof(screen->width)) <= 0)
         return false;
-    if (ofw_get_property(device, "height", &screen->height,
-        sizeof(screen->height)) <= 0)
+    if (ofw_get_property(device, "height", &screen->height, sizeof(screen->height)) <= 0)
         return false;
-    if (ofw_get_property(device, "depth", &screen->bpp,
-        sizeof(screen->bpp)) <= 0)
+    if (ofw_get_property(device, "depth", &screen->bpp, sizeof(screen->bpp)) <= 0)
         return false;
-    if (ofw_get_property(device, "linebytes", &screen->scanline,
-        sizeof(screen->scanline)) <= 0)
+    if (ofw_get_property(device, "linebytes", &screen->scanline, sizeof(screen->scanline)) <= 0)
         return false;
     return true;

 /trunk/boot/genarch/ofw_tree.c
 ,6 → 121,7
         memcpy(current_node->da_name, &path[i], len);
         current_node->da_name[len] = '\0';
         /*
          * Recursively process the potential child node.
          */
 ,28 → 219,10
 ofw_tree_node_t *ofw_tree_build(void)
 {
     ofw_tree_node_t *root;
-    phandle ssm_node;
-    ofw_tree_node_t *ssm;
     root = ofw_tree_node_alloc();
     if (root)
         ofw_tree_node_process(root, NULL, ofw_root);
-    /*
-     * The firmware client interface does not automatically include the
-     * "ssm" node in the list of children of "/". A nasty yet working
-     * solution is to explicitly stick "ssm" to the OFW tree.
-     */
-    ssm_node = ofw_find_device("/ssm@0,0");
-    if (ssm_node != -1) {
-        ssm = ofw_tree_node_alloc();
-        if (ssm) {
-            ofw_tree_node_process(
-                ssm, root, ofw_find_device("/ssm@0,0"));
-            ssm->peer = root->child;
-            root->child = ssm;
-        }
-    }
     return root;
 }

/trunk/contrib/util/DownloadAndPatchSILO.sh
File deleted

Property changes:
Deleted: svn:executable
-*
\ No newline at end of property

Subversion Repositories HelenOS

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Ignore whitespace Rev 3672 → Rev 3671