/trunk/kernel/doc/arch/sparc64 |
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9,6 → 9,7 |
MACHINES |
o Sun Ultra 5 |
o Sun Ultra 60 |
o Sun Enterprise E6500 (simulated) |
CPU |
/trunk/kernel/generic/include/mm/frame.h |
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57,7 → 57,7 |
#define ZONE_JOIN 0x1 /**< If possible, merge with neighbouring zones */ |
#define FRAME_KA 0x1 /* skip frames conflicting with user address space */ |
#define FRAME_KA 0x1 /* convert the frame address to kernel va */ |
#define FRAME_ATOMIC 0x2 /* do not panic and do not sleep on failure */ |
#define FRAME_NO_RECLAIM 0x4 /* do not start reclaiming when no free memory */ |
/trunk/kernel/generic/include/macros.h |
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42,7 → 42,7 |
#define is_lower(c) (((c) >= 'a') && ((c) <= 'z')) |
#define is_upper(c) (((c) >= 'A') && ((c) <= 'Z')) |
#define is_alpha(c) (is_lower(c) || is_upper(c)) |
#define is_alphanum(c) (is_alpha(c) || is_digit(c)) |
#define is_alphanum(c) (is_alpha(c) || is_digit(c)) |
#define is_white(c) (((c) == ' ') || ((c) == '\t') || ((c) == '\n') || ((c) == '\r')) |
#define min(a,b) ((a) < (b) ? (a) : (b)) |
/trunk/kernel/arch/sparc64/src/mm/tsb.c |
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98,7 → 98,7 |
tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT; |
tsb->data.value = 0; |
tsb->data.size = PAGESIZE_8K; |
tsb->data.pfn = t->frame >> PAGE_WIDTH; |
tsb->data.pfn = t->frame >> FRAME_WIDTH; |
tsb->data.cp = t->c; |
#ifdef CONFIG_VIRT_IDX_CACHE |
tsb->data.cv = t->c; |
140,7 → 140,7 |
tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT; |
tsb->data.value = 0; |
tsb->data.size = PAGESIZE_8K; |
tsb->data.pfn = t->frame >> PAGE_WIDTH; |
tsb->data.pfn = t->frame >> FRAME_WIDTH; |
tsb->data.cp = t->c; |
#ifdef CONFIG_VIRT_IDX_CACHE |
tsb->data.cv = t->c; |
/trunk/kernel/arch/sparc64/src/start.S |
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64,13 → 64,13 |
.global kernel_image_start |
kernel_image_start: |
mov BSP_FLAG, %l0 |
and %o0, %l0, %l7 ! l7 <= bootstrap processor? |
andn %o0, %l0, %l6 ! l6 <= start of physical memory |
and %o0, %l0, %l7 ! l7 <= bootstrap processor? |
andn %o0, %l0, %l6 ! l6 <= start of physical memory |
! Get bits 40:13 of physmem_base. |
srlx %l6, 13, %l5 |
sllx %l5, 13 + (63 - 40), %l5 |
srlx %l5, 63 - 40, %l5 ! l5 <= physmem_base[40:13] |
srlx %l5, 63 - 40, %l5 ! l5 <= physmem_base[40:13] |
/* |
* Setup basic runtime environment. |