| /tags/0.4.1/kernel/arch/arm32/src/mach/testarm/testarm.c |
|---|
| 0,0 → 1,242 |
| /* |
| * Copyright (c) 2007 Michal Kebrt, Petr Stepan |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32gxemul |
| * @{ |
| */ |
| /** @file |
| * @brief GXemul drivers. |
| */ |
| #include <arch/exception.h> |
| #include <arch/mach/testarm/testarm.h> |
| #include <mm/page.h> |
| #include <genarch/fb/fb.h> |
| #include <genarch/fb/visuals.h> |
| #include <genarch/drivers/dsrln/dsrlnin.h> |
| #include <genarch/drivers/dsrln/dsrlnout.h> |
| #include <genarch/srln/srln.h> |
| #include <console/console.h> |
| #include <ddi/irq.h> |
| #include <ddi/device.h> |
| #include <config.h> |
| #include <sysinfo/sysinfo.h> |
| #include <interrupt.h> |
| #include <print.h> |
| void *gxemul_kbd; |
| void *gxemul_rtc; |
| void *gxemul_irqc; |
| static irq_t gxemul_timer_irq; |
| struct arm_machine_ops machine_ops = { |
| MACHINE_GENFUNC, |
| MACHINE_GENFUNC, |
| gxemul_init, |
| gxemul_timer_irq_start, |
| gxemul_cpu_halt, |
| gxemul_get_memory_size, |
| gxemul_fb_init, |
| gxemul_irq_exception, |
| gxemul_get_fb_address, |
| gxemul_frame_init, |
| gxemul_output_init, |
| gxemul_input_init |
| }; |
| void gxemul_init(void) |
| { |
| gxemul_kbd = (void *) hw_map(GXEMUL_KBD_ADDRESS, PAGE_SIZE); |
| gxemul_rtc = (void *) hw_map(GXEMUL_RTC_ADDRESS, PAGE_SIZE); |
| gxemul_irqc = (void *) hw_map(GXEMUL_IRQC_ADDRESS, PAGE_SIZE); |
| } |
| void gxemul_fb_init(void) |
| { |
| fb_properties_t prop = { |
| .addr = GXEMUL_FB_ADDRESS, |
| .offset = 0, |
| .x = 640, |
| .y = 480, |
| .scan = 1920, |
| .visual = VISUAL_RGB_8_8_8, |
| }; |
| fb_init(&prop); |
| } |
| void gxemul_output_init(void) |
| { |
| dsrlnout_init((ioport8_t *) gxemul_kbd); |
| } |
| void gxemul_input_init(void) |
| { |
| #ifdef CONFIG_ARM_KBD |
| /* |
| * Initialize the GXemul keyboard port. Then initialize the serial line |
| * module and connect it to the GXemul keyboard. |
| */ |
| dsrlnin_instance_t *dsrlnin_instance |
| = dsrlnin_init((dsrlnin_t *) gxemul_kbd, GXEMUL_KBD_IRQ); |
| if (dsrlnin_instance) { |
| srln_instance_t *srln_instance = srln_init(); |
| if (srln_instance) { |
| indev_t *sink = stdin_wire(); |
| indev_t *srln = srln_wire(srln_instance, sink); |
| dsrlnin_wire(dsrlnin_instance, srln); |
| } |
| } |
| /* |
| * This is the necessary evil until the userspace driver is entirely |
| * self-sufficient. |
| */ |
| sysinfo_set_item_val("kbd", NULL, true); |
| sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ); |
| sysinfo_set_item_val("kbd.address.virtual", NULL, (unative_t) gxemul_kbd); |
| #endif |
| } |
| /** Starts gxemul Real Time Clock device, which asserts regular interrupts. |
| * |
| * @param frequency Interrupts frequency (0 disables RTC). |
| */ |
| static void gxemul_timer_start(uint32_t frequency) |
| { |
| *((uint32_t *) (gxemul_rtc + GXEMUL_RTC_FREQ_OFFSET)) |
| = frequency; |
| } |
| static irq_ownership_t gxemul_timer_claim(irq_t *irq) |
| { |
| return IRQ_ACCEPT; |
| } |
| /** Timer interrupt handler. |
| * |
| * @param irq Interrupt information. |
| * @param arg Not used. |
| */ |
| static void gxemul_timer_irq_handler(irq_t *irq) |
| { |
| /* |
| * We are holding a lock which prevents preemption. |
| * Release the lock, call clock() and reacquire the lock again. |
| */ |
| spinlock_unlock(&irq->lock); |
| clock(); |
| spinlock_lock(&irq->lock); |
| /* acknowledge tick */ |
| *((uint32_t *) (gxemul_rtc + GXEMUL_RTC_ACK_OFFSET)) |
| = 0; |
| } |
| /** Initializes and registers timer interrupt handler. */ |
| static void gxemul_timer_irq_init(void) |
| { |
| irq_initialize(&gxemul_timer_irq); |
| gxemul_timer_irq.devno = device_assign_devno(); |
| gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ; |
| gxemul_timer_irq.claim = gxemul_timer_claim; |
| gxemul_timer_irq.handler = gxemul_timer_irq_handler; |
| irq_register(&gxemul_timer_irq); |
| } |
| /** Starts timer. |
| * |
| * Initiates regular timer interrupts after initializing |
| * corresponding interrupt handler. |
| */ |
| void gxemul_timer_irq_start(void) |
| { |
| gxemul_timer_irq_init(); |
| gxemul_timer_start(GXEMUL_TIMER_FREQ); |
| } |
| /** Returns the size of emulated memory. |
| * |
| * @return Size in bytes. |
| */ |
| uintptr_t gxemul_get_memory_size(void) |
| { |
| return *((uintptr_t *) (GXEMUL_MP_ADDRESS + GXEMUL_MP_MEMSIZE_OFFSET)); |
| } |
| /** Returns the mask of active interrupts. */ |
| static inline uint32_t gxemul_irqc_get_sources(void) |
| { |
| return *((uint32_t *) gxemul_irqc); |
| } |
| /** Interrupt Exception handler. |
| * |
| * Determines the sources of interrupt and calls their handlers. |
| */ |
| void gxemul_irq_exception(int exc_no, istate_t *istate) |
| { |
| uint32_t sources = gxemul_irqc_get_sources(); |
| unsigned int i; |
| for (i = 0; i < GXEMUL_IRQC_MAX_IRQ; i++) { |
| if (sources & (1 << i)) { |
| irq_t *irq = irq_dispatch_and_lock(i); |
| if (irq) { |
| /* The IRQ handler was found. */ |
| irq->handler(irq); |
| spinlock_unlock(&irq->lock); |
| } else { |
| /* Spurious interrupt.*/ |
| printf("cpu%d: spurious interrupt (inum=%d)\n", |
| CPU->id, i); |
| } |
| } |
| } |
| } |
| void gxemul_cpu_halt(void) |
| { |
| *((char *) (gxemul_kbd + GXEMUL_HALT_OFFSET)) = 0; |
| } |
| void gxemul_frame_init(void) |
| { |
| } |
| uintptr_t gxemul_get_fb_address() |
| { |
| return ((uintptr_t)GXEMUL_FB_ADDRESS); |
| } |
| /** @} |
| */ |
| Property changes: |
| Added: svn:mergeinfo |
| /tags/0.4.1/kernel/arch/arm32/src/mach/integratorcp/integratorcp.c |
|---|
| 0,0 → 1,360 |
| /* |
| * Copyright (c) 2009 Vineeth Pillai |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32integratorcp |
| * @{ |
| */ |
| /** @file |
| * @brief ICP drivers. |
| */ |
| #include <interrupt.h> |
| #include <ipc/irq.h> |
| #include <console/chardev.h> |
| #include <genarch/drivers/pl050/pl050.h> |
| #include <genarch/kbrd/kbrd.h> |
| #include <console/console.h> |
| #include <sysinfo/sysinfo.h> |
| #include <print.h> |
| #include <ddi/device.h> |
| #include <mm/page.h> |
| #include <mm/frame.h> |
| #include <arch/mm/frame.h> |
| #include <arch/mach/integratorcp/integratorcp.h> |
| #include <genarch/fb/fb.h> |
| #include <genarch/fb/visuals.h> |
| #include <ddi/ddi.h> |
| #include <print.h> |
| #define SDRAM_SIZE (sdram[((*(uint32_t *)(ICP_CMCR+ICP_SDRAMCR_OFFSET) & ICP_SDRAM_MASK) >> 2)]) |
| static parea_t fb_parea; |
| static icp_hw_map_t icp_hw_map; |
| static irq_t icp_timer_irq; |
| struct arm_machine_ops machine_ops = { |
| MACHINE_GENFUNC, |
| MACHINE_GENFUNC, |
| icp_init, |
| icp_timer_irq_start, |
| icp_cpu_halt, |
| icp_get_memory_size, |
| icp_fb_init, |
| icp_irq_exception, |
| icp_get_fb_address, |
| icp_frame_init, |
| icp_output_init, |
| icp_input_init |
| }; |
| static bool hw_map_init_called = false; |
| static bool vga_init = false; |
| uint32_t sdram[8] = { |
| 16777216, /* 16mb */ |
| 33554432, /* 32mb */ |
| 67108864, /* 64mb */ |
| 134217728, /* 128mb */ |
| 268435456, /* 256mb */ |
| 0, /* Reserverd */ |
| 0, /* Reserverd */ |
| 0 /* Reserverd */ |
| }; |
| void icp_vga_init(void); |
| /** Initializes the vga |
| * |
| */ |
| void icp_vga_init(void) |
| { |
| *(uint32_t*)((char *)(icp_hw_map.cmcr)+0x14) = 0xA05F0000; |
| *(uint32_t*)((char *)(icp_hw_map.cmcr)+0x1C) = 0x12C11000; |
| *(uint32_t*)icp_hw_map.vga = 0x3F1F3F9C; |
| *(uint32_t*)((char *)(icp_hw_map.vga) + 0x4) = 0x080B61DF; |
| *(uint32_t*)((char *)(icp_hw_map.vga) + 0x8) = 0x067F3800; |
| *(uint32_t*)((char *)(icp_hw_map.vga) + 0x10) = ICP_FB; |
| *(uint32_t *)((char *)(icp_hw_map.vga) + 0x1C) = 0x182B; |
| *(uint32_t*)((char *)(icp_hw_map.cmcr)+0xC) = 0x33805000; |
| } |
| /** Returns the mask of active interrupts. */ |
| static inline uint32_t icp_irqc_get_sources(void) |
| { |
| return *((uint32_t *) icp_hw_map.irqc); |
| } |
| /** Masks interrupt. |
| * |
| * @param irq interrupt number |
| */ |
| static inline void icp_irqc_mask(uint32_t irq) |
| { |
| *((uint32_t *) icp_hw_map.irqc_mask) = (1 << irq); |
| } |
| /** Unmasks interrupt. |
| * |
| * @param irq interrupt number |
| */ |
| static inline void icp_irqc_unmask(uint32_t irq) |
| { |
| *((uint32_t *) icp_hw_map.irqc_unmask) |= (1 << irq); |
| } |
| /** Initializes the icp frame buffer */ |
| void icp_fb_init(void) |
| { |
| fb_properties_t prop = { |
| .addr = 0, |
| .offset = 0, |
| .x = 640, |
| .y = 480, |
| .scan = 2560, |
| .visual = VISUAL_BGR_0_8_8_8, |
| }; |
| prop.addr = icp_get_fb_address(); |
| fb_init(&prop); |
| fb_parea.pbase = ICP_FB; |
| fb_parea.frames = 300; |
| ddi_parea_register(&fb_parea); |
| } |
| /** Initializes icp_hw_map. */ |
| void icp_init(void) |
| { |
| icp_hw_map.uart = hw_map(ICP_UART, PAGE_SIZE); |
| icp_hw_map.kbd_ctrl = hw_map(ICP_KBD, PAGE_SIZE); |
| icp_hw_map.kbd_stat = icp_hw_map.kbd_ctrl + ICP_KBD_STAT; |
| icp_hw_map.kbd_data = icp_hw_map.kbd_ctrl + ICP_KBD_DATA; |
| icp_hw_map.kbd_intstat = icp_hw_map.kbd_ctrl + ICP_KBD_INTR_STAT; |
| icp_hw_map.rtc = hw_map(ICP_RTC, PAGE_SIZE); |
| icp_hw_map.rtc1_load = icp_hw_map.rtc + ICP_RTC1_LOAD_OFFSET; |
| icp_hw_map.rtc1_read = icp_hw_map.rtc + ICP_RTC1_READ_OFFSET; |
| icp_hw_map.rtc1_ctl = icp_hw_map.rtc + ICP_RTC1_CTL_OFFSET; |
| icp_hw_map.rtc1_intrclr = icp_hw_map.rtc + ICP_RTC1_INTRCLR_OFFSET; |
| icp_hw_map.rtc1_bgload = icp_hw_map.rtc + ICP_RTC1_BGLOAD_OFFSET; |
| icp_hw_map.rtc1_intrstat = icp_hw_map.rtc + ICP_RTC1_INTRSTAT_OFFSET; |
| icp_hw_map.irqc = hw_map(ICP_IRQC, PAGE_SIZE); |
| icp_hw_map.irqc_mask = icp_hw_map.irqc + ICP_IRQC_MASK_OFFSET; |
| icp_hw_map.irqc_unmask = icp_hw_map.irqc + ICP_IRQC_UNMASK_OFFSET; |
| icp_hw_map.cmcr = hw_map(ICP_CMCR, PAGE_SIZE); |
| icp_hw_map.sdramcr = icp_hw_map.cmcr + ICP_SDRAMCR_OFFSET; |
| icp_hw_map.vga = hw_map(ICP_VGA, PAGE_SIZE); |
| hw_map_init_called = true; |
| } |
| /** Acquire console back for kernel. */ |
| void icp_grab_console(void) |
| { |
| } |
| /** Return console to userspace. */ |
| void icp_release_console(void) |
| { |
| } |
| /** Starts icp Real Time Clock device, which asserts regular interrupts. |
| * |
| * @param frequency Interrupts frequency (0 disables RTC). |
| */ |
| static void icp_timer_start(uint32_t frequency) |
| { |
| icp_irqc_mask(ICP_TIMER_IRQ); |
| *((uint32_t*) icp_hw_map.rtc1_load) = frequency; |
| *((uint32_t*) icp_hw_map.rtc1_bgload) = frequency; |
| *((uint32_t*) icp_hw_map.rtc1_ctl) = ICP_RTC_CTL_VALUE; |
| icp_irqc_unmask(ICP_TIMER_IRQ); |
| } |
| static irq_ownership_t icp_timer_claim(irq_t *irq) |
| { |
| if (icp_hw_map.rtc1_intrstat) { |
| *((uint32_t*) icp_hw_map.rtc1_intrclr) = 1; |
| return IRQ_ACCEPT; |
| } else |
| return IRQ_DECLINE; |
| } |
| /** Timer interrupt handler. |
| * |
| * @param irq Interrupt information. |
| * @param arg Not used. |
| */ |
| static void icp_timer_irq_handler(irq_t *irq) |
| { |
| /* |
| * We are holding a lock which prevents preemption. |
| * Release the lock, call clock() and reacquire the lock again. |
| */ |
| spinlock_unlock(&irq->lock); |
| clock(); |
| spinlock_lock(&irq->lock); |
| } |
| /** Initializes and registers timer interrupt handler. */ |
| static void icp_timer_irq_init(void) |
| { |
| irq_initialize(&icp_timer_irq); |
| icp_timer_irq.devno = device_assign_devno(); |
| icp_timer_irq.inr = ICP_TIMER_IRQ; |
| icp_timer_irq.claim = icp_timer_claim; |
| icp_timer_irq.handler = icp_timer_irq_handler; |
| irq_register(&icp_timer_irq); |
| } |
| /** Starts timer. |
| * |
| * Initiates regular timer interrupts after initializing |
| * corresponding interrupt handler. |
| */ |
| void icp_timer_irq_start(void) |
| { |
| icp_timer_irq_init(); |
| icp_timer_start(ICP_TIMER_FREQ); |
| } |
| /** Returns the size of emulated memory. |
| * |
| * @return Size in bytes. |
| */ |
| size_t icp_get_memory_size(void) |
| { |
| if (hw_map_init_called) { |
| return (sdram[((*(uint32_t *)icp_hw_map.sdramcr & ICP_SDRAM_MASK) >> 2)]); |
| } else { |
| return SDRAM_SIZE; |
| } |
| } |
| /** Stops icp. */ |
| void icp_cpu_halt(void) |
| { |
| while (1); |
| } |
| /** interrupt exception handler. |
| * |
| * Determines sources of the interrupt from interrupt controller and |
| * calls high-level handlers for them. |
| * |
| * @param exc_no Interrupt exception number. |
| * @param istate Saved processor state. |
| */ |
| void icp_irq_exception(int exc_no, istate_t *istate) |
| { |
| uint32_t sources = icp_irqc_get_sources(); |
| int i; |
| for (i = 0; i < ICP_IRQC_MAX_IRQ; i++) { |
| if (sources & (1 << i)) { |
| irq_t *irq = irq_dispatch_and_lock(i); |
| if (irq) { |
| /* The IRQ handler was found. */ |
| irq->handler(irq); |
| spinlock_unlock(&irq->lock); |
| } else { |
| /* Spurious interrupt.*/ |
| printf("cpu%d: spurious interrupt (inum=%d)\n", |
| CPU->id, i); |
| } |
| } |
| } |
| } |
| /** Returns address of framebuffer device. |
| * |
| * @return Address of framebuffer device. |
| */ |
| uintptr_t icp_get_fb_address(void) |
| { |
| if (!vga_init) { |
| icp_vga_init(); |
| vga_init = true; |
| } |
| return (uintptr_t) ICP_FB; |
| } |
| /* |
| * Integrator specific frame initialization |
| */ |
| void |
| icp_frame_init(void) |
| { |
| frame_mark_unavailable(ICP_FB_FRAME, ICP_FB_NUM_FRAME); |
| frame_mark_unavailable(0, 256); |
| } |
| void icp_output_init(void) |
| { |
| } |
| void icp_input_init(void) |
| { |
| pl050_t *pl050 = malloc(sizeof(pl050_t), FRAME_ATOMIC); |
| pl050->status = (ioport8_t *)icp_hw_map.kbd_stat; |
| pl050->data = (ioport8_t *)icp_hw_map.kbd_data; |
| pl050->ctrl = (ioport8_t *)icp_hw_map.kbd_ctrl; |
| pl050_instance_t *pl050_instance = pl050_init(pl050, ICP_KBD_IRQ); |
| if (pl050_instance) { |
| kbrd_instance_t *kbrd_instance = kbrd_init(); |
| if (kbrd_instance) { |
| icp_irqc_mask(ICP_KBD_IRQ); |
| indev_t *sink = stdin_wire(); |
| indev_t *kbrd = kbrd_wire(kbrd_instance, sink); |
| pl050_wire(pl050_instance, kbrd); |
| icp_irqc_unmask(ICP_KBD_IRQ); |
| } |
| } |
| /* |
| * This is the necessary evil until the userspace driver is entirely |
| * self-sufficient. |
| */ |
| sysinfo_set_item_val("kbd", NULL, true); |
| sysinfo_set_item_val("kbd.inr", NULL, ICP_KBD_IRQ); |
| sysinfo_set_item_val("kbd.address.status", NULL, |
| (uintptr_t) icp_hw_map.kbd_stat); |
| sysinfo_set_item_val("kbd.address.data", NULL, |
| (uintptr_t) icp_hw_map.kbd_data); |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/exception.c |
|---|
| 0,0 → 1,194 |
| /* |
| * Copyright (c) 2007 Petr Stepan |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Exception handlers and exception initialization routines. |
| */ |
| #include <arch/exception.h> |
| #include <arch/memstr.h> |
| #include <arch/regutils.h> |
| #include <interrupt.h> |
| #include <arch/mm/page_fault.h> |
| #include <arch/barrier.h> |
| #include <print.h> |
| #include <syscall/syscall.h> |
| #ifdef MACHINE_testarm |
| #include <arch/mach/testarm/testarm.h> |
| #endif |
| #ifdef MACHINE_integratorcp |
| #include <arch/mach/integratorcp/integratorcp.h> |
| #endif |
| /** Offset used in calculation of exception handler's relative address. |
| * |
| * @see install_handler() |
| */ |
| #define PREFETCH_OFFSET 0x8 |
| /** LDR instruction's code */ |
| #define LDR_OPCODE 0xe59ff000 |
| /** Number of exception vectors. */ |
| #define EXC_VECTORS 8 |
| /** Size of memory block occupied by exception vectors. */ |
| #define EXC_VECTORS_SIZE (EXC_VECTORS * 4) |
| /** Updates specified exception vector to jump to given handler. |
| * |
| * Addresses of handlers are stored in memory following exception vectors. |
| */ |
| static void install_handler(unsigned handler_addr, unsigned *vector) |
| { |
| /* relative address (related to exc. vector) of the word |
| * where handler's address is stored |
| */ |
| volatile uint32_t handler_address_ptr = EXC_VECTORS_SIZE - |
| PREFETCH_OFFSET; |
| /* make it LDR instruction and store at exception vector */ |
| *vector = handler_address_ptr | LDR_OPCODE; |
| smc_coherence(*vector); |
| /* store handler's address */ |
| *(vector + EXC_VECTORS) = handler_addr; |
| } |
| /** Software Interrupt handler. |
| * |
| * Dispatches the syscall. |
| */ |
| static void swi_exception(int exc_no, istate_t *istate) |
| { |
| istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2, |
| istate->r3, istate->r4, istate->r5, istate->r6); |
| } |
| /** Fills exception vectors with appropriate exception handlers. */ |
| void install_exception_handlers(void) |
| { |
| install_handler((unsigned) reset_exception_entry, |
| (unsigned *) EXC_RESET_VEC); |
| install_handler((unsigned) undef_instr_exception_entry, |
| (unsigned *) EXC_UNDEF_INSTR_VEC); |
| install_handler((unsigned) swi_exception_entry, |
| (unsigned *) EXC_SWI_VEC); |
| install_handler((unsigned) prefetch_abort_exception_entry, |
| (unsigned *) EXC_PREFETCH_ABORT_VEC); |
| install_handler((unsigned) data_abort_exception_entry, |
| (unsigned *) EXC_DATA_ABORT_VEC); |
| install_handler((unsigned) irq_exception_entry, |
| (unsigned *) EXC_IRQ_VEC); |
| install_handler((unsigned) fiq_exception_entry, |
| (unsigned *) EXC_FIQ_VEC); |
| } |
| #ifdef HIGH_EXCEPTION_VECTORS |
| /** Activates use of high exception vectors addresses. */ |
| static void high_vectors(void) |
| { |
| uint32_t control_reg; |
| asm volatile ( |
| "mrc p15, 0, %[control_reg], c1, c1" |
| : [control_reg] "=r" (control_reg) |
| ); |
| /* switch on the high vectors bit */ |
| control_reg |= CP15_R1_HIGH_VECTORS_BIT; |
| asm volatile ( |
| "mcr p15, 0, %[control_reg], c1, c1" |
| :: [control_reg] "r" (control_reg) |
| ); |
| } |
| #endif |
| /** Interrupt Exception handler. |
| * |
| * Determines the sources of interrupt and calls their handlers. |
| */ |
| static void irq_exception(int exc_no, istate_t *istate) |
| { |
| machine_irq_exception(exc_no, istate); |
| } |
| /** Initializes exception handling. |
| * |
| * Installs low-level exception handlers and then registers |
| * exceptions and their handlers to kernel exception dispatcher. |
| */ |
| void exception_init(void) |
| { |
| #ifdef HIGH_EXCEPTION_VECTORS |
| high_vectors(); |
| #endif |
| install_exception_handlers(); |
| exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception); |
| exc_register(EXC_PREFETCH_ABORT, "prefetch abort", |
| (iroutine) prefetch_abort); |
| exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort); |
| exc_register(EXC_SWI, "software interrupt", (iroutine) swi_exception); |
| } |
| /** Prints #istate_t structure content. |
| * |
| * @param istate Structure to be printed. |
| */ |
| void print_istate(istate_t *istate) |
| { |
| printf("istate dump:\n"); |
| printf(" r0: %x r1: %x r2: %x r3: %x\n", |
| istate->r0, istate->r1, istate->r2, istate->r3); |
| printf(" r4: %x r5: %x r6: %x r7: %x\n", |
| istate->r4, istate->r5, istate->r6, istate->r7); |
| printf(" r8: %x r8: %x r10: %x r11: %x\n", |
| istate->r8, istate->r9, istate->r10, istate->r11); |
| printf(" r12: %x sp: %x lr: %x spsr: %x\n", |
| istate->r12, istate->sp, istate->lr, istate->spsr); |
| printf(" pc: %x\n", istate->pc); |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/arm32.c |
|---|
| 0,0 → 1,200 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief ARM32 architecture specific functions. |
| */ |
| #include <arch.h> |
| #include <config.h> |
| #include <genarch/fb/fb.h> |
| #include <genarch/fb/visuals.h> |
| #include <sysinfo/sysinfo.h> |
| #include <console/console.h> |
| #include <ddi/irq.h> |
| #include <print.h> |
| #include <config.h> |
| #include <interrupt.h> |
| #include <arch/regutils.h> |
| #include <userspace.h> |
| #include <macros.h> |
| #include <string.h> |
| #ifdef MACHINE_testarm |
| #include <arch/mach/testarm/testarm.h> |
| #endif |
| #ifdef MACHINE_integratorcp |
| #include <arch/mach/integratorcp/integratorcp.h> |
| #endif |
| /** Performs arm32-specific initialization before main_bsp() is called. */ |
| void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo) |
| { |
| unsigned int i; |
| init.cnt = bootinfo->cnt; |
| for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); ++i) { |
| init.tasks[i].addr = bootinfo->tasks[i].addr; |
| init.tasks[i].size = bootinfo->tasks[i].size; |
| str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN, |
| bootinfo->tasks[i].name); |
| } |
| } |
| /** Performs arm32 specific initialization before mm is initialized. */ |
| void arch_pre_mm_init(void) |
| { |
| /* It is not assumed by default */ |
| interrupts_disable(); |
| } |
| /** Performs arm32 specific initialization afterr mm is initialized. */ |
| void arch_post_mm_init(void) |
| { |
| machine_init(); |
| /* Initialize exception dispatch table */ |
| exception_init(); |
| interrupt_init(); |
| #ifdef CONFIG_FB |
| machine_fb_init(); |
| #else |
| #ifdef CONFIG_ARM_PRN |
| machine_output_init(); |
| #endif /* CONFIG_ARM_PRN */ |
| #endif /* CONFIG_FB */ |
| } |
| /** Performs arm32 specific tasks needed after cpu is initialized. |
| * |
| * Currently the function is empty. |
| */ |
| void arch_post_cpu_init(void) |
| { |
| } |
| /** Performs arm32 specific tasks needed before the multiprocessing is |
| * initialized. |
| * |
| * Currently the function is empty because SMP is not supported. |
| */ |
| void arch_pre_smp_init(void) |
| { |
| } |
| /** Performs arm32 specific tasks needed after the multiprocessing is |
| * initialized. |
| * |
| * Currently the function is empty because SMP is not supported. |
| */ |
| void arch_post_smp_init(void) |
| { |
| machine_input_init(); |
| } |
| /** Performs arm32 specific tasks needed before the new task is run. */ |
| void before_task_runs_arch(void) |
| { |
| } |
| /** Performs arm32 specific tasks needed before the new thread is scheduled. |
| * |
| * It sets supervisor_sp. |
| */ |
| void before_thread_runs_arch(void) |
| { |
| uint8_t *stck; |
| tlb_invalidate_all(); |
| stck = &THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA]; |
| supervisor_sp = (uintptr_t) stck; |
| } |
| /** Performs arm32 specific tasks before a thread stops running. |
| * |
| * Currently the function is empty. |
| */ |
| void after_thread_ran_arch(void) |
| { |
| } |
| /** Halts CPU. */ |
| void cpu_halt(void) |
| { |
| machine_cpu_halt(); |
| } |
| /** Reboot. */ |
| void arch_reboot() |
| { |
| /* not implemented */ |
| while (1); |
| } |
| /** Construct function pointer |
| * |
| * @param fptr function pointer structure |
| * @param addr function address |
| * @param caller calling function address |
| * |
| * @return address of the function pointer |
| * |
| */ |
| void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
| { |
| return addr; |
| } |
| /** Acquire console back for kernel. */ |
| void arch_grab_console(void) |
| { |
| machine_grab_console(); |
| #ifdef CONFIG_FB |
| fb_redraw(); |
| #endif |
| } |
| /** Return console to userspace. */ |
| void arch_release_console(void) |
| { |
| machine_release_console(); |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/mm/frame.c |
|---|
| 0,0 → 1,76 |
| /* |
| * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32mm |
| * @{ |
| */ |
| /** @file |
| * @brief Frame related functions. |
| */ |
| #include <mm/frame.h> |
| #include <arch/mm/frame.h> |
| #include <config.h> |
| #ifdef MACHINE_testarm |
| #include <arch/mach/testarm/testarm.h> |
| #endif |
| #ifdef MACHINE_integratorcp |
| #include <arch/mach/integratorcp/integratorcp.h> |
| #endif |
| /** Address of the last frame in the memory. */ |
| uintptr_t last_frame = 0; |
| /** Creates memory zones. */ |
| void frame_arch_init(void) |
| { |
| last_frame = machine_get_memory_size(); |
| /* All memory as one zone */ |
| zone_create(0, ADDR2PFN(last_frame), |
| BOOT_PAGE_TABLE_START_FRAME + BOOT_PAGE_TABLE_SIZE_IN_FRAMES, 0); |
| /* blacklist boot page table */ |
| frame_mark_unavailable(BOOT_PAGE_TABLE_START_FRAME, |
| BOOT_PAGE_TABLE_SIZE_IN_FRAMES); |
| machine_frame_init(); |
| } |
| /** Frees the boot page table. */ |
| void boot_page_table_free(void) |
| { |
| unsigned int i; |
| for (i = 0; i < BOOT_PAGE_TABLE_SIZE_IN_FRAMES; i++) |
| frame_free(i * FRAME_SIZE + BOOT_PAGE_TABLE_ADDRESS); |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/mm/tlb.c |
|---|
| 0,0 → 1,100 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32mm |
| * @{ |
| */ |
| /** @file |
| * @brief TLB related functions. |
| */ |
| #include <mm/tlb.h> |
| #include <arch/mm/asid.h> |
| #include <arch/asm.h> |
| #include <arch/types.h> |
| #include <arch/mm/page.h> |
| /** Invalidate all entries in TLB. |
| * |
| * @note See ARM Architecture reference section 3.7.7 for details. |
| */ |
| void tlb_invalidate_all(void) |
| { |
| asm volatile ( |
| "eor r1, r1\n" |
| "mcr p15, 0, r1, c8, c7, 0\n" |
| ::: "r1" |
| ); |
| } |
| /** Invalidate all entries in TLB that belong to specified address space. |
| * |
| * @param asid Ignored as the ARM architecture doesn't support ASIDs. |
| */ |
| void tlb_invalidate_asid(asid_t asid) |
| { |
| tlb_invalidate_all(); |
| } |
| /** Invalidate single entry in TLB |
| * |
| * @param page Virtual adress of the page |
| */ |
| static inline void invalidate_page(uintptr_t page) |
| { |
| asm volatile ( |
| "mcr p15, 0, %[page], c8, c7, 1\n" |
| :: [page] "r" (page) |
| ); |
| } |
| /** Invalidate TLB entries for specified page range belonging to specified |
| * address space. |
| * |
| * @param asid Ignored as the ARM architecture doesn't support it. |
| * @param page Address of the first page whose entry is to be invalidated. |
| * @param cnt Number of entries to invalidate. |
| */ |
| void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, size_t cnt) |
| { |
| unsigned int i; |
| for (i = 0; i < cnt; i++) |
| invalidate_page(page + i * PAGE_SIZE); |
| } |
| void tlb_arch_init(void) |
| { |
| } |
| void tlb_print(void) |
| { |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/mm/page_fault.c |
|---|
| 0,0 → 1,211 |
| /* |
| * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32mm |
| * @{ |
| */ |
| /** @file |
| * @brief Page fault related functions. |
| */ |
| #include <panic.h> |
| #include <arch/exception.h> |
| #include <arch/mm/page_fault.h> |
| #include <mm/as.h> |
| #include <genarch/mm/page_pt.h> |
| #include <arch.h> |
| #include <interrupt.h> |
| #include <print.h> |
| /** Returns value stored in fault status register. |
| * |
| * @return Value stored in CP15 fault status register (FSR). |
| */ |
| static inline fault_status_t read_fault_status_register(void) |
| { |
| fault_status_union_t fsu; |
| /* fault status is stored in CP15 register 5 */ |
| asm volatile ( |
| "mrc p15, 0, %[dummy], c5, c0, 0" |
| : [dummy] "=r" (fsu.dummy) |
| ); |
| return fsu.fs; |
| } |
| /** Returns FAR (fault address register) content. |
| * |
| * @return FAR (fault address register) content (address that caused a page |
| * fault) |
| */ |
| static inline uintptr_t read_fault_address_register(void) |
| { |
| uintptr_t ret; |
| /* fault adress is stored in CP15 register 6 */ |
| asm volatile ( |
| "mrc p15, 0, %[ret], c6, c0, 0" |
| : [ret] "=r" (ret) |
| ); |
| return ret; |
| } |
| /** Decides whether the instruction is load/store or not. |
| * |
| * @param instr Instruction |
| * |
| * @return true when instruction is load/store, false otherwise |
| * |
| */ |
| static inline bool is_load_store_instruction(instruction_t instr) |
| { |
| /* load store immediate offset */ |
| if (instr.type == 0x2) |
| return true; |
| /* load store register offset */ |
| if ((instr.type == 0x3) && (instr.bit4 == 0)) |
| return true; |
| /* load store multiple */ |
| if (instr.type == 0x4) |
| return true; |
| /* oprocessor load/store */ |
| if (instr.type == 0x6) |
| return true; |
| return false; |
| } |
| /** Decides whether the instruction is swap or not. |
| * |
| * @param instr Instruction |
| * |
| * @return true when instruction is swap, false otherwise |
| */ |
| static inline bool is_swap_instruction(instruction_t instr) |
| { |
| /* swap, swapb instruction */ |
| if ((instr.type == 0x0) && |
| ((instr.opcode == 0x8) || (instr.opcode == 0xa)) && |
| (instr.access == 0x0) && (instr.bits567 == 0x4) && (instr.bit4 == 1)) |
| return true; |
| return false; |
| } |
| /** Decides whether read or write into memory is requested. |
| * |
| * @param instr_addr Address of instruction which tries to access memory. |
| * @param badvaddr Virtual address the instruction tries to access. |
| * |
| * @return Type of access into memory, PF_ACCESS_EXEC if no memory access is |
| * requested. |
| */ |
| static pf_access_t get_memory_access_type(uint32_t instr_addr, |
| uintptr_t badvaddr) |
| { |
| instruction_union_t instr_union; |
| instr_union.pc = instr_addr; |
| instruction_t instr = *(instr_union.instr); |
| /* undefined instructions */ |
| if (instr.condition == 0xf) { |
| panic("page_fault - instruction does not access memory " |
| "(instr_code: %x, badvaddr:%x).", instr, badvaddr); |
| return PF_ACCESS_EXEC; |
| } |
| /* load store instructions */ |
| if (is_load_store_instruction(instr)) { |
| if (instr.access == 1) { |
| return PF_ACCESS_READ; |
| } else { |
| return PF_ACCESS_WRITE; |
| } |
| } |
| /* swap, swpb instruction */ |
| if (is_swap_instruction(instr)) { |
| return PF_ACCESS_WRITE; |
| } |
| panic("page_fault - instruction doesn't access memory " |
| "(instr_code: %x, badvaddr:%x).", instr, badvaddr); |
| return PF_ACCESS_EXEC; |
| } |
| /** Handles "data abort" exception (load or store at invalid address). |
| * |
| * @param exc_no Exception number. |
| * @param istate CPU state when exception occured. |
| */ |
| void data_abort(int exc_no, istate_t *istate) |
| { |
| fault_status_t fsr __attribute__ ((unused)) = |
| read_fault_status_register(); |
| uintptr_t badvaddr = read_fault_address_register(); |
| pf_access_t access = get_memory_access_type(istate->pc, badvaddr); |
| int ret = as_page_fault(badvaddr, access, istate); |
| if (ret == AS_PF_FAULT) { |
| print_istate(istate); |
| printf("page fault - pc: %x, va: %x, status: %x(%x), " |
| "access:%d\n", istate->pc, badvaddr, fsr.status, fsr, |
| access); |
| fault_if_from_uspace(istate, "Page fault: %#x.", badvaddr); |
| panic("Page fault."); |
| } |
| } |
| /** Handles "prefetch abort" exception (instruction couldn't be executed). |
| * |
| * @param exc_no Exception number. |
| * @param istate CPU state when exception occured. |
| */ |
| void prefetch_abort(int exc_no, istate_t *istate) |
| { |
| int ret = as_page_fault(istate->pc, PF_ACCESS_EXEC, istate); |
| if (ret == AS_PF_FAULT) { |
| printf("prefetch_abort\n"); |
| print_istate(istate); |
| panic("page fault - prefetch_abort at address: %x.", |
| istate->pc); |
| } |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/mm/page.c |
|---|
| 0,0 → 1,106 |
| /* |
| * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32mm |
| * @{ |
| */ |
| /** @file |
| * @brief Paging related functions. |
| */ |
| #include <arch/mm/page.h> |
| #include <genarch/mm/page_pt.h> |
| #include <mm/page.h> |
| #include <align.h> |
| #include <config.h> |
| #include <arch/exception.h> |
| #include <typedefs.h> |
| #include <arch/types.h> |
| #include <interrupt.h> |
| #include <arch/mm/frame.h> |
| /** Initializes page tables. |
| * |
| * 1:1 virtual-physical mapping is created in kernel address space. Mapping |
| * for table with exception vectors is also created. |
| */ |
| void page_arch_init(void) |
| { |
| int flags = PAGE_CACHEABLE; |
| page_mapping_operations = &pt_mapping_operations; |
| uintptr_t cur; |
| /* Kernel identity mapping */ |
| for (cur = 0; cur < last_frame; cur += FRAME_SIZE) |
| page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); |
| /* Create mapping for exception table at high offset */ |
| #ifdef HIGH_EXCEPTION_VECTORS |
| void *virtaddr = frame_alloc(ONE_FRAME, FRAME_KA); |
| page_mapping_insert(AS_KERNEL, EXC_BASE_ADDRESS, KA2PA(virtaddr), flags); |
| #else |
| #error "Only high exception vector supported now" |
| #endif |
| as_switch(NULL, AS_KERNEL); |
| boot_page_table_free(); |
| } |
| /** Maps device into the kernel space. |
| * |
| * Maps physical address of device into kernel virtual address space (so it can |
| * be accessed only by kernel through virtual address). |
| * |
| * @param physaddr Physical address where device is connected. |
| * @param size Length of area where device is present. |
| * |
| * @return Virtual address where device will be accessible. |
| */ |
| uintptr_t hw_map(uintptr_t physaddr, size_t size) |
| { |
| if (last_frame + ALIGN_UP(size, PAGE_SIZE) > |
| KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) { |
| panic("Unable to map physical memory %p (%d bytes).", |
| physaddr, size) |
| } |
| uintptr_t virtaddr = PA2KA(last_frame); |
| pfn_t i; |
| for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) { |
| page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), |
| physaddr + PFN2ADDR(i), |
| PAGE_NOT_CACHEABLE | PAGE_READ | PAGE_WRITE | PAGE_KERNEL); |
| } |
| last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE); |
| return virtaddr; |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/mm/as.c |
|---|
| 0,0 → 1,52 |
| /* |
| * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32mm |
| * @{ |
| */ |
| /** @file |
| * @brief Address space functions. |
| */ |
| #include <arch/mm/as.h> |
| #include <genarch/mm/as_pt.h> |
| #include <genarch/mm/asid_fifo.h> |
| #include <mm/as.h> |
| #include <arch.h> |
| /** Architecture dependent address space init. |
| * |
| * Since ARM supports page tables, #as_pt_operations are used. |
| */ |
| void as_arch_init(void) |
| { |
| as_operations = &as_pt_operations; |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/interrupt.c |
|---|
| 0,0 → 1,109 |
| /* |
| * Copyright (c) 2007 Petr Stepan |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Interrupts controlling routines. |
| */ |
| #include <arch/asm.h> |
| #include <arch/regutils.h> |
| #include <ddi/irq.h> |
| #include <ddi/device.h> |
| #include <interrupt.h> |
| #ifdef MACHINE_testarm |
| #include <arch/mach/testarm/testarm.h> |
| #endif |
| #ifdef MACHINE_integratorcp |
| #include <arch/mach/integratorcp/integratorcp.h> |
| #endif |
| /** Initial size of a table holding interrupt handlers. */ |
| #define IRQ_COUNT 8 |
| /** Disable interrupts. |
| * |
| * @return Old interrupt priority level. |
| */ |
| ipl_t interrupts_disable(void) |
| { |
| ipl_t ipl = current_status_reg_read(); |
| current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT | ipl); |
| return ipl; |
| } |
| /** Enable interrupts. |
| * |
| * @return Old interrupt priority level. |
| */ |
| ipl_t interrupts_enable(void) |
| { |
| ipl_t ipl = current_status_reg_read(); |
| current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT); |
| return ipl; |
| } |
| /** Restore interrupt priority level. |
| * |
| * @param ipl Saved interrupt priority level. |
| */ |
| void interrupts_restore(ipl_t ipl) |
| { |
| current_status_reg_control_write( |
| (current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) | |
| (ipl & STATUS_REG_IRQ_DISABLED_BIT)); |
| } |
| /** Read interrupt priority level. |
| * |
| * @return Current interrupt priority level. |
| */ |
| ipl_t interrupts_read(void) |
| { |
| return current_status_reg_read(); |
| } |
| /** Initialize basic tables for exception dispatching |
| * and starts the timer. |
| */ |
| void interrupt_init(void) |
| { |
| irq_init(IRQ_COUNT, IRQ_COUNT); |
| machine_timer_irq_start(); |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/start.S |
|---|
| 0,0 → 1,80 |
| # |
| # Copyright (c) 2007 Michal Kebrt |
| # All rights reserved. |
| # |
| # Redistribution and use in source and binary forms, with or without |
| # modification, are permitted provided that the following conditions |
| # are met: |
| # |
| # - Redistributions of source code must retain the above copyright |
| # notice, this list of conditions and the following disclaimer. |
| # - Redistributions in binary form must reproduce the above copyright |
| # notice, this list of conditions and the following disclaimer in the |
| # documentation and/or other materials provided with the distribution. |
| # - The name of the author may not be used to endorse or promote products |
| # derived from this software without specific prior written permission. |
| # |
| # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| # |
| #include <arch/asm/boot.h> |
| .text |
| .global kernel_image_start |
| .global exc_stack |
| .global supervisor_sp |
| kernel_image_start: |
| # initialize Stack pointer for exception modes |
| mrs r4, cpsr |
| bic r4, r4, #0x1f |
| #FIQ Mode |
| orr r3, r4, #0x11 |
| msr cpsr_c, r3 |
| ldr sp, =exc_stack |
| #IRQ Mode |
| orr r3, r4, #0x12 |
| msr cpsr_c, r3 |
| ldr sp, =exc_stack |
| #ABORT Mode |
| orr r3, r4, #0x17 |
| msr cpsr_c, r3 |
| ldr sp, =exc_stack |
| #UNDEFINED Mode |
| orr r3, r4, #0x1b |
| msr cpsr_c, r3 |
| ldr sp, =exc_stack |
| # switch to supervisor mode |
| orr r3, r4, #0x13 |
| msr cpsr_c, r3 |
| ldr sp, =temp_stack |
| bl arch_pre_main |
| bl main_bsp |
| .space TEMP_STACK_SIZE |
| temp_stack: |
| .space 1024 |
| exc_stack: |
| supervisor_sp: |
| .space 4 |
| /tags/0.4.1/kernel/arch/arm32/src/machine_func.c |
|---|
| 0,0 → 1,147 |
| /* |
| * Copyright (c) 2009 Vineeth Pillai |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Definitions of machine specific functions. |
| * |
| * These functions enable to differentiate more kinds of ARM emulators |
| * or CPUs. It's the same concept as "arch" functions on the architecture |
| * level. |
| */ |
| #include <arch/machine_func.h> |
| /** Acquire console back for kernel. */ |
| void machine_grab_console(void) |
| { |
| (machine_ops.machine_grab_console)(); |
| } |
| /** Return console to userspace. */ |
| void machine_release_console(void) |
| { |
| (machine_ops.machine_release_console)(); |
| } |
| /** Maps HW devices to the kernel address space using #hw_map. */ |
| void machine_init(void) |
| { |
| (machine_ops.machine_init)(); |
| } |
| /** Starts timer. */ |
| void machine_timer_irq_start(void) |
| { |
| (machine_ops.machine_timer_irq_start)(); |
| } |
| /** Halts CPU. */ |
| void machine_cpu_halt(void) |
| { |
| (machine_ops.machine_cpu_halt)(); |
| } |
| /** Returns size of available memory. |
| * |
| * @return Size of available memory. |
| */ |
| uintptr_t machine_get_memory_size(void) |
| { |
| return (machine_ops.machine_get_memory_size)(); |
| } |
| /** Initializes the Frame Buffer |
| * |
| */ |
| void machine_fb_init(void) |
| { |
| (machine_ops.machine_fb_init)(); |
| } |
| /** Interrupt exception handler. |
| * |
| * @param exc_no Interrupt exception number. |
| * @param istate Saved processor state. |
| */ |
| void machine_irq_exception(int exc_no, istate_t *istate) |
| { |
| (machine_ops.machine_irq_exception)(exc_no, istate); |
| } |
| /** Returns address of framebuffer device. |
| * |
| * @return Address of framebuffer device. |
| */ |
| uintptr_t machine_get_fb_address(void) |
| { |
| return (machine_ops.machine_get_fb_address)(); |
| } |
| /* |
| * Machine specific frame initialization |
| */ |
| void machine_frame_init(void) |
| { |
| (machine_ops.machine_frame_init)(); |
| } |
| /* |
| * configure the output device. |
| */ |
| void machine_output_init(void) |
| { |
| (machine_ops.machine_output_init)(); |
| } |
| /* |
| * configure the input device. |
| */ |
| void machine_input_init(void) |
| { |
| (machine_ops.machine_input_init)(); |
| } |
| /* |
| * Generic function to use, if sepcific function doesn't define any of the above functions. |
| */ |
| void machine_genfunc() |
| { |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/exc_handler.S |
|---|
| 0,0 → 1,199 |
| # |
| # Copyright (c) 2009 Vineeth Pillai |
| # All rights reserved. |
| # |
| # Redistribution and use in source and binary forms, with or without |
| # modification, are permitted provided that the following conditions |
| # are met: |
| # |
| # - Redistributions of source code must retain the above copyright |
| # notice, this list of conditions and the following disclaimer. |
| # - Redistributions in binary form must reproduce the above copyright |
| # notice, this list of conditions and the following disclaimer in the |
| # documentation and/or other materials provided with the distribution. |
| # - The name of the author may not be used to endorse or promote products |
| # derived from this software without specific prior written permission. |
| # |
| # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| # |
| .text |
| .global irq_exception_entry |
| .global fiq_exception_entry |
| .global data_abort_exception_entry |
| .global prefetch_abort_exception_entry |
| .global undef_instr_exception_entry |
| .global swi_exception_entry |
| .global reset_exception_entry |
| # Switches to kernel stack and saves all registers there. |
| # |
| # The stack frame created by the function looks like: |
| # |
| # |_________________| |
| # | | |
| # | SPSR | |
| # | | |
| # |_________________| |
| # | Stack Pointer | |
| # | of | |
| # | Previous Mode | |
| # |_________________| |
| # | Return address | |
| # | of | |
| # | Previous Mode | |
| # |_________________| |
| # | R0 - R12 | |
| # | of | |
| # | Previous Mode | |
| # |_________________| |
| # | Return address | |
| # | from | |
| # |Exception Handler| |
| # |_________________| |
| # | | |
| # |
| # |
| .macro SAVE_REGS_TO_STACK |
| stmfd r13!, {r0-r3} |
| mov r3, sp |
| add sp, sp, #16 |
| mrs r1, cpsr |
| bic r1, r1, #0x1f |
| mrs r2, spsr |
| and r0, r2, #0x1f |
| cmp r0, #0x10 |
| bne 1f |
| # prev mode was usermode |
| mov r0, lr |
| # Switch to supervisor mode |
| orr r1, r1, #0x13 |
| msr cpsr_c, r1 |
| # Load sp with [supervisor_sp] |
| ldr r13, =supervisor_sp |
| ldr r13, [r13] |
| # Populate the stack frame |
| msr spsr, r2 |
| mov lr, r0 |
| stmfd r13!, {lr} |
| stmfd r13!, {r4-r12} |
| ldmfd r3!, {r4-r7} |
| stmfd r13!, {r4-r7} |
| stmfd r13!, {r13, lr}^ |
| stmfd r13!, {r2} |
| b 2f |
| # mode was not usermode |
| 1: |
| # Switch to previous mode which is undoubtedly the supervisor mode |
| orr r1, r1, r0 |
| mov r0, lr |
| msr cpsr_c, r1 |
| # Populate the stack frame |
| mov r1, sp |
| stmfd r13!, {r0} |
| stmfd r13!, {r4-r12} |
| # Store r0-r3 in r4-r7 and then push it on to stack |
| ldmfd r3!, {r4-r7} |
| stmfd r13!, {r4-r7} |
| # Push return address and stack pointer on to stack |
| stmfd r13!, {lr} |
| stmfd r13!, {r1} |
| mov lr, r0 |
| msr spsr, r2 |
| stmfd r13!, {r2} |
| 2: |
| .endm |
| .macro LOAD_REGS_FROM_STACK |
| ldmfd r13!, {r0} |
| msr spsr, r0 |
| and r0, r0, #0x1f |
| cmp r0, #0x10 |
| bne 1f |
| # return to user mode |
| ldmfd r13!, {r13, lr}^ |
| b 2f |
| # return to non-user mode |
| 1: |
| ldmfd r13!, {r1, lr} |
| 2: |
| ldmfd r13!, {r0-r12, pc}^ |
| .endm |
| reset_exception_entry: |
| SAVE_REGS_TO_STACK |
| mov r0, #0 |
| mov r1, r13 |
| bl exc_dispatch |
| LOAD_REGS_FROM_STACK |
| irq_exception_entry: |
| sub lr, lr, #4 |
| SAVE_REGS_TO_STACK |
| mov r0, #5 |
| mov r1, r13 |
| bl exc_dispatch |
| LOAD_REGS_FROM_STACK |
| fiq_exception_entry: |
| sub lr, lr, #4 |
| SAVE_REGS_TO_STACK |
| mov r0, #6 |
| mov r1, r13 |
| bl exc_dispatch |
| LOAD_REGS_FROM_STACK |
| undef_instr_exception_entry: |
| SAVE_REGS_TO_STACK |
| mov r0, #1 |
| mov r1, r13 |
| bl exc_dispatch |
| LOAD_REGS_FROM_STACK |
| prefetch_abort_exception_entry: |
| sub lr, lr, #4 |
| SAVE_REGS_TO_STACK |
| mov r0, #3 |
| mov r1, r13 |
| bl exc_dispatch |
| LOAD_REGS_FROM_STACK |
| data_abort_exception_entry: |
| sub lr, lr, #8 |
| SAVE_REGS_TO_STACK |
| mov r0, #4 |
| mov r1, r13 |
| bl exc_dispatch |
| LOAD_REGS_FROM_STACK |
| swi_exception_entry: |
| ldr r13, =exc_stack |
| SAVE_REGS_TO_STACK |
| mov r0, #2 |
| mov r1, r13 |
| bl exc_dispatch |
| LOAD_REGS_FROM_STACK |
| /tags/0.4.1/kernel/arch/arm32/src/asm.S |
|---|
| 0,0 → 1,103 |
| # |
| # Copyright (c) 2007 Michal Kebrt |
| # All rights reserved. |
| # |
| # Redistribution and use in source and binary forms, with or without |
| # modification, are permitted provided that the following conditions |
| # are met: |
| # |
| # - Redistributions of source code must retain the above copyright |
| # notice, this list of conditions and the following disclaimer. |
| # - Redistributions in binary form must reproduce the above copyright |
| # notice, this list of conditions and the following disclaimer in the |
| # documentation and/or other materials provided with the distribution. |
| # - The name of the author may not be used to endorse or promote products |
| # derived from this software without specific prior written permission. |
| # |
| # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| # |
| .text |
| .global memsetb |
| .global memsetw |
| .global memcpy |
| .global memcpy_from_uspace |
| .global memcpy_to_uspace |
| .global memcpy_from_uspace_failover_address |
| .global memcpy_to_uspace_failover_address |
| memsetb: |
| b _memsetb |
| memsetw: |
| b _memsetw |
| memcpy: |
| memcpy_from_uspace: |
| memcpy_to_uspace: |
| add r3, r1, #3 |
| bic r3, r3, #3 |
| cmp r1, r3 |
| stmdb sp!, {r4, r5, lr} |
| mov r5, r0 /* save dst */ |
| beq 4f |
| 1: |
| cmp r2, #0 |
| movne ip, #0 |
| beq 3f |
| 2: |
| ldrb r3, [ip, r1] |
| strb r3, [ip, r0] |
| add ip, ip, #1 |
| cmp ip, r2 |
| bne 2b |
| 3: |
| mov r0, r5 |
| ldmia sp!, {r4, r5, pc} |
| 4: |
| add r3, r0, #3 |
| bic r3, r3, #3 |
| cmp r0, r3 |
| bne 1b |
| movs r4, r2, lsr #2 |
| moveq lr, r4 |
| beq 6f |
| mov lr, #0 |
| mov ip, lr |
| 5: |
| ldr r3, [ip, r1] |
| add lr, lr, #1 |
| cmp lr, r4 |
| str r3, [ip, r0] |
| add ip, ip, #4 |
| bne 5b |
| 6: |
| ands r4, r2, #3 |
| beq 3b |
| mov r3, lr, lsl #2 |
| add r0, r3, r0 |
| add ip, r3, r1 |
| mov r2, #0 |
| 7: |
| ldrb r3, [r2, ip] |
| strb r3, [r2, r0] |
| add r2, r2, #1 |
| cmp r2, r4 |
| bne 7b |
| b 3b |
| memcpy_from_uspace_failover_address: |
| memcpy_to_uspace_failover_address: |
| mov r0, #0 |
| ldmia sp!, {r4, r5, pc} |
| /tags/0.4.1/kernel/arch/arm32/src/panic.S |
|---|
| 0,0 → 1,35 |
| # |
| # Copyright (c) 2007 Michal Kebrt |
| # All rights reserved. |
| # |
| # Redistribution and use in source and binary forms, with or without |
| # modification, are permitted provided that the following conditions |
| # are met: |
| # |
| # - Redistributions of source code must retain the above copyright |
| # notice, this list of conditions and the following disclaimer. |
| # - Redistributions in binary form must reproduce the above copyright |
| # notice, this list of conditions and the following disclaimer in the |
| # documentation and/or other materials provided with the distribution. |
| # - The name of the author may not be used to endorse or promote products |
| # derived from this software without specific prior written permission. |
| # |
| # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| # |
| .text |
| .global panic_printf |
| panic_printf: |
| bl printf |
| bl cpu_halt |
| /tags/0.4.1/kernel/arch/arm32/src/cpu/cpu.c |
|---|
| 0,0 → 1,131 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief CPU identification. |
| */ |
| #include <arch/cpu.h> |
| #include <cpu.h> |
| #include <arch.h> |
| #include <print.h> |
| /** Number of indexes left out in the #imp_data array */ |
| #define IMP_DATA_START_OFFSET 0x40 |
| /** Implementators (vendor) names */ |
| static char *imp_data[] = { |
| "?", /* IMP_DATA_START_OFFSET */ |
| "ARM Ltd", /* 0x41 */ |
| "", /* 0x42 */ |
| "", /* 0x43 */ |
| "Digital Equipment Corporation", /* 0x44 */ |
| "", "", "", "", "", "", "", "", "", "", /* 0x45 - 0x4e */ |
| "", "", "", "", "", "", "", "", "", "", /* 0x4f - 0x58 */ |
| "", "", "", "", "", "", "", "", "", "", /* 0x59 - 0x62 */ |
| "", "", "", "", "", "", /* 0x63 - 0x68 */ |
| "Intel Corporation" /* 0x69 */ |
| }; |
| /** Length of the #imp_data array */ |
| static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *); |
| /** Architecture names */ |
| static char *arch_data[] = { |
| "?", /* 0x0 */ |
| "4", /* 0x1 */ |
| "4T", /* 0x2 */ |
| "5", /* 0x3 */ |
| "5T", /* 0x4 */ |
| "5TE", /* 0x5 */ |
| "5TEJ", /* 0x6 */ |
| "6" /* 0x7 */ |
| }; |
| /** Length of the #arch_data array */ |
| static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *); |
| /** Retrieves processor identification from CP15 register 0. |
| * |
| * @param cpu Structure for storing CPU identification. |
| */ |
| static void arch_cpu_identify(cpu_arch_t *cpu) |
| { |
| uint32_t ident; |
| asm volatile ( |
| "mrc p15, 0, %[ident], c0, c0, 0\n" |
| : [ident] "=r" (ident) |
| ); |
| cpu->imp_num = ident >> 24; |
| cpu->variant_num = (ident << 8) >> 28; |
| cpu->arch_num = (ident << 12) >> 28; |
| cpu->prim_part_num = (ident << 16) >> 20; |
| cpu->rev_num = (ident << 28) >> 28; |
| } |
| /** Does nothing on ARM. */ |
| void cpu_arch_init(void) |
| { |
| } |
| /** Retrieves processor identification and stores it to #CPU.arch */ |
| void cpu_identify(void) |
| { |
| arch_cpu_identify(&CPU->arch); |
| } |
| /** Prints CPU identification. */ |
| void cpu_print_report(cpu_t *m) |
| { |
| char * vendor = imp_data[0]; |
| char * architecture = arch_data[0]; |
| cpu_arch_t * cpu_arch = &m->arch; |
| if ((cpu_arch->imp_num) > 0 && |
| (cpu_arch->imp_num < (imp_data_length + IMP_DATA_START_OFFSET))) { |
| vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET]; |
| } |
| if ((cpu_arch->arch_num) > 0 && |
| (cpu_arch->arch_num < arch_data_length)) { |
| architecture = arch_data[cpu_arch->arch_num]; |
| } |
| printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, " |
| "variant=%x, revision=%x\n", |
| m->id, vendor, architecture, cpu_arch->prim_part_num, |
| cpu_arch->variant_num, cpu_arch->rev_num); |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/userspace.c |
|---|
| 0,0 → 1,106 |
| /* |
| * Copyright (c) 2007 Petr Stepan, Pavel Jancik |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Userspace switch. |
| */ |
| #include <userspace.h> |
| /** Struct for holding all general purpose registers. |
| * |
| * Used to set registers when going to userspace. |
| */ |
| typedef struct { |
| uint32_t r0; |
| uint32_t r1; |
| uint32_t r2; |
| uint32_t r3; |
| uint32_t r4; |
| uint32_t r5; |
| uint32_t r6; |
| uint32_t r7; |
| uint32_t r8; |
| uint32_t r9; |
| uint32_t r10; |
| uint32_t r11; |
| uint32_t r12; |
| uint32_t sp; |
| uint32_t lr; |
| uint32_t pc; |
| } ustate_t; |
| /** Changes processor mode and jumps to the address specified in the first |
| * parameter. |
| * |
| * @param kernel_uarg Userspace settings (entry point, stack, ...). |
| */ |
| void userspace(uspace_arg_t *kernel_uarg) |
| { |
| volatile ustate_t ustate; |
| /* set first parameter */ |
| ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg; |
| /* %r1 is defined to hold pcb_ptr - set it to 0 */ |
| ustate.r1 = 0; |
| /* clear other registers */ |
| ustate.r2 = ustate.r3 = ustate.r4 = ustate.r5 = |
| ustate.r6 = ustate.r7 = ustate.r8 = ustate.r9 = ustate.r10 = |
| ustate.r11 = ustate.r12 = ustate.lr = 0; |
| /* set user stack */ |
| ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) + PAGE_SIZE; |
| /* set where uspace execution starts */ |
| ustate.pc = (uintptr_t) kernel_uarg->uspace_entry; |
| /* status register in user mode */ |
| ipl_t user_mode = current_status_reg_read() & |
| (~STATUS_REG_MODE_MASK | USER_MODE); |
| /* set user mode, set registers, jump */ |
| asm volatile ( |
| "mov sp, %[ustate]\n" |
| "msr spsr_c, %[user_mode]\n" |
| "ldmfd sp!, {r0-r12, sp, lr}^\n" |
| "ldmfd sp!, {pc}^\n" |
| :: [ustate] "r" (&ustate), [user_mode] "r" (user_mode) |
| ); |
| /* unreachable */ |
| while(1) |
| ; |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/ddi/ddi.c |
|---|
| 0,0 → 1,56 |
| /* |
| * Copyright (c) 2006 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32ddi |
| * @{ |
| */ |
| /** @file |
| * @brief DDI. |
| */ |
| #include <ddi/ddi.h> |
| #include <proc/task.h> |
| #include <arch/types.h> |
| /** Enable I/O space range for task. |
| * |
| * Interrupts are disabled and task is locked. |
| * |
| * @param task Task. |
| * @param ioaddr Startign I/O space address. |
| * @param size Size of the enabled I/O range. |
| * |
| * @return 0 on success or an error code from errno.h. |
| */ |
| int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size) |
| { |
| return 0; |
| } |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/src/context.S |
|---|
| 0,0 → 1,59 |
| # |
| # Copyright (c) 2007 Petr Stepan |
| # All rights reserved. |
| # |
| # Redistribution and use in source and binary forms, with or without |
| # modification, are permitted provided that the following conditions |
| # are met: |
| # |
| # - Redistributions of source code must retain the above copyright |
| # notice, this list of conditions and the following disclaimer. |
| # - Redistributions in binary form must reproduce the above copyright |
| # notice, this list of conditions and the following disclaimer in the |
| # documentation and/or other materials provided with the distribution. |
| # - The name of the author may not be used to endorse or promote products |
| # derived from this software without specific prior written permission. |
| # |
| # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| # |
| .text |
| .global context_save_arch |
| .global context_restore_arch |
| context_save_arch: |
| stmfd sp!, {r1} |
| mrs r1, cpsr |
| and r1, r1, #0x1f |
| stmia r0!, {r1} |
| ldmfd sp!, {r1} |
| stmia r0!, {sp, lr} |
| stmia r0!, {r4-r11} |
| mov r0, #1 |
| mov pc, lr |
| context_restore_arch: |
| ldmia r0!, {r4} |
| mrs r5, cpsr |
| bic r5, r5, #0x1f |
| orr r5, r5, r4 |
| msr cpsr_c, r5 |
| ldmia r0!, {sp, lr} |
| ldmia r0!, {r4-r11} |
| mov r0, #0 |
| mov pc, lr |
| /tags/0.4.1/kernel/arch/arm32/src/dummy.S |
|---|
| 0,0 → 1,64 |
| # |
| # Copyright (c) 2007 Michal Kebry, Pavel Jancik, Petr Stepan |
| # All rights reserved. |
| # |
| # Redistribution and use in source and binary forms, with or without |
| # modification, are permitted provided that the following conditions |
| # are met: |
| # |
| # - Redistributions of source code must retain the above copyright |
| # notice, this list of conditions and the following disclaimer. |
| # - Redistributions in binary form must reproduce the above copyright |
| # notice, this list of conditions and the following disclaimer in the |
| # documentation and/or other materials provided with the distribution. |
| # - The name of the author may not be used to endorse or promote products |
| # derived from this software without specific prior written permission. |
| # |
| # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| # |
| .text |
| .global calibrate_delay_loop |
| .global asm_delay_loop |
| .global fpu_context_restore |
| .global fpu_context_save |
| .global fpu_enable |
| .global fpu_init |
| .global sys_tls_set |
| .global dummy |
| calibrate_delay_loop: |
| mov pc, lr |
| asm_delay_loop: |
| mov pc, lr |
| fpu_context_restore: |
| mov pc, lr |
| fpu_context_save: |
| mov pc, lr |
| fpu_enable: |
| mov pc, lr |
| fpu_init: |
| mov pc, lr |
| # not used on ARM |
| sys_tls_set: |
| dummy: |
| mov pc, lr |
| /tags/0.4.1/kernel/arch/arm32/include/mach/testarm/testarm.h |
|---|
| 0,0 → 1,87 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * Copyright (c) 2009 Vineeth Pillai |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32gxemul GXemul |
| * @brief GXemul machine specific parts. |
| * @ingroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief GXemul peripheries drivers declarations. |
| */ |
| #ifndef KERN_arm32_MACHINE_H_ |
| #define KERN_arm32_MACHINE_H_ |
| #include <arch/machine_func.h> |
| /** Last interrupt number (beginning from 0) whose status is probed |
| * from interrupt controller |
| */ |
| #define GXEMUL_IRQC_MAX_IRQ 8 |
| #define GXEMUL_KBD_IRQ 2 |
| #define GXEMUL_TIMER_IRQ 4 |
| /** Timer frequency */ |
| #define GXEMUL_TIMER_FREQ 100 |
| #define GXEMUL_KBD_ADDRESS 0x10000000 |
| #define GXEMUL_MP_ADDRESS 0x11000000 |
| #define GXEMUL_FB_ADDRESS 0x12000000 |
| #define GXEMUL_RTC_ADDRESS 0x15000000 |
| #define GXEMUL_IRQC_ADDRESS 0x16000000 |
| extern void *gxemul_kbd; |
| extern void *gxemul_rtc; |
| extern void *gxemul_irqc; |
| #define GXEMUL_HALT_OFFSET 0x010 |
| #define GXEMUL_RTC_FREQ_OFFSET 0x100 |
| #define GXEMUL_MP_MEMSIZE_OFFSET 0x090 |
| #define GXEMUL_RTC_ACK_OFFSET 0x110 |
| extern void gxemul_init(void); |
| extern void gxemul_fb_init(void); |
| extern void gxemul_output_init(void); |
| extern void gxemul_input_init(void); |
| extern void gxemul_release_console(void); |
| extern void gxemul_grab_console(void); |
| extern void gxemul_timer_irq_start(void); |
| extern void gxemul_cpu_halt(void); |
| extern void gxemul_irq_exception(int exc_no, istate_t *istate); |
| extern uintptr_t gxemul_get_memory_size(void); |
| extern uintptr_t gxemul_get_fb_address(void); |
| extern void gxemul_fb_init(void); |
| extern void gxemul_frame_init(void); |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/mach/integratorcp/integratorcp.h |
|---|
| 0,0 → 1,116 |
| /* |
| * Copyright (c) 2009 Vineeth Pillai |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32integratorcp |
| * @brief Integratorcp machine specific parts. |
| * @ingroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Integratorcp peripheries drivers declarations. |
| */ |
| #ifndef KERN_arm32_MACHINE_H_ |
| #define KERN_arm32_MACHINE_H_ |
| #include <arch/machine_func.h> |
| /** Last interrupt number (beginning from 0) whose status is probed |
| * from interrupt controller |
| */ |
| #define ICP_IRQC_MAX_IRQ 8 |
| #define ICP_KBD_IRQ 3 |
| #define ICP_TIMER_IRQ 6 |
| /** Timer frequency */ |
| #define ICP_TIMER_FREQ 10000 |
| #define ICP_UART 0x16000000 |
| #define ICP_KBD 0x18000000 |
| #define ICP_KBD_STAT 0x04 |
| #define ICP_KBD_DATA 0x08 |
| #define ICP_KBD_INTR_STAT 0x10 |
| #define ICP_RTC 0x13000000 |
| #define ICP_RTC1_LOAD_OFFSET 0x100 |
| #define ICP_RTC1_READ_OFFSET 0x104 |
| #define ICP_RTC1_CTL_OFFSET 0x108 |
| #define ICP_RTC1_INTRCLR_OFFSET 0x10C |
| #define ICP_RTC1_INTRSTAT_OFFSET 0x114 |
| #define ICP_RTC1_BGLOAD_OFFSET 0x118 |
| #define ICP_RTC_CTL_VALUE 0x00E2 |
| #define ICP_IRQC 0x14000000 |
| #define ICP_IRQC_MASK_OFFSET 0xC |
| #define ICP_IRQC_UNMASK_OFFSET 0x8 |
| #define ICP_FB 0x00800000 |
| #define ICP_FB_FRAME (ICP_FB >> 12) |
| #define ICP_FB_NUM_FRAME 512 |
| #define ICP_VGA 0xC0000000 |
| #define ICP_CMCR 0x10000000 |
| #define ICP_SDRAM_MASK 0x1C |
| #define ICP_SDRAMCR_OFFSET 0x20 |
| typedef struct { |
| uintptr_t uart; |
| uintptr_t kbd_ctrl; |
| uintptr_t kbd_stat; |
| uintptr_t kbd_data; |
| uintptr_t kbd_intstat; |
| uintptr_t rtc; |
| uintptr_t rtc1_load; |
| uintptr_t rtc1_read; |
| uintptr_t rtc1_ctl; |
| uintptr_t rtc1_intrclr; |
| uintptr_t rtc1_intrstat; |
| uintptr_t rtc1_bgload; |
| uintptr_t irqc; |
| uintptr_t irqc_mask; |
| uintptr_t irqc_unmask; |
| uintptr_t vga; |
| uintptr_t cmcr; |
| uintptr_t sdramcr; |
| } icp_hw_map_t; |
| extern void icp_init(void); |
| extern void icp_fb_init(void); |
| extern void icp_output_init(void); |
| extern void icp_input_init(void); |
| extern void icp_release_console(void); |
| extern void icp_grab_console(void); |
| extern void icp_timer_irq_start(void); |
| extern void icp_cpu_halt(void); |
| extern void icp_irq_exception(int exc_no, istate_t *istate); |
| extern uintptr_t icp_get_memory_size(void); |
| extern uintptr_t icp_get_fb_address(void); |
| extern void icp_fb_init(void); |
| extern void icp_frame_init(void); |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/exception.h |
|---|
| 0,0 → 1,151 |
| /* |
| * Copyright (c) 2007 Michal Kebrt, Petr Stepan |
| * |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Exception declarations. |
| */ |
| #ifndef KERN_arm32_EXCEPTION_H_ |
| #define KERN_arm32_EXCEPTION_H_ |
| #include <arch/types.h> |
| #include <arch/regutils.h> |
| /** If defined, forces using of high exception vectors. */ |
| #define HIGH_EXCEPTION_VECTORS |
| #ifdef HIGH_EXCEPTION_VECTORS |
| #define EXC_BASE_ADDRESS 0xffff0000 |
| #else |
| #define EXC_BASE_ADDRESS 0x0 |
| #endif |
| /* Exception Vectors */ |
| #define EXC_RESET_VEC (EXC_BASE_ADDRESS + 0x0) |
| #define EXC_UNDEF_INSTR_VEC (EXC_BASE_ADDRESS + 0x4) |
| #define EXC_SWI_VEC (EXC_BASE_ADDRESS + 0x8) |
| #define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc) |
| #define EXC_DATA_ABORT_VEC (EXC_BASE_ADDRESS + 0x10) |
| #define EXC_IRQ_VEC (EXC_BASE_ADDRESS + 0x18) |
| #define EXC_FIQ_VEC (EXC_BASE_ADDRESS + 0x1c) |
| /* Exception numbers */ |
| #define EXC_RESET 0 |
| #define EXC_UNDEF_INSTR 1 |
| #define EXC_SWI 2 |
| #define EXC_PREFETCH_ABORT 3 |
| #define EXC_DATA_ABORT 4 |
| #define EXC_IRQ 5 |
| #define EXC_FIQ 6 |
| /** Kernel stack pointer. |
| * |
| * It is set when thread switches to user mode, |
| * and then used for exception handling. |
| */ |
| extern uintptr_t supervisor_sp; |
| /** Temporary exception stack pointer. |
| * |
| * Temporary stack is used in exceptions handling routines |
| * before switching to thread's kernel stack. |
| */ |
| extern uintptr_t exc_stack; |
| /** Struct representing CPU state saved when an exception occurs. */ |
| typedef struct { |
| uint32_t spsr; |
| uint32_t sp; |
| uint32_t lr; |
| uint32_t r0; |
| uint32_t r1; |
| uint32_t r2; |
| uint32_t r3; |
| uint32_t r4; |
| uint32_t r5; |
| uint32_t r6; |
| uint32_t r7; |
| uint32_t r8; |
| uint32_t r9; |
| uint32_t r10; |
| uint32_t r11; |
| uint32_t r12; |
| uint32_t pc; |
| } istate_t; |
| /** Sets Program Counter member of given istate structure. |
| * |
| * @param istate istate structure |
| * @param retaddr new value of istate's PC member |
| */ |
| static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr) |
| { |
| istate->pc = retaddr; |
| } |
| /** Returns true if exception happened while in userspace. */ |
| static inline int istate_from_uspace(istate_t *istate) |
| { |
| return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE; |
| } |
| /** Returns Program Counter member of given istate structure. */ |
| static inline unative_t istate_get_pc(istate_t *istate) |
| { |
| return istate->pc; |
| } |
| extern void install_exception_handlers(void); |
| extern void exception_init(void); |
| extern void print_istate(istate_t *istate); |
| extern void reset_exception_entry(void); |
| extern void irq_exception_entry(void); |
| extern void fiq_exception_entry(void); |
| extern void undef_instr_exception_entry(void); |
| extern void prefetch_abort_exception_entry(void); |
| extern void data_abort_exception_entry(void); |
| extern void swi_exception_entry(void); |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/machine_func.h |
|---|
| 0,0 → 1,132 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * Copyright (c) 2009 Vineeth Pillai |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Declarations of machine specific functions. |
| * |
| * These functions enable to differentiate more kinds of ARM emulators |
| * or CPUs. It's the same concept as "arch" functions on the architecture |
| * level. |
| */ |
| #ifndef KERN_arm32_MACHINE_FUNC_H_ |
| #define KERN_arm32_MACHINE_FUNC_H_ |
| #include <console/console.h> |
| #include <arch/types.h> |
| #include <arch/exception.h> |
| #define MACHINE_GENFUNC machine_genfunc |
| struct arm_machine_ops { |
| void (*machine_grab_console)(void); |
| void (*machine_release_console)(void); |
| void (*machine_init)(void); |
| void (*machine_timer_irq_start)(void); |
| void (*machine_cpu_halt)(void); |
| uintptr_t (*machine_get_memory_size)(void); |
| void (*machine_fb_init)(void); |
| void (*machine_irq_exception)(int, istate_t*); |
| uintptr_t (*machine_get_fb_address)(void); |
| void (*machine_frame_init)(void); |
| void (*machine_output_init)(void); |
| void (*machine_input_init)(void); |
| }; |
| extern struct arm_machine_ops machine_ops; |
| /** Acquire console back for kernel. */ |
| extern void machine_grab_console(void); |
| /** Return console to userspace. */ |
| extern void machine_release_console(void); |
| /** Maps HW devices to the kernel address space using #hw_map. */ |
| extern void machine_init(void); |
| /** Starts timer. */ |
| extern void machine_timer_irq_start(void); |
| /** Halts CPU. */ |
| extern void machine_cpu_halt(void); |
| /** Returns size of available memory. |
| * |
| * @return Size of available memory. |
| */ |
| extern uintptr_t machine_get_memory_size(void); |
| /** Initializes the Frame Buffer |
| * |
| */ |
| extern void machine_fb_init(void); |
| /** Interrupt exception handler. |
| * |
| * @param exc_no Interrupt exception number. |
| * @param istate Saved processor state. |
| */ |
| extern void machine_irq_exception(int exc_no, istate_t *istate); |
| /** Returns address of framebuffer device. |
| * |
| * @return Address of framebuffer device. |
| */ |
| extern uintptr_t machine_get_fb_address(void); |
| /* |
| * Machine specific frame initialization |
| */ |
| extern void machine_frame_init(void); |
| /* |
| * configure the serial line output device. |
| */ |
| extern void machine_output_init(void); |
| /* |
| * configure the serial line input device. |
| */ |
| extern void machine_input_init(void); |
| extern void machine_genfunc(void); |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/types.h |
|---|
| 0,0 → 1,101 |
| /* |
| * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Type definitions. |
| */ |
| #ifndef KERN_arm32_TYPES_H_ |
| #define KERN_arm32_TYPES_H_ |
| #ifndef DOXYGEN |
| # define ATTRIBUTE_PACKED __attribute__ ((packed)) |
| #else |
| # define ATTRIBUTE_PACKED |
| #endif |
| typedef signed char int8_t; |
| typedef signed short int16_t; |
| typedef signed long int32_t; |
| typedef signed long long int64_t; |
| typedef unsigned char uint8_t; |
| typedef unsigned short uint16_t; |
| typedef unsigned long uint32_t; |
| typedef unsigned long long uint64_t; |
| typedef uint32_t size_t; |
| typedef uint32_t uintptr_t; |
| typedef uint32_t pfn_t; |
| typedef uint32_t ipl_t; |
| typedef uint32_t unative_t; |
| typedef int32_t native_t; |
| typedef struct { |
| } fncptr_t; |
| #define PRIp "x" /**< Format for uintptr_t. */ |
| #define PRIs "u" /**< Format for size_t. */ |
| #define PRId8 "d" /**< Format for int8_t. */ |
| #define PRId16 "d" /**< Format for int16_t. */ |
| #define PRId32 "d" /**< Format for int32_t. */ |
| #define PRId64 "lld" /**< Format for int64_t. */ |
| #define PRIdn "d" /**< Format for native_t. */ |
| #define PRIu8 "u" /**< Format for uint8_t. */ |
| #define PRIu16 "u" /**< Format for uint16_t. */ |
| #define PRIu32 "u" /**< Format for uint32_t. */ |
| #define PRIu64 "llu" /**< Format for uint64_t. */ |
| #define PRIun "u" /**< Format for unative_t. */ |
| #define PRIx8 "x" /**< Format for hexadecimal (u)int8_t. */ |
| #define PRIx16 "x" /**< Format for hexadecimal (u)int16_t. */ |
| #define PRIx32 "x" /**< Format for hexadecimal (u)uint32_t. */ |
| #define PRIx64 "llx" /**< Format for hexadecimal (u)int64_t. */ |
| #define PRIxn "x" /**< Format for hexadecimal (u)native_t. */ |
| /** Page table entry. |
| * |
| * We have different structs for level 0 and level 1 page table entries. |
| * See page.h for definition of pte_level*_t. |
| */ |
| typedef struct { |
| unsigned dummy : 32; |
| } pte_t; |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/mm/page.h |
|---|
| 0,0 → 1,319 |
| /* |
| * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32mm |
| * @{ |
| */ |
| /** @file |
| * @brief Paging related declarations. |
| */ |
| #ifndef KERN_arm32_PAGE_H_ |
| #define KERN_arm32_PAGE_H_ |
| #include <arch/mm/frame.h> |
| #include <mm/mm.h> |
| #include <arch/exception.h> |
| #define PAGE_WIDTH FRAME_WIDTH |
| #define PAGE_SIZE FRAME_SIZE |
| #ifndef __ASM__ |
| # define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) |
| # define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) |
| #else |
| # define KA2PA(x) ((x) - 0x80000000) |
| # define PA2KA(x) ((x) + 0x80000000) |
| #endif |
| #ifdef KERNEL |
| /* Number of entries in each level. */ |
| #define PTL0_ENTRIES_ARCH (2 << 12) /* 4096 */ |
| #define PTL1_ENTRIES_ARCH 0 |
| #define PTL2_ENTRIES_ARCH 0 |
| /* coarse page tables used (256 * 4 = 1KB per page) */ |
| #define PTL3_ENTRIES_ARCH (2 << 8) /* 256 */ |
| /* Page table sizes for each level. */ |
| #define PTL0_SIZE_ARCH FOUR_FRAMES |
| #define PTL1_SIZE_ARCH 0 |
| #define PTL2_SIZE_ARCH 0 |
| #define PTL3_SIZE_ARCH ONE_FRAME |
| /* Macros calculating indices into page tables for each level. */ |
| #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 20) & 0xfff) |
| #define PTL1_INDEX_ARCH(vaddr) 0 |
| #define PTL2_INDEX_ARCH(vaddr) 0 |
| #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x0ff) |
| /* Get PTE address accessors for each level. */ |
| #define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ |
| ((pte_t *) ((((pte_level0_t *)(ptl0))[(i)]).coarse_table_addr << 10)) |
| #define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ |
| (ptl1) |
| #define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ |
| (ptl2) |
| #define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ |
| ((uintptr_t) ((((pte_level1_t *)(ptl3))[(i)]).frame_base_addr << 12)) |
| /* Set PTE address accessors for each level. */ |
| #define SET_PTL0_ADDRESS_ARCH(ptl0) \ |
| (set_ptl0_addr((pte_level0_t *) (ptl0))) |
| #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ |
| (((pte_level0_t *) (ptl0))[(i)].coarse_table_addr = (a) >> 10) |
| #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
| #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
| #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ |
| (((pte_level1_t *) (ptl3))[(i)].frame_base_addr = (a) >> 12) |
| /* Get PTE flags accessors for each level. */ |
| #define GET_PTL1_FLAGS_ARCH(ptl0, i) \ |
| get_pt_level0_flags((pte_level0_t *) (ptl0), (size_t) (i)) |
| #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ |
| PAGE_PRESENT |
| #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ |
| PAGE_PRESENT |
| #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ |
| get_pt_level1_flags((pte_level1_t *) (ptl3), (size_t) (i)) |
| /* Set PTE flags accessors for each level. */ |
| #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ |
| set_pt_level0_flags((pte_level0_t *) (ptl0), (size_t) (i), (x)) |
| #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
| #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
| #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ |
| set_pt_level1_flags((pte_level1_t *) (ptl3), (size_t) (i), (x)) |
| /* Macros for querying the last-level PTE entries. */ |
| #define PTE_VALID_ARCH(pte) \ |
| (*((uint32_t *) (pte)) != 0) |
| #define PTE_PRESENT_ARCH(pte) \ |
| (((pte_level0_t *) (pte))->descriptor_type != 0) |
| #define PTE_GET_FRAME_ARCH(pte) \ |
| (((pte_level1_t *) (pte))->frame_base_addr << FRAME_WIDTH) |
| #define PTE_WRITABLE_ARCH(pte) \ |
| (((pte_level1_t *) (pte))->access_permission_0 == \ |
| PTE_AP_USER_RW_KERNEL_RW) |
| #define PTE_EXECUTABLE_ARCH(pte) \ |
| 1 |
| #ifndef __ASM__ |
| /** Level 0 page table entry. */ |
| typedef struct { |
| /* 0b01 for coarse tables, see below for details */ |
| unsigned descriptor_type : 2; |
| unsigned impl_specific : 3; |
| unsigned domain : 4; |
| unsigned should_be_zero : 1; |
| /* Pointer to the coarse 2nd level page table (holding entries for small |
| * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page |
| * tables that may hold even tiny pages (1KB) but they are bigger (4KB |
| * per table in comparison with 1KB per the coarse table) |
| */ |
| unsigned coarse_table_addr : 22; |
| } ATTRIBUTE_PACKED pte_level0_t; |
| /** Level 1 page table entry (small (4KB) pages used). */ |
| typedef struct { |
| /* 0b10 for small pages */ |
| unsigned descriptor_type : 2; |
| unsigned bufferable : 1; |
| unsigned cacheable : 1; |
| /* access permissions for each of 4 subparts of a page |
| * (for each 1KB when small pages used */ |
| unsigned access_permission_0 : 2; |
| unsigned access_permission_1 : 2; |
| unsigned access_permission_2 : 2; |
| unsigned access_permission_3 : 2; |
| unsigned frame_base_addr : 20; |
| } ATTRIBUTE_PACKED pte_level1_t; |
| /* Level 1 page tables access permissions */ |
| /** User mode: no access, privileged mode: no access. */ |
| #define PTE_AP_USER_NO_KERNEL_NO 0 |
| /** User mode: no access, privileged mode: read/write. */ |
| #define PTE_AP_USER_NO_KERNEL_RW 1 |
| /** User mode: read only, privileged mode: read/write. */ |
| #define PTE_AP_USER_RO_KERNEL_RW 2 |
| /** User mode: read/write, privileged mode: read/write. */ |
| #define PTE_AP_USER_RW_KERNEL_RW 3 |
| /* pte_level0_t and pte_level1_t descriptor_type flags */ |
| /** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type). */ |
| #define PTE_DESCRIPTOR_NOT_PRESENT 0 |
| /** pte_level0_t coarse page table flag (used in descriptor_type). */ |
| #define PTE_DESCRIPTOR_COARSE_TABLE 1 |
| /** pte_level1_t small page table flag (used in descriptor type). */ |
| #define PTE_DESCRIPTOR_SMALL_PAGE 2 |
| /** Sets the address of level 0 page table. |
| * |
| * @param pt Pointer to the page table to set. |
| */ |
| static inline void set_ptl0_addr(pte_level0_t *pt) |
| { |
| asm volatile ( |
| "mcr p15, 0, %[pt], c2, c0, 0\n" |
| :: [pt] "r" (pt) |
| ); |
| } |
| /** Returns level 0 page table entry flags. |
| * |
| * @param pt Level 0 page table. |
| * @param i Index of the entry to return. |
| */ |
| static inline int get_pt_level0_flags(pte_level0_t *pt, size_t i) |
| { |
| pte_level0_t *p = &pt[i]; |
| int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); |
| return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | |
| (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) | |
| (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT); |
| } |
| /** Returns level 1 page table entry flags. |
| * |
| * @param pt Level 1 page table. |
| * @param i Index of the entry to return. |
| */ |
| static inline int get_pt_level1_flags(pte_level1_t *pt, size_t i) |
| { |
| pte_level1_t *p = &pt[i]; |
| int dt = p->descriptor_type; |
| int ap = p->access_permission_0; |
| return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | |
| ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) | |
| ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT) | |
| ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT) | |
| ((ap != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT) | |
| ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_READ_SHIFT) | |
| ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_WRITE_SHIFT) | |
| (1 << PAGE_EXEC_SHIFT) | |
| (p->bufferable << PAGE_CACHEABLE); |
| } |
| /** Sets flags of level 0 page table entry. |
| * |
| * @param pt level 0 page table |
| * @param i index of the entry to be changed |
| * @param flags new flags |
| */ |
| static inline void set_pt_level0_flags(pte_level0_t *pt, size_t i, int flags) |
| { |
| pte_level0_t *p = &pt[i]; |
| if (flags & PAGE_NOT_PRESENT) { |
| p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
| /* |
| * Ensures that the entry will be recognized as valid when |
| * PTE_VALID_ARCH applied. |
| */ |
| p->should_be_zero = 1; |
| } else { |
| p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; |
| p->should_be_zero = 0; |
| } |
| } |
| /** Sets flags of level 1 page table entry. |
| * |
| * We use same access rights for the whole page. When page is not preset we |
| * store 1 in acess_rigts_3 so that at least one bit is 1 (to mark correct |
| * page entry, see #PAGE_VALID_ARCH). |
| * |
| * @param pt Level 1 page table. |
| * @param i Index of the entry to be changed. |
| * @param flags New flags. |
| */ |
| static inline void set_pt_level1_flags(pte_level1_t *pt, size_t i, int flags) |
| { |
| pte_level1_t *p = &pt[i]; |
| if (flags & PAGE_NOT_PRESENT) { |
| p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
| p->access_permission_3 = 1; |
| } else { |
| p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; |
| p->access_permission_3 = p->access_permission_0; |
| } |
| p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; |
| /* default access permission */ |
| p->access_permission_0 = p->access_permission_1 = |
| p->access_permission_2 = p->access_permission_3 = |
| PTE_AP_USER_NO_KERNEL_RW; |
| if (flags & PAGE_USER) { |
| if (flags & PAGE_READ) { |
| p->access_permission_0 = p->access_permission_1 = |
| p->access_permission_2 = p->access_permission_3 = |
| PTE_AP_USER_RO_KERNEL_RW; |
| } |
| if (flags & PAGE_WRITE) { |
| p->access_permission_0 = p->access_permission_1 = |
| p->access_permission_2 = p->access_permission_3 = |
| PTE_AP_USER_RW_KERNEL_RW; |
| } |
| } |
| } |
| extern void page_arch_init(void); |
| #endif /* __ASM__ */ |
| #endif /* KERNEL */ |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/mm/frame.h |
|---|
| 0,0 → 1,65 |
| /* |
| * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32mm |
| * @{ |
| */ |
| /** @file |
| * @brief Frame related declarations. |
| */ |
| #ifndef KERN_arm32_FRAME_H_ |
| #define KERN_arm32_FRAME_H_ |
| #define FRAME_WIDTH 12 /* 4KB frames */ |
| #define FRAME_SIZE (1 << FRAME_WIDTH) |
| #ifdef KERNEL |
| #ifndef __ASM__ |
| #include <arch/types.h> |
| #define BOOT_PAGE_TABLE_SIZE 0x4000 |
| #define BOOT_PAGE_TABLE_ADDRESS 0x4000 |
| #define BOOT_PAGE_TABLE_START_FRAME (BOOT_PAGE_TABLE_ADDRESS >> FRAME_WIDTH) |
| #define BOOT_PAGE_TABLE_SIZE_IN_FRAMES (BOOT_PAGE_TABLE_SIZE >> FRAME_WIDTH) |
| extern uintptr_t last_frame; |
| extern void frame_arch_init(void); |
| extern void boot_page_table_free(void); |
| #define physmem_print() |
| #endif /* __ASM__ */ |
| #endif /* KERNEL */ |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/mm/tlb.h |
|---|
| 0,0 → 1,42 |
| /* |
| * Copyright (c) 2007 Pavel Jancik |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32mm |
| * @{ |
| */ |
| /** @file |
| * @brief TLB related declarations. |
| */ |
| #ifndef KERN_arm32_TLB_H_ |
| #define KERN_arm32_TLB_H_ |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/mm/page_fault.h |
|---|
| 0,0 → 1,89 |
| /* |
| * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32mm |
| * @{ |
| */ |
| /** @file |
| * @brief Page fault related declarations. |
| */ |
| #ifndef KERN_arm32_PAGE_FAULT_H_ |
| #define KERN_arm32_PAGE_FAULT_H_ |
| #include <arch/types.h> |
| /** Decribes CP15 "fault status register" (FSR). */ |
| typedef struct { |
| unsigned status : 3; |
| unsigned domain : 4; |
| unsigned zero : 1; |
| unsigned should_be_zero : 24; |
| } ATTRIBUTE_PACKED fault_status_t; |
| /** Help union used for casting integer value into #fault_status_t. */ |
| typedef union { |
| fault_status_t fs; |
| uint32_t dummy; |
| } fault_status_union_t; |
| /** Simplified description of instruction code. |
| * |
| * @note Used for recognizing memory access instructions. |
| * @see ARM architecture reference (chapter 3.1) |
| */ |
| typedef struct { |
| unsigned dummy1 : 4; |
| unsigned bit4 : 1; |
| unsigned bits567 : 3; |
| unsigned dummy : 12; |
| unsigned access : 1; |
| unsigned opcode : 4; |
| unsigned type : 3; |
| unsigned condition : 4; |
| } ATTRIBUTE_PACKED instruction_t; |
| /** Help union used for casting pc register (uint_32_t) value into |
| * #instruction_t pointer. |
| */ |
| typedef union { |
| instruction_t *instr; |
| uint32_t pc; |
| } instruction_union_t; |
| extern void prefetch_abort(int n, istate_t *istate); |
| extern void data_abort(int n, istate_t *istate); |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/mm/asid.h |
|---|
| 0,0 → 1,58 |
| /* |
| * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32mm |
| * @{ |
| */ |
| /** @file |
| * @brief ASIDs related declarations. |
| * |
| * ARM CPUs doesn't support ASIDs. |
| */ |
| #ifndef KERN_arm32_ASID_H_ |
| #define KERN_arm32_ASID_H_ |
| #include <arch/types.h> |
| #define ASID_MAX_ARCH 3 /* minimal required number */ |
| typedef uint8_t asid_t; |
| /* |
| * This works due to fact that this file is never included alone but only |
| * through "generic/include/mm/asid.h" where ASID_START is defined. |
| */ |
| #define asid_get() (ASID_START + 1) |
| #define asid_put(asid) |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/mm/as.h |
|---|
| 0,0 → 1,65 |
| /* |
| * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32mm |
| * @{ |
| */ |
| /** @file |
| * @brief Address space manipulating functions declarations. |
| */ |
| #ifndef KERN_arm32_AS_H_ |
| #define KERN_arm32_AS_H_ |
| #define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 |
| #define KERNEL_ADDRESS_SPACE_START_ARCH (unsigned long) 0x80000000 |
| #define KERNEL_ADDRESS_SPACE_END_ARCH (unsigned long) 0xffffffff |
| #define USER_ADDRESS_SPACE_START_ARCH (unsigned long) 0x00000000 |
| #define USER_ADDRESS_SPACE_END_ARCH (unsigned long) 0x7fffffff |
| #define USTACK_ADDRESS_ARCH (0x80000000 - PAGE_SIZE) |
| typedef struct { |
| } as_arch_t; |
| #include <genarch/mm/as_pt.h> |
| #define as_constructor_arch(as, flags) (as != as) |
| #define as_destructor_arch(as) (as != as) |
| #define as_create_arch(as, flags) (as != as) |
| #define as_install_arch(as) |
| #define as_deinstall_arch(as) |
| #define as_invalidate_translation_cache(as, page, cnt) |
| extern void as_arch_init(void); |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/asm/boot.h |
|---|
| 0,0 → 1,45 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Initial kernel start. |
| */ |
| #ifndef KERN_arm32_ASM_BOOT_H_ |
| #define KERN_arm32_ASM_BOOT_H_ |
| /** Size of a temporary stack used for initial kernel start. */ |
| #define TEMP_STACK_SIZE 0x100 |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/arch.h |
|---|
| 0,0 → 1,62 |
| /* |
| * Copyright (c) 2005 Martin Decky |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Empty. |
| */ |
| #ifndef KERN_arm32_ARCH_H_ |
| #define KERN_arm32_ARCH_H_ |
| #define TASKMAP_MAX_RECORDS 32 |
| #define CPUMAP_MAX_RECORDS 32 |
| #define BOOTINFO_TASK_NAME_BUFLEN 32 |
| #include <typedefs.h> |
| typedef struct { |
| uintptr_t addr; |
| uint32_t size; |
| char name[BOOTINFO_TASK_NAME_BUFLEN]; |
| } utask_t; |
| typedef struct { |
| uint32_t cnt; |
| utask_t tasks[TASKMAP_MAX_RECORDS]; |
| } bootinfo_t; |
| extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/asm.h |
|---|
| 0,0 → 1,106 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Declarations of functions implemented in assembly. |
| */ |
| #ifndef KERN_arm32_ASM_H_ |
| #define KERN_arm32_ASM_H_ |
| #include <typedefs.h> |
| #include <arch/types.h> |
| #include <arch/stack.h> |
| #include <config.h> |
| #include <arch/interrupt.h> |
| /** No such instruction on ARM to sleep CPU. */ |
| static inline void cpu_sleep(void) |
| { |
| } |
| static inline void pio_write_8(ioport8_t *port, uint8_t v) |
| { |
| *port = v; |
| } |
| static inline void pio_write_16(ioport16_t *port, uint16_t v) |
| { |
| *port = v; |
| } |
| static inline void pio_write_32(ioport32_t *port, uint32_t v) |
| { |
| *port = v; |
| } |
| static inline uint8_t pio_read_8(ioport8_t *port) |
| { |
| return *port; |
| } |
| static inline uint16_t pio_read_16(ioport16_t *port) |
| { |
| return *port; |
| } |
| static inline uint32_t pio_read_32(ioport32_t *port) |
| { |
| return *port; |
| } |
| /** Return base address of current stack. |
| * |
| * Return the base address of the current stack. |
| * The stack is assumed to be STACK_SIZE bytes long. |
| * The stack must start on page boundary. |
| * |
| */ |
| static inline uintptr_t get_stack_base(void) |
| { |
| uintptr_t v; |
| asm volatile ( |
| "and %[v], sp, %[size]\n" |
| : [v] "=r" (v) |
| : [size] "r" (~(STACK_SIZE - 1)) |
| ); |
| return v; |
| } |
| extern void cpu_halt(void); |
| extern void asm_delay_loop(uint32_t t); |
| extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg, |
| uintptr_t entry); |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/regutils.h |
|---|
| 0,0 → 1,92 |
| /* |
| * Copyright (c) 2007 Petr Stepan |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** |
| * @file |
| * @brief Utilities for convenient manipulation with ARM registers. |
| */ |
| #ifndef KERN_arm32_REGUTILS_H_ |
| #define KERN_arm32_REGUTILS_H_ |
| #define STATUS_REG_IRQ_DISABLED_BIT (1 << 7) |
| #define STATUS_REG_MODE_MASK 0x1f |
| #define CP15_R1_HIGH_VECTORS_BIT (1 << 13) |
| /* ARM Processor Operation Modes */ |
| #define USER_MODE 0x10 |
| #define FIQ_MODE 0x11 |
| #define IRQ_MODE 0x12 |
| #define SUPERVISOR_MODE 0x13 |
| #define ABORT_MODE 0x17 |
| #define UNDEFINED_MODE 0x1b |
| #define SYSTEM_MODE 0x1f |
| /* [CS]PRS manipulation macros */ |
| #define GEN_STATUS_READ(nm,reg) \ |
| static inline uint32_t nm## _status_reg_read(void) \ |
| { \ |
| uint32_t retval; \ |
| asm volatile( \ |
| "mrs %[retval], " #reg \ |
| : [retval] "=r" (retval) \ |
| ); \ |
| return retval; \ |
| } |
| #define GEN_STATUS_WRITE(nm,reg,fieldname, field) \ |
| static inline void nm## _status_reg_ ##fieldname## _write(uint32_t value) \ |
| { \ |
| asm volatile( \ |
| "msr " #reg "_" #field ", %[value]" \ |
| :: [value] "r" (value) \ |
| ); \ |
| } |
| /** Returns the value of CPSR (Current Program Status Register). */ |
| GEN_STATUS_READ(current, cpsr) |
| /** Sets control bits of CPSR. */ |
| GEN_STATUS_WRITE(current, cpsr, control, c); |
| /** Returns the value of SPSR (Saved Program Status Register). */ |
| GEN_STATUS_READ(saved, spsr) |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/atomic.h |
|---|
| 0,0 → 1,128 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Atomic operations. |
| */ |
| #ifndef KERN_arm32_ATOMIC_H_ |
| #define KERN_arm32_ATOMIC_H_ |
| /** Atomic addition. |
| * |
| * @param val Where to add. |
| * @param i Value to be added. |
| * |
| * @return Value after addition. |
| * |
| */ |
| static inline long atomic_add(atomic_t *val, int i) |
| { |
| int ret; |
| volatile long *mem = &(val->count); |
| asm volatile ( |
| "1:\n" |
| "ldr r2, [%[mem]]\n" |
| "add r3, r2, %[i]\n" |
| "str r3, %[ret]\n" |
| "swp r3, r3, [%[mem]]\n" |
| "cmp r3, r2\n" |
| "bne 1b\n" |
| : [ret] "=m" (ret) |
| : [mem] "r" (mem), [i] "r" (i) |
| : "r3", "r2" |
| ); |
| return ret; |
| } |
| /** Atomic increment. |
| * |
| * @param val Variable to be incremented. |
| */ |
| static inline void atomic_inc(atomic_t *val) |
| { |
| atomic_add(val, 1); |
| } |
| /** Atomic decrement. |
| * |
| * @param val Variable to be decremented. |
| */ |
| static inline void atomic_dec(atomic_t *val) { |
| atomic_add(val, -1); |
| } |
| /** Atomic pre-increment. |
| * |
| * @param val Variable to be incremented. |
| * @return Value after incrementation. |
| */ |
| static inline long atomic_preinc(atomic_t *val) |
| { |
| return atomic_add(val, 1); |
| } |
| /** Atomic pre-decrement. |
| * |
| * @param val Variable to be decremented. |
| * @return Value after decrementation. |
| */ |
| static inline long atomic_predec(atomic_t *val) |
| { |
| return atomic_add(val, -1); |
| } |
| /** Atomic post-increment. |
| * |
| * @param val Variable to be incremented. |
| * @return Value before incrementation. |
| */ |
| static inline long atomic_postinc(atomic_t *val) |
| { |
| return atomic_add(val, 1) - 1; |
| } |
| /** Atomic post-decrement. |
| * |
| * @param val Variable to be decremented. |
| * @return Value before decrementation. |
| */ |
| static inline long atomic_postdec(atomic_t *val) |
| { |
| return atomic_add(val, -1) + 1; |
| } |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/barrier.h |
|---|
| 0,0 → 1,55 |
| /* |
| * Copyright (c) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Memory barriers. |
| */ |
| #ifndef KERN_arm32_BARRIER_H_ |
| #define KERN_arm32_BARRIER_H_ |
| /* |
| * TODO: implement true ARM memory barriers for macros below. |
| */ |
| #define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") |
| #define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") |
| #define memory_barrier() asm volatile ("" ::: "memory") |
| #define read_barrier() asm volatile ("" ::: "memory") |
| #define write_barrier() asm volatile ("" ::: "memory") |
| #define smc_coherence(a) |
| #define smc_coherence_block(a, l) |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/interrupt.h |
|---|
| 0,0 → 1,59 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32interrupt |
| * @{ |
| */ |
| /** @file |
| * @brief Declarations of interrupt controlling routines. |
| */ |
| #ifndef KERN_arm32_INTERRUPT_H_ |
| #define KERN_arm32_INTERRUPT_H_ |
| #include <arch/types.h> |
| #include <arch/exception.h> |
| /** Initial size of exception dispatch table. */ |
| #define IVT_ITEMS 6 |
| /** Index of the first item in exception dispatch table. */ |
| #define IVT_FIRST 0 |
| extern void interrupt_init(void); |
| extern ipl_t interrupts_disable(void); |
| extern ipl_t interrupts_enable(void); |
| extern void interrupts_restore(ipl_t ipl); |
| extern ipl_t interrupts_read(void); |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/memstr.h |
|---|
| 0,0 → 1,49 |
| /* |
| * Copyright (c) 2005 Sergey Bondari |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Memory manipulating functions declarations. |
| */ |
| #ifndef KERN_arm32_MEMSTR_H_ |
| #define KERN_arm32_MEMSTR_H_ |
| #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) |
| extern void memsetw(void *dst, size_t cnt, uint16_t x); |
| extern void memsetb(void *dst, size_t cnt, uint8_t x); |
| extern int memcmp(const void *a, const void *b, size_t cnt); |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/fpu_context.h |
|---|
| 0,0 → 1,51 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief FPU context (not implemented). |
| * |
| * GXemul doesn't support FPU on its ARM CPU. |
| */ |
| #ifndef KERN_arm32_FPU_CONTEXT_H_ |
| #define KERN_arm32_FPU_CONTEXT_H_ |
| #include <arch/types.h> |
| #define FPU_CONTEXT_ALIGN 0 |
| typedef struct { |
| } fpu_context_t; |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/cycle.h |
|---|
| 0,0 → 1,53 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Count of CPU cycles. |
| */ |
| #ifndef KERN_arm32_CYCLE_H_ |
| #define KERN_arm32_CYCLE_H_ |
| /** Returns count of CPU cycles. |
| * |
| * No such instruction on ARM to get count of cycles. |
| * |
| * @return Count of CPU cycles. |
| */ |
| static inline uint64_t get_cycle(void) |
| { |
| return 0; |
| } |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/stack.h |
|---|
| 0,0 → 1,49 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Stack constants. |
| */ |
| #ifndef KERN_arm32_STACK_H_ |
| #define KERN_arm32_STACK_H_ |
| #define STACK_ITEM_SIZE 4 |
| /** See <a href="http://www.arm.com/support/faqdev/14269.html">ABI</a> for |
| * details |
| */ |
| #define STACK_ALIGNMENT 8 |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/elf.h |
|---|
| 0,0 → 1,52 |
| /* |
| * Copyright (c) 2006 Sergey Bondari |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief ARM ELF constants. |
| */ |
| #ifndef KERN_arm32_ELF_H_ |
| #define KERN_arm32_ELF_H_ |
| #define ELF_MACHINE EM_ARM |
| #ifdef BIG_ENDIAN |
| #define ELF_DATA_ENCODING ELFDATA2MSB |
| #else |
| #define ELF_DATA_ENCODING ELFDATA2LSB |
| #endif |
| #define ELF_CLASS ELFCLASS32 |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/arg.h |
|---|
| 0,0 → 1,44 |
| /* |
| * Copyright (c) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Empty. |
| */ |
| #ifndef KERN_arm32_ARG_H_ |
| #define KERN_arm32_ARG_H_ |
| #include <stdarg.h> |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/proc/task.h |
|---|
| 0,0 → 1,48 |
| /* |
| * Copyright (c) 2006 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32proc |
| * @{ |
| */ |
| /** @file |
| * @brief Task related declarations. |
| */ |
| #ifndef KERN_arm32_TASK_H_ |
| #define KERN_arm32_TASK_H_ |
| typedef struct { |
| } task_arch_t; |
| #define task_create_arch(t) |
| #define task_destroy_arch(t) |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/proc/thread.h |
|---|
| 0,0 → 1,49 |
| /* |
| * Copyright (c) 2003-2004 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32proc |
| * @{ |
| */ |
| /** @file |
| * @brief Thread related declarations. |
| */ |
| #ifndef KERN_arm32_THREAD_H_ |
| #define KERN_arm32_THREAD_H_ |
| typedef struct { |
| } thread_arch_t; |
| #define thr_constructor_arch(t) |
| #define thr_destructor_arch(t) |
| #define thread_create_arch(t) |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/faddr.h |
|---|
| 0,0 → 1,50 |
| /* |
| * Copyright (c) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Function address conversion. |
| */ |
| #ifndef KERN_arm32_FADDR_H_ |
| #define KERN_arm32_FADDR_H_ |
| #include <arch/types.h> |
| /** Calculate absolute address of function referenced by fptr pointer. |
| * |
| * @param fptr Function pointer. |
| */ |
| #define FADDR(fptr) ((uintptr_t) (fptr)) |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/mainpage.h |
|---|
| 0,0 → 1,49 |
| /* |
| * Copyright (c) 2005 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @mainpage HelenOS ARM 32-bit port |
| * |
| * |
| * @section sec_arm32 ARM 32-bit port |
| * arm32 port is the ninth port of SPARTAN, originally written by Michal Kebrt, |
| * Petr Stepan, Pavel Jancik. The goal is to support 32-bit ARM architecture. |
| * So far, it runs only in emulator. |
| * |
| * @subsection sec_arm32_doc Documentation |
| * <ul> |
| * <li>See 'kernel/doc/arm32_HOWTO' for information about getting an emulator, |
| * building sources and running HelenOS. |
| * </li> |
| * <li>See <a href="http://www.helenos.eu/doc/slides/2007-05-21-Stepan-ARM.pdf">slides</a> |
| * for some information about ARM architecture and porting HelenOS to ARM |
| * (only in Czech). |
| * </li> |
| * </ul> |
| * |
| * |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/context.h |
|---|
| 0,0 → 1,75 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief Thread context. |
| */ |
| #ifndef KERN_arm32_CONTEXT_H_ |
| #define KERN_arm32_CONTEXT_H_ |
| #include <align.h> |
| #include <arch/stack.h> |
| /* Put one item onto the stack to support get_stack_base() and align it up. */ |
| #define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) |
| #ifndef __ASM__ |
| #include <arch/types.h> |
| /** Thread context containing registers that must be preserved across function |
| * calls. |
| */ |
| typedef struct { |
| uint32_t cpu_mode; |
| uintptr_t sp; |
| uintptr_t pc; |
| uint32_t r4; |
| uint32_t r5; |
| uint32_t r6; |
| uint32_t r7; |
| uint32_t r8; |
| uint32_t r9; |
| uint32_t r10; |
| uint32_t r11; |
| ipl_t ipl; |
| } context_t; |
| #endif /* __ASM__ */ |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/debug.h |
|---|
| 0,0 → 1,42 |
| /* |
| * Copyright (c) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32debug |
| * @{ |
| */ |
| /** @file |
| * @brief Empty. |
| */ |
| #ifndef KERN_arm32_DEBUG_H_ |
| #define KERN_arm32_DEBUG_H_ |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/include/cpu.h |
|---|
| 0,0 → 1,64 |
| /* |
| * Copyright (c) 2007 Michal Kebrt |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| /** @addtogroup arm32 |
| * @{ |
| */ |
| /** @file |
| * @brief CPU identification. |
| */ |
| #ifndef KERN_arm32_CPU_H_ |
| #define KERN_arm32_CPU_H_ |
| #include <arch/types.h> |
| #include <arch/asm.h> |
| /** Struct representing ARM CPU identifiaction. */ |
| typedef struct { |
| /** Implementator (vendor) number. */ |
| uint32_t imp_num; |
| /** Variant number. */ |
| uint32_t variant_num; |
| /** Architecture number. */ |
| uint32_t arch_num; |
| /** Primary part number. */ |
| uint32_t prim_part_num; |
| /** Revision number. */ |
| uint32_t rev_num; |
| } cpu_arch_t; |
| #endif |
| /** @} |
| */ |
| /tags/0.4.1/kernel/arch/arm32/Makefile.inc |
|---|
| 0,0 → 1,75 |
| # |
| # Copyright (c) 2007 Jakub Jermar, Michal Kebrt |
| # All rights reserved. |
| # |
| # Redistribution and use in source and binary forms, with or without |
| # modification, are permitted provided that the following conditions |
| # are met: |
| # |
| # - Redistributions of source code must retain the above copyright |
| # notice, this list of conditions and the following disclaimer. |
| # - Redistributions in binary form must reproduce the above copyright |
| # notice, this list of conditions and the following disclaimer in the |
| # documentation and/or other materials provided with the distribution. |
| # - The name of the author may not be used to endorse or promote products |
| # derived from this software without specific prior written permission. |
| # |
| # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| # |
| ## Toolchain configuration |
| # |
| BFD_NAME = elf32-littlearm |
| BFD_ARCH = arm |
| BFD = binary |
| TARGET = arm-linux-gnu |
| TOOLCHAIN_DIR = $(CROSS_PREFIX)/arm |
| ATSIGN = % |
| GCC_CFLAGS += -fno-zero-initialized-in-bss |
| BITS = 32 |
| ENDIANESS = LE |
| ARCH_SOURCES = \ |
| arch/$(KARCH)/src/start.S \ |
| arch/$(KARCH)/src/asm.S \ |
| arch/$(KARCH)/src/exc_handler.S \ |
| arch/$(KARCH)/src/arm32.c \ |
| arch/$(KARCH)/src/machine_func.c \ |
| arch/$(KARCH)/src/context.S \ |
| arch/$(KARCH)/src/dummy.S \ |
| arch/$(KARCH)/src/panic.S \ |
| arch/$(KARCH)/src/cpu/cpu.c \ |
| arch/$(KARCH)/src/ddi/ddi.c \ |
| arch/$(KARCH)/src/interrupt.c \ |
| arch/$(KARCH)/src/exception.c \ |
| arch/$(KARCH)/src/userspace.c \ |
| arch/$(KARCH)/src/mm/as.c \ |
| arch/$(KARCH)/src/mm/frame.c \ |
| arch/$(KARCH)/src/mm/page.c \ |
| arch/$(KARCH)/src/mm/tlb.c \ |
| arch/$(KARCH)/src/mm/page_fault.c |
| ifeq ($(MACHINE),testarm) |
| ARCH_SOURCES += arch/$(KARCH)/src/mach/testarm/testarm.c |
| endif |
| ifeq ($(MACHINE),integratorcp) |
| ARCH_SOURCES += arch/$(KARCH)/src/mach/integratorcp/integratorcp.c |
| endif |
| ifeq ($(CONFIG_PL050),y) |
| ARCH_SOURCES += genarch/src/drivers/pl050/pl050.c |
| endif |
| /tags/0.4.1/kernel/arch/arm32/_link.ld.in |
|---|
| 0,0 → 1,52 |
| /* |
| * ARM linker script |
| * |
| * kernel text |
| * kernel data |
| * |
| */ |
| #define KERNEL_LOAD_ADDRESS 0x80200000 |
| OUTPUT_ARCH(arm) |
| ENTRY(kernel_image_start) |
| SECTIONS { |
| . = KERNEL_LOAD_ADDRESS; |
| .text : { |
| ktext_start = .; |
| *(.text); |
| ktext_end = .; |
| } |
| .data : { |
| kdata_start = .; |
| *(.data); /* initialized data */ |
| hardcoded_ktext_size = .; |
| LONG(ktext_end - ktext_start); |
| hardcoded_kdata_size = .; |
| LONG(kdata_end - kdata_start); |
| hardcoded_load_address = .; |
| LONG(KERNEL_LOAD_ADDRESS); |
| *(.bss); /* uninitialized static variables */ |
| *(COMMON); /* global variables */ |
| *(.rodata*); |
| *(.sdata); |
| *(.reginfo); |
| symbol_table = .; |
| *(symtab.*); |
| } |
| .sbss : { |
| *(.sbss); |
| *(.scommon); |
| } |
| kdata_end = .; |
| /DISCARD/ : { |
| *(.mdebug*); |
| *(.pdr); |
| *(.comment); |
| *(.note); |
| } |
| } |