| /tags/0.2.0/kernel/arch/ia64/include/interrupt.h |
|---|
| 0,0 → 1,138 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_INTERRUPT_H__ |
| #define __ia64_INTERRUPT_H__ |
| #include <typedefs.h> |
| #include <arch/types.h> |
| #include <arch/register.h> |
| #define IRQ_COUNT 257 /* 256 NOT suppotred IRQS*//* TODO */ |
| #define IRQ_KBD 256 /* One simulated interrupt for ski simulator keyboard*/ |
| /** External Interrupt vectors. */ |
| #define INTERRUPT_TIMER 0 |
| #define INTERRUPT_SPURIOUS 15 |
| /** General Exception codes. */ |
| #define GE_ILLEGALOP 0 |
| #define GE_PRIVOP 1 |
| #define GE_PRIVREG 2 |
| #define GE_RESREGFLD 3 |
| #define GE_DISBLDISTRAN 4 |
| #define GE_ILLEGALDEP 8 |
| #define EOI 0 /**< The actual value doesn't matter. */ |
| struct istate { |
| __r128 f2; |
| __r128 f3; |
| __r128 f4; |
| __r128 f5; |
| __r128 f6; |
| __r128 f7; |
| __r128 f8; |
| __r128 f9; |
| __r128 f10; |
| __r128 f11; |
| __r128 f12; |
| __r128 f13; |
| __r128 f14; |
| __r128 f15; |
| __r128 f16; |
| __r128 f17; |
| __r128 f18; |
| __r128 f19; |
| __r128 f20; |
| __r128 f21; |
| __r128 f22; |
| __r128 f23; |
| __r128 f24; |
| __r128 f25; |
| __r128 f26; |
| __r128 f27; |
| __r128 f28; |
| __r128 f29; |
| __r128 f30; |
| __r128 f31; |
| __address ar_bsp; |
| __address ar_bspstore; |
| __address ar_bspstore_new; |
| __u64 ar_rnat; |
| __u64 ar_ifs; |
| __u64 ar_pfs; |
| __u64 ar_rsc; |
| __address cr_ifa; |
| cr_isr_t cr_isr; |
| __address cr_iipa; |
| psr_t cr_ipsr; |
| __address cr_iip; |
| __u64 pr; |
| __address sp; |
| /* |
| * The following variables are defined only for break_instruction handler. |
| */ |
| __u64 in0; |
| __u64 in1; |
| __u64 in2; |
| __u64 in3; |
| __u64 in4; |
| }; |
| static inline void istate_set_retaddr(istate_t *istate, __address retaddr) |
| { |
| istate->cr_iip = retaddr; |
| istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */ |
| } |
| static inline __native istate_get_pc(istate_t *istate) |
| { |
| return istate->cr_iip; |
| } |
| #include <panic.h> |
| static inline int istate_from_uspace(istate_t *istate) |
| { |
| return (istate->cr_iip)<0xe000000000000000ULL; |
| } |
| extern void *ivt; |
| extern void general_exception(__u64 vector, istate_t *istate); |
| extern int break_instruction(__u64 vector, istate_t *istate); |
| extern void universal_handler(__u64 vector, istate_t *istate); |
| extern void nop_handler(__u64 vector, istate_t *istate); |
| extern void external_interrupt(__u64 vector, istate_t *istate); |
| extern void virtual_interrupt(__u64 irq, void *param); |
| extern void disabled_fp_register(__u64 vector, istate_t *istate); |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/proc/task.h |
|---|
| 0,0 → 1,38 |
| /* |
| * Copyright (C) 2006 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_TASK_H__ |
| #define __ia64_TASK_H__ |
| typedef struct { |
| } task_arch_t; |
| #define task_create_arch(t) |
| #define task_destroy_arch(t) |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/proc/thread.h |
|---|
| 0,0 → 1,37 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_THREAD_H__ |
| #define __ia64_THREAD_H__ |
| typedef struct { |
| } thread_arch_t; |
| #define thread_create_arch(t) |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/mm/as.h |
|---|
| 0,0 → 1,43 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_AS_H__ |
| #define __ia64_AS_H__ |
| #define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 |
| #define KERNEL_ADDRESS_SPACE_START_ARCH (unsigned long) 0xe000000000000000ULL |
| #define KERNEL_ADDRESS_SPACE_END_ARCH (unsigned long) 0xffffffffffffffffULL |
| #define USER_ADDRESS_SPACE_START_ARCH (unsigned long) 0x0000000000000000ULL |
| #define USER_ADDRESS_SPACE_END_ARCH (unsigned long) 0xdfffffffffffffffULL |
| #define USTACK_ADDRESS_ARCH 0x0000000ff0000000ULL |
| extern void as_arch_init(void); |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/mm/vhpt.h |
|---|
| 0,0 → 1,54 |
| /* |
| * Copyright (C) 2006 Jakub Vana |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_VHPT_H__ |
| #define __ia64_VHPT_H__ |
| #include <arch/mm/tlb.h> |
| #include <arch/mm/page.h> |
| __address vhpt_set_up(void); |
| static inline vhpt_entry_t tlb_entry_t2vhpt_entry_t(tlb_entry_t tentry) |
| { |
| vhpt_entry_t ventry; |
| ventry.word[0]=tentry.word[0]; |
| ventry.word[1]=tentry.word[1]; |
| return ventry; |
| } |
| void vhpt_mapping_insert(__address va, asid_t asid, tlb_entry_t entry); |
| void vhpt_invalidate_all(void); |
| void vhpt_invalidate_asid(asid_t asid); |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/mm/page.h |
|---|
| 0,0 → 1,274 |
| /* |
| * Copyright (C) 2005 - 2006 Jakub Jermar |
| * Copyright (C) 2006 Jakub Vana |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_PAGE_H__ |
| #define __ia64_PAGE_H__ |
| #include <arch/mm/frame.h> |
| #define PAGE_SIZE FRAME_SIZE |
| #define PAGE_WIDTH FRAME_WIDTH |
| #ifdef KERNEL |
| /** Bit width of the TLB-locked portion of kernel address space. */ |
| #define KERNEL_PAGE_WIDTH 28 /* 256M */ |
| #define PPN_SHIFT 12 |
| #define VRN_SHIFT 61 |
| #define VRN_MASK (7LL << VRN_SHIFT) |
| #define VA2VRN(va) ((va)>>VRN_SHIFT) |
| #ifdef __ASM__ |
| #define VRN_KERNEL 7 |
| #else |
| #define VRN_KERNEL 7LL |
| #endif |
| #define REGION_REGISTERS 8 |
| #define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT))) |
| #define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT))) |
| #define VHPT_WIDTH 20 /* 1M */ |
| #define VHPT_SIZE (1 << VHPT_WIDTH) |
| #define PTA_BASE_SHIFT 15 |
| /** Memory Attributes. */ |
| #define MA_WRITEBACK 0x0 |
| #define MA_UNCACHEABLE 0x4 |
| /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
| #define PL_KERNEL 0x0 |
| #define PL_USER 0x3 |
| /* Access Rigths. Only certain combinations are used by the kernel. */ |
| #define AR_READ 0x0 |
| #define AR_EXECUTE 0x1 |
| #define AR_WRITE 0x2 |
| #ifndef __ASM__ |
| #include <arch/mm/frame.h> |
| #include <arch/barrier.h> |
| #include <genarch/mm/page_ht.h> |
| #include <arch/mm/asid.h> |
| #include <arch/types.h> |
| #include <typedefs.h> |
| #include <debug.h> |
| struct vhpt_tag_info { |
| unsigned long long tag : 63; |
| unsigned ti : 1; |
| } __attribute__ ((packed)); |
| union vhpt_tag { |
| struct vhpt_tag_info tag_info; |
| unsigned tag_word; |
| }; |
| struct vhpt_entry_present { |
| /* Word 0 */ |
| unsigned p : 1; |
| unsigned : 1; |
| unsigned ma : 3; |
| unsigned a : 1; |
| unsigned d : 1; |
| unsigned pl : 2; |
| unsigned ar : 3; |
| unsigned long long ppn : 38; |
| unsigned : 2; |
| unsigned ed : 1; |
| unsigned ig1 : 11; |
| /* Word 1 */ |
| unsigned : 2; |
| unsigned ps : 6; |
| unsigned key : 24; |
| unsigned : 32; |
| /* Word 2 */ |
| union vhpt_tag tag; |
| /* Word 3 */ |
| __u64 ig3 : 64; |
| } __attribute__ ((packed)); |
| struct vhpt_entry_not_present { |
| /* Word 0 */ |
| unsigned p : 1; |
| unsigned long long ig0 : 52; |
| unsigned ig1 : 11; |
| /* Word 1 */ |
| unsigned : 2; |
| unsigned ps : 6; |
| unsigned long long ig2 : 56; |
| /* Word 2 */ |
| union vhpt_tag tag; |
| /* Word 3 */ |
| __u64 ig3 : 64; |
| } __attribute__ ((packed)); |
| typedef union vhpt_entry { |
| struct vhpt_entry_present present; |
| struct vhpt_entry_not_present not_present; |
| __u64 word[4]; |
| } vhpt_entry_t; |
| struct region_register_map { |
| unsigned ve : 1; |
| unsigned : 1; |
| unsigned ps : 6; |
| unsigned rid : 24; |
| unsigned : 32; |
| } __attribute__ ((packed)); |
| typedef union region_register { |
| struct region_register_map map; |
| unsigned long long word; |
| } region_register; |
| struct pta_register_map { |
| unsigned ve : 1; |
| unsigned : 1; |
| unsigned size : 6; |
| unsigned vf : 1; |
| unsigned : 6; |
| unsigned long long base : 49; |
| } __attribute__ ((packed)); |
| typedef union pta_register { |
| struct pta_register_map map; |
| __u64 word; |
| } pta_register; |
| /** Return Translation Hashed Entry Address. |
| * |
| * VRN bits are used to read RID (ASID) from one |
| * of the eight region registers registers. |
| * |
| * @param va Virtual address including VRN bits. |
| * |
| * @return Address of the head of VHPT collision chain. |
| */ |
| static inline __u64 thash(__u64 va) |
| { |
| __u64 ret; |
| __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
| return ret; |
| } |
| /** Return Translation Hashed Entry Tag. |
| * |
| * VRN bits are used to read RID (ASID) from one |
| * of the eight region registers. |
| * |
| * @param va Virtual address including VRN bits. |
| * |
| * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
| */ |
| static inline __u64 ttag(__u64 va) |
| { |
| __u64 ret; |
| __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
| return ret; |
| } |
| /** Read Region Register. |
| * |
| * @param i Region register index. |
| * |
| * @return Current contents of rr[i]. |
| */ |
| static inline __u64 rr_read(index_t i) |
| { |
| __u64 ret; |
| ASSERT(i < REGION_REGISTERS); |
| __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT)); |
| return ret; |
| } |
| /** Write Region Register. |
| * |
| * @param i Region register index. |
| * @param v Value to be written to rr[i]. |
| */ |
| static inline void rr_write(index_t i, __u64 v) |
| { |
| ASSERT(i < REGION_REGISTERS); |
| __asm__ volatile ( |
| "mov rr[%0] = %1\n" |
| : |
| : "r" (i << VRN_SHIFT), "r" (v) |
| ); |
| } |
| /** Read Page Table Register. |
| * |
| * @return Current value stored in PTA. |
| */ |
| static inline __u64 pta_read(void) |
| { |
| __u64 ret; |
| __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
| return ret; |
| } |
| /** Write Page Table Register. |
| * |
| * @param v New value to be stored in PTA. |
| */ |
| static inline void pta_write(__u64 v) |
| { |
| __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v)); |
| } |
| extern void page_arch_init(void); |
| extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid); |
| extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v); |
| extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags); |
| #endif /* __ASM__ */ |
| #endif /* KERNEL */ |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/mm/tlb.h |
|---|
| 0,0 → 1,94 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_TLB_H__ |
| #define __ia64_TLB_H__ |
| #define tlb_arch_init() |
| #define tlb_print() |
| #include <arch/mm/page.h> |
| #include <arch/mm/asid.h> |
| #include <arch/interrupt.h> |
| #include <arch/types.h> |
| #include <typedefs.h> |
| /** Data and instruction Translation Register indices. */ |
| #define DTR_KERNEL 0 |
| #define ITR_KERNEL 0 |
| #define DTR_KSTACK1 1 |
| #define DTR_KSTACK2 2 |
| /** Portion of TLB insertion format data structure. */ |
| union tlb_entry { |
| __u64 word[2]; |
| struct { |
| /* Word 0 */ |
| unsigned p : 1; /**< Present. */ |
| unsigned : 1; |
| unsigned ma : 3; /**< Memory attribute. */ |
| unsigned a : 1; /**< Accessed. */ |
| unsigned d : 1; /**< Dirty. */ |
| unsigned pl : 2; /**< Privilege level. */ |
| unsigned ar : 3; /**< Access rights. */ |
| unsigned long long ppn : 38; /**< Physical Page Number, a.k.a. PFN. */ |
| unsigned : 2; |
| unsigned ed : 1; |
| unsigned ig1 : 11; |
| /* Word 1 */ |
| unsigned : 2; |
| unsigned ps : 6; /**< Page size will be 2^ps. */ |
| unsigned key : 24; /**< Protection key, unused. */ |
| unsigned : 32; |
| } __attribute__ ((packed)); |
| } __attribute__ ((packed)); |
| typedef union tlb_entry tlb_entry_t; |
| extern void tc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtc); |
| extern void dtc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry); |
| extern void itc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry); |
| extern void tr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtr, index_t tr); |
| extern void dtr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr); |
| extern void itr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr); |
| extern void dtlb_kernel_mapping_insert(__address page, __address frame, bool dtr, index_t tr); |
| extern void dtc_pte_copy(pte_t *t); |
| extern void itc_pte_copy(pte_t *t); |
| extern void alternate_instruction_tlb_fault(__u64 vector, istate_t *istate); |
| extern void alternate_data_tlb_fault(__u64 vector, istate_t *istate); |
| extern void data_nested_tlb_fault(__u64 vector, istate_t *istate); |
| extern void data_dirty_bit_fault(__u64 vector, istate_t *istate); |
| extern void instruction_access_bit_fault(__u64 vector, istate_t *istate); |
| extern void data_access_bit_fault(__u64 vector, istate_t *istate); |
| extern void page_not_present(__u64 vector, istate_t *istate); |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/mm/frame.h |
|---|
| 0,0 → 1,45 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_FRAME_H__ |
| #define __ia64_FRAME_H__ |
| #define FRAME_WIDTH 14 /* 16K */ |
| #define FRAME_SIZE (1<<FRAME_WIDTH) |
| #ifdef KERNEL |
| #ifndef __ASM__ |
| extern void frame_arch_init(void); |
| #define ARCH_STACK_FRAMES TWO_FRAMES |
| #endif /* __ASM__ */ |
| #endif /* KERNEL */ |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/mm/memory_init.h |
|---|
| 0,0 → 1,36 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_MEMORY_INIT_H__ |
| #define __ia64_MEMORY_INIT_H__ |
| #include <config.h> |
| #define get_memory_size() (512*1024*1024) /* 512M */ |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/mm/asid.h |
|---|
| 0,0 → 1,57 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_ASID_H__ |
| #define __ia64_ASID_H__ |
| #ifndef __ASM__ |
| #include <arch/types.h> |
| typedef __u16 asid_t; |
| typedef __u32 rid_t; |
| #endif /* __ASM__ */ |
| /** |
| * Number of ia64 RIDs (Region Identifiers) per kernel ASID. |
| * Note that some architectures may support more bits, |
| * but those extra bits are not used by the kernel. |
| */ |
| #define RIDS_PER_ASID 7 |
| #define RID_MAX 262143 /* 2^18 - 1 */ |
| #define RID_KERNEL 0 |
| #define RID_INVALID 1 |
| #define ASID2RID(asid, vrn) (((asid)>RIDS_PER_ASID)?(((asid)*RIDS_PER_ASID)+(vrn)):(asid)) |
| #define RID2ASID(rid) ((rid)/RIDS_PER_ASID) |
| #define ASID_MAX_ARCH (RID_MAX/RIDS_PER_ASID) |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/ski/ski.h |
|---|
| 0,0 → 1,46 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __SKI_H__ |
| #define __SKI_H__ |
| #include <arch/types.h> |
| #include <console/console.h> |
| #define SKI_INIT_CONSOLE 20 |
| #define SKI_GETCHAR 21 |
| #define SKI_PUTCHAR 31 |
| extern void ski_init_console(void); |
| extern void ski_set_console_sysinfo(void); |
| extern void poll_keyboard(void); |
| extern chardev_t ski_uconsole; |
| extern int kbd_uspace; |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/arch.h |
|---|
| 0,0 → 1,36 |
| /* |
| * Copyright (C) 2005 Martin Decky |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_ARCH_H__ |
| #define __ia64_ARCH_H__ |
| #define LOADED_PROG_STACK_PAGES_NO 2 |
| #include <arch/ski/ski.h> |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/asm.h |
|---|
| 0,0 → 1,276 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_ASM_H__ |
| #define __ia64_ASM_H__ |
| #include <config.h> |
| #include <arch/types.h> |
| #include <arch/register.h> |
| /** Return base address of current stack |
| * |
| * Return the base address of the current stack. |
| * The stack is assumed to be STACK_SIZE long. |
| * The stack must start on page boundary. |
| */ |
| static inline __address get_stack_base(void) |
| { |
| __u64 v; |
| __asm__ volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1))); |
| return v; |
| } |
| /** Return Processor State Register. |
| * |
| * @return PSR. |
| */ |
| static inline __u64 psr_read(void) |
| { |
| __u64 v; |
| __asm__ volatile ("mov %0 = psr\n" : "=r" (v)); |
| return v; |
| } |
| /** Read IVA (Interruption Vector Address). |
| * |
| * @return Return location of interruption vector table. |
| */ |
| static inline __u64 iva_read(void) |
| { |
| __u64 v; |
| __asm__ volatile ("mov %0 = cr.iva\n" : "=r" (v)); |
| return v; |
| } |
| /** Write IVA (Interruption Vector Address) register. |
| * |
| * @param New location of interruption vector table. |
| */ |
| static inline void iva_write(__u64 v) |
| { |
| __asm__ volatile ("mov cr.iva = %0\n" : : "r" (v)); |
| } |
| /** Read IVR (External Interrupt Vector Register). |
| * |
| * @return Highest priority, pending, unmasked external interrupt vector. |
| */ |
| static inline __u64 ivr_read(void) |
| { |
| __u64 v; |
| __asm__ volatile ("mov %0 = cr.ivr\n" : "=r" (v)); |
| return v; |
| } |
| /** Write ITC (Interval Timer Counter) register. |
| * |
| * @param New counter value. |
| */ |
| static inline void itc_write(__u64 v) |
| { |
| __asm__ volatile ("mov ar.itc = %0\n" : : "r" (v)); |
| } |
| /** Read ITC (Interval Timer Counter) register. |
| * |
| * @return Current counter value. |
| */ |
| static inline __u64 itc_read(void) |
| { |
| __u64 v; |
| __asm__ volatile ("mov %0 = ar.itc\n" : "=r" (v)); |
| return v; |
| } |
| /** Write ITM (Interval Timer Match) register. |
| * |
| * @param New match value. |
| */ |
| static inline void itm_write(__u64 v) |
| { |
| __asm__ volatile ("mov cr.itm = %0\n" : : "r" (v)); |
| } |
| /** Read ITM (Interval Timer Match) register. |
| * |
| * @return Match value. |
| */ |
| static inline __u64 itm_read(void) |
| { |
| __u64 v; |
| __asm__ volatile ("mov %0 = cr.itm\n" : "=r" (v)); |
| return v; |
| } |
| /** Read ITV (Interval Timer Vector) register. |
| * |
| * @return Current vector and mask bit. |
| */ |
| static inline __u64 itv_read(void) |
| { |
| __u64 v; |
| __asm__ volatile ("mov %0 = cr.itv\n" : "=r" (v)); |
| return v; |
| } |
| /** Write ITV (Interval Timer Vector) register. |
| * |
| * @param New vector and mask bit. |
| */ |
| static inline void itv_write(__u64 v) |
| { |
| __asm__ volatile ("mov cr.itv = %0\n" : : "r" (v)); |
| } |
| /** Write EOI (End Of Interrupt) register. |
| * |
| * @param This value is ignored. |
| */ |
| static inline void eoi_write(__u64 v) |
| { |
| __asm__ volatile ("mov cr.eoi = %0\n" : : "r" (v)); |
| } |
| /** Read TPR (Task Priority Register). |
| * |
| * @return Current value of TPR. |
| */ |
| static inline __u64 tpr_read(void) |
| { |
| __u64 v; |
| __asm__ volatile ("mov %0 = cr.tpr\n" : "=r" (v)); |
| return v; |
| } |
| /** Write TPR (Task Priority Register). |
| * |
| * @param New value of TPR. |
| */ |
| static inline void tpr_write(__u64 v) |
| { |
| __asm__ volatile ("mov cr.tpr = %0\n" : : "r" (v)); |
| } |
| /** Disable interrupts. |
| * |
| * Disable interrupts and return previous |
| * value of PSR. |
| * |
| * @return Old interrupt priority level. |
| */ |
| static ipl_t interrupts_disable(void) |
| { |
| __u64 v; |
| __asm__ volatile ( |
| "mov %0 = psr\n" |
| "rsm %1\n" |
| : "=r" (v) |
| : "i" (PSR_I_MASK) |
| ); |
| return (ipl_t) v; |
| } |
| /** Enable interrupts. |
| * |
| * Enable interrupts and return previous |
| * value of PSR. |
| * |
| * @return Old interrupt priority level. |
| */ |
| static ipl_t interrupts_enable(void) |
| { |
| __u64 v; |
| __asm__ volatile ( |
| "mov %0 = psr\n" |
| "ssm %1\n" |
| ";;\n" |
| "srlz.d\n" |
| : "=r" (v) |
| : "i" (PSR_I_MASK) |
| ); |
| return (ipl_t) v; |
| } |
| /** Restore interrupt priority level. |
| * |
| * Restore PSR. |
| * |
| * @param ipl Saved interrupt priority level. |
| */ |
| static inline void interrupts_restore(ipl_t ipl) |
| { |
| if (ipl & PSR_I_MASK) |
| (void) interrupts_enable(); |
| else |
| (void) interrupts_disable(); |
| } |
| /** Return interrupt priority level. |
| * |
| * @return PSR. |
| */ |
| static inline ipl_t interrupts_read(void) |
| { |
| return (ipl_t) psr_read(); |
| } |
| /** Disable protection key checking. */ |
| static inline void pk_disable(void) |
| { |
| __asm__ volatile ("rsm %0\n" : : "i" (PSR_PK_MASK)); |
| } |
| extern void cpu_halt(void); |
| extern void cpu_sleep(void); |
| extern void asm_delay_loop(__u32 t); |
| extern void switch_to_userspace(__address entry, __address sp, __address bsp, __address uspace_uarg, __u64 ipsr, __u64 rsc); |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/context.h |
|---|
| 0,0 → 1,127 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_CONTEXT_H__ |
| #define __ia64_CONTEXT_H__ |
| #include <arch/types.h> |
| #include <arch/register.h> |
| #include <typedefs.h> |
| #include <align.h> |
| #include <arch/stack.h> |
| /* |
| * context_save_arch() and context_restore_arch() are both leaf procedures. |
| * No need to allocate scratch area. |
| * |
| * One item is put onto the stack to support get_stack_base(). |
| */ |
| #define SP_DELTA (0+ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) |
| #ifdef context_set |
| #undef context_set |
| #endif |
| /* RSE stack starts at the bottom of memory stack. */ |
| #define context_set(c, _pc, stack, size) \ |
| do { \ |
| (c)->pc = (__address) _pc; \ |
| (c)->bsp = ((__address) stack) + ALIGN_UP((size), REGISTER_STACK_ALIGNMENT); \ |
| (c)->ar_pfs &= PFM_MASK; \ |
| (c)->sp = ((__address) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - SP_DELTA; \ |
| } while (0); |
| /* |
| * Only save registers that must be preserved across |
| * function calls. |
| */ |
| struct context { |
| /* |
| * Application registers |
| */ |
| __u64 ar_pfs; |
| __u64 ar_unat_caller; |
| __u64 ar_unat_callee; |
| __u64 ar_rsc; |
| __address bsp; /* ar_bsp */ |
| __u64 ar_rnat; |
| __u64 ar_lc; |
| /* |
| * General registers |
| */ |
| __u64 r1; |
| __u64 r4; |
| __u64 r5; |
| __u64 r6; |
| __u64 r7; |
| __address sp; /* r12 */ |
| __u64 r13; |
| /* |
| * Branch registers |
| */ |
| __address pc; /* b0 */ |
| __u64 b1; |
| __u64 b2; |
| __u64 b3; |
| __u64 b4; |
| __u64 b5; |
| /* |
| * Predicate registers |
| */ |
| __u64 pr; |
| __r128 f2 __attribute__ ((aligned(16))); |
| __r128 f3; |
| __r128 f4; |
| __r128 f5; |
| __r128 f16; |
| __r128 f17; |
| __r128 f18; |
| __r128 f19; |
| __r128 f20; |
| __r128 f21; |
| __r128 f22; |
| __r128 f23; |
| __r128 f24; |
| __r128 f25; |
| __r128 f26; |
| __r128 f27; |
| __r128 f28; |
| __r128 f29; |
| __r128 f30; |
| __r128 f31; |
| ipl_t ipl; |
| }; |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/faddr.h |
|---|
| 0,0 → 1,44 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_FADDR_H__ |
| #define __ia64_FADDR_H__ |
| #include <arch/types.h> |
| /** |
| * |
| * Calculate absolute address of function |
| * referenced by fptr pointer. |
| * |
| * @param fptr Function pointer. |
| * |
| */ |
| #define FADDR(f) (*((__address *)(f))); |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/atomic.h |
|---|
| 0,0 → 1,57 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_ATOMIC_H__ |
| #define __ia64_ATOMIC_H__ |
| /** Atomic addition. |
| * |
| * @param val Atomic value. |
| * @param imm Value to add. |
| * |
| * @return Value before addition. |
| */ |
| static inline long atomic_add(atomic_t *val, int imm) |
| { |
| long v; |
| __asm__ volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm)); |
| return v; |
| } |
| static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); } |
| static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); } |
| static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; } |
| static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; } |
| static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); } |
| static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); } |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/fpu_context.h |
|---|
| 0,0 → 1,44 |
| /* |
| * Copyright (C) 2005 Jakub Vana |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_FPU_CONTEXT_H__ |
| #define __ia64_FPU_CONTEXT_H__ |
| #define ARCH_HAS_FPU 1 |
| #define FPU_CONTEXT_ALIGN 16 |
| #include <arch/types.h> |
| #define FRS 96 |
| struct fpu_context { |
| __r128 fr[FRS]; |
| }; |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/register.h |
|---|
| 0,0 → 1,269 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_REGISTER_H__ |
| #define __ia64_REGISTER_H__ |
| #define CR_IVR_MASK 0xf |
| #define PSR_IC_MASK 0x2000 |
| #define PSR_I_MASK 0x4000 |
| #define PSR_PK_MASK 0x8000 |
| #define PSR_DT_MASK (1<<17) |
| #define PSR_RT_MASK (1<<27) |
| #define PSR_DFL_MASK (1<<18) |
| #define PSR_DFH_MASK (1<<19) |
| #define PSR_IT_MASK 0x0000001000000000 |
| #define PSR_CPL_SHIFT 32 |
| #define PSR_CPL_MASK_SHIFTED 3 |
| #define PFM_MASK (~0x3fffffffff) |
| #define RSC_MODE_MASK 3 |
| #define RSC_PL_MASK 12 |
| /** Application registers. */ |
| #define AR_KR0 0 |
| #define AR_KR1 1 |
| #define AR_KR2 2 |
| #define AR_KR3 3 |
| #define AR_KR4 4 |
| #define AR_KR5 5 |
| #define AR_KR6 6 |
| #define AR_KR7 7 |
| /* AR 8-15 reserved */ |
| #define AR_RSC 16 |
| #define AR_BSP 17 |
| #define AR_BSPSTORE 18 |
| #define AR_RNAT 19 |
| /* AR 20 reserved */ |
| #define AR_FCR 21 |
| /* AR 22-23 reserved */ |
| #define AR_EFLAG 24 |
| #define AR_CSD 25 |
| #define AR_SSD 26 |
| #define AR_CFLG 27 |
| #define AR_FSR 28 |
| #define AR_FIR 29 |
| #define AR_FDR 30 |
| /* AR 31 reserved */ |
| #define AR_CCV 32 |
| /* AR 33-35 reserved */ |
| #define AR_UNAT 36 |
| /* AR 37-39 reserved */ |
| #define AR_FPSR 40 |
| /* AR 41-43 reserved */ |
| #define AR_ITC 44 |
| /* AR 45-47 reserved */ |
| /* AR 48-63 ignored */ |
| #define AR_PFS 64 |
| #define AR_LC 65 |
| #define AR_EC 66 |
| /* AR 67-111 reserved */ |
| /* AR 112-127 ignored */ |
| /** Control registers. */ |
| #define CR_DCR 0 |
| #define CR_ITM 1 |
| #define CR_IVA 2 |
| /* CR3-CR7 reserved */ |
| #define CR_PTA 8 |
| /* CR9-CR15 reserved */ |
| #define CR_IPSR 16 |
| #define CR_ISR 17 |
| /* CR18 reserved */ |
| #define CR_IIP 19 |
| #define CR_IFA 20 |
| #define CR_ITIR 21 |
| #define CR_IIPA 22 |
| #define CR_IFS 23 |
| #define CR_IIM 24 |
| #define CR_IHA 25 |
| /* CR26-CR63 reserved */ |
| #define CR_LID 64 |
| #define CR_IVR 65 |
| #define CR_TPR 66 |
| #define CR_EOI 67 |
| #define CR_IRR0 68 |
| #define CR_IRR1 69 |
| #define CR_IRR2 70 |
| #define CR_IRR3 71 |
| #define CR_ITV 72 |
| #define CR_PMV 73 |
| #define CR_CMCV 74 |
| /* CR75-CR79 reserved */ |
| #define CR_LRR0 80 |
| #define CR_LRR1 81 |
| /* CR82-CR127 reserved */ |
| #ifndef __ASM__ |
| #include <arch/types.h> |
| /** Processor Status Register. */ |
| union psr { |
| __u64 value; |
| struct { |
| unsigned : 1; |
| unsigned be : 1; /**< Big-Endian data accesses. */ |
| unsigned up : 1; /**< User Performance monitor enable. */ |
| unsigned ac : 1; /**< Alignment Check. */ |
| unsigned mfl : 1; /**< Lower floating-point register written. */ |
| unsigned mfh : 1; /**< Upper floating-point register written. */ |
| unsigned : 7; |
| unsigned ic : 1; /**< Interruption Collection. */ |
| unsigned i : 1; /**< Interrupt Bit. */ |
| unsigned pk : 1; /**< Protection Key enable. */ |
| unsigned : 1; |
| unsigned dt : 1; /**< Data address Translation. */ |
| unsigned dfl : 1; /**< Disabled Floating-point Low register set. */ |
| unsigned dfh : 1; /**< Disabled Floating-point High register set. */ |
| unsigned sp : 1; /**< Secure Performance monitors. */ |
| unsigned pp : 1; /**< Privileged Performance monitor enable. */ |
| unsigned di : 1; /**< Disable Instruction set transition. */ |
| unsigned si : 1; /**< Secure Interval timer. */ |
| unsigned db : 1; /**< Debug Breakpoint fault. */ |
| unsigned lp : 1; /**< Lower Privilege transfer trap. */ |
| unsigned tb : 1; /**< Taken Branch trap. */ |
| unsigned rt : 1; /**< Register Stack Translation. */ |
| unsigned : 4; |
| unsigned cpl : 2; /**< Current Privilege Level. */ |
| unsigned is : 1; /**< Instruction Set. */ |
| unsigned mc : 1; /**< Machine Check abort mask. */ |
| unsigned it : 1; /**< Instruction address Translation. */ |
| unsigned id : 1; /**< Instruction Debug fault disable. */ |
| unsigned da : 1; /**< Disable Data Access and Dirty-bit faults. */ |
| unsigned dd : 1; /**< Data Debug fault disable. */ |
| unsigned ss : 1; /**< Single Step enable. */ |
| unsigned ri : 2; /**< Restart Instruction. */ |
| unsigned ed : 1; /**< Exception Deferral. */ |
| unsigned bn : 1; /**< Register Bank. */ |
| unsigned ia : 1; /**< Disable Instruction Access-bit faults. */ |
| } __attribute__ ((packed)); |
| }; |
| typedef union psr psr_t; |
| /** Register Stack Configuration Register */ |
| union rsc { |
| __u64 value; |
| struct { |
| unsigned mode : 2; |
| unsigned pl : 2; /**< Privilege Level. */ |
| unsigned be : 1; /**< Big-endian. */ |
| unsigned : 11; |
| unsigned loadrs : 14; |
| } __attribute__ ((packed)); |
| }; |
| typedef union rsc rsc_t; |
| /** External Interrupt Vector Register */ |
| union cr_ivr { |
| __u8 vector; |
| __u64 value; |
| }; |
| typedef union cr_ivr cr_ivr_t; |
| /** Task Priority Register */ |
| union cr_tpr { |
| struct { |
| unsigned : 4; |
| unsigned mic: 4; /**< Mask Interrupt Class. */ |
| unsigned : 8; |
| unsigned mmi: 1; /**< Mask Maskable Interrupts. */ |
| } __attribute__ ((packed)); |
| __u64 value; |
| }; |
| typedef union cr_tpr cr_tpr_t; |
| /** Interval Timer Vector */ |
| union cr_itv { |
| struct { |
| unsigned vector : 8; |
| unsigned : 4; |
| unsigned : 1; |
| unsigned : 3; |
| unsigned m : 1; /**< Mask. */ |
| } __attribute__ ((packed)); |
| __u64 value; |
| }; |
| typedef union cr_itv cr_itv_t; |
| /** Interruption Status Register */ |
| union cr_isr { |
| struct { |
| union { |
| /** General Exception code field structuring. */ |
| struct { |
| unsigned ge_na : 4; |
| unsigned ge_code : 4; |
| } __attribute__ ((packed)); |
| __u16 code; |
| }; |
| __u8 vector; |
| unsigned : 8; |
| unsigned x : 1; /**< Execute exception. */ |
| unsigned w : 1; /**< Write exception. */ |
| unsigned r : 1; /**< Read exception. */ |
| unsigned na : 1; /**< Non-access exception. */ |
| unsigned sp : 1; /**< Speculative load exception. */ |
| unsigned rs : 1; /**< Register stack. */ |
| unsigned ir : 1; /**< Incomplete Register frame. */ |
| unsigned ni : 1; /**< Nested Interruption. */ |
| unsigned so : 1; /**< IA-32 Supervisor Override. */ |
| unsigned ei : 2; /**< Excepting Instruction. */ |
| unsigned ed : 1; /**< Exception Deferral. */ |
| unsigned : 20; |
| } __attribute__ ((packed)); |
| __u64 value; |
| }; |
| typedef union cr_isr cr_isr_t; |
| /** CPUID Register 3 */ |
| union cpuid3 { |
| struct { |
| __u8 number; |
| __u8 revision; |
| __u8 model; |
| __u8 family; |
| __u8 archrev; |
| } __attribute__ ((packed)); |
| __u64 value; |
| }; |
| typedef union cpuid3 cpuid3_t; |
| #endif /* !__ASM__ */ |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/types.h |
|---|
| 0,0 → 1,62 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __TYPES_H__ |
| #define __TYPES_H__ |
| #define NULL 0 |
| typedef signed char __s8; |
| typedef signed short int __s16; |
| typedef signed int __s32; |
| typedef signed long __s64; |
| typedef unsigned char __u8; |
| typedef unsigned short __u16; |
| typedef unsigned int __u32; |
| typedef unsigned long __u64; |
| typedef unsigned char __r8; /*Reserve byte*/ |
| typedef unsigned short __r16; |
| typedef unsigned int __r32; |
| typedef unsigned long __r64; |
| typedef struct __r128{__r64 lo;__r64 hi;} __r128; |
| typedef __u64 __address; |
| typedef __u64 pfn_t; |
| typedef __u64 ipl_t; |
| typedef __u64 __native; |
| typedef __s64 __snative; |
| typedef struct pte pte_t; |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/elf.h |
|---|
| 0,0 → 1,36 |
| /* |
| * Copyright (C) 2006 Sergey Bondari |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_ELF_H__ |
| #define __ia64_ELF_H__ |
| #define ELF_MACHINE EM_IA_64 |
| #define ELF_DATA_ENCODING ELFDATA2LSB |
| #define ELF_CLASS ELFCLASS64 |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/pal/pal.h |
|---|
| 0,0 → 1,101 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_PAL_H__ |
| #define __ia64_PAL_H__ |
| #define PAL_OK 0 /**< Call completed without error. */ |
| #define PAL_UNIMPL -1 /**< Unimplemented procedure. */ |
| #define PAL_INVARG -2 /**< Invalid argument. */ |
| #define PAL_ERR -3 /**< Can not compete call without error. */ |
| /** These are the indices for PAL_PROC. */ |
| #define PAL_CACHE_FLUSH 1 |
| #define PAL_CACHE_INFO 2 |
| #define PAL_CACHE_INIT 3 |
| #define PAL_CACHE_PROT_INFO 38 |
| #define PAL_CACHE_SHARED_INFO 43 |
| #define PAL_CACHE_SUMMARY 4 |
| #define PAL_MEM_ATTRIB 5 |
| #define PAL_PREFETCH_VISIBILITY 41 |
| #define PAL_PTCE_INFO 6 |
| #define PAL_VM_INFO 7 |
| #define PAL_VM_PAGE_SIZE 34 |
| #define PAL_VM_SUMMARY 8 |
| #define PAL_VM_TR_READ 261 |
| #define PAL_BUS_GET_FEATURES 9 |
| #define PAL_BUS_SET_FEATURES 10 |
| #define PAL_DEBUG_INFO 11 |
| #define PAL_FIXED_ADDR 12 |
| #define PAL_FREQ_BASE 13 |
| #define PAL_FREQ_RATIOS 14 |
| #define PAL_LOGICAL_TO_PHYSICAL 42 |
| #define PAL_PERF_MON_INFO 15 |
| #define PAL_PLATFORM_ADDR 16 |
| #define PAL_PROC_GET_FEATURES 17 |
| #define PAL_PROC_SET_FEATURES 18 |
| #define PAL_REGISTER_INFO 39 |
| #define PAL_RSE_INFO 19 |
| #define PAL_VERSION 20 |
| #define PAL_MC_CLEAR_LOG 21 |
| #define PAL_MC_DRAIN 22 |
| #define PAL_MC_DYNAMIC_STATE 24 |
| #define PAL_MC_ERROR_INFO 25 |
| #define PAL_MC_EXPECTED 23 |
| #define PAL_MC_REGISTER_MEM 27 |
| #define PAL_MC_RESUME 26 |
| #define PAL_HALT 28 |
| #define PAL_HALT_INFO 257 |
| #define PAL_HALT_LIGHT 29 |
| #define PAL_CACHE_LINE_INIT 31 |
| #define PAL_CACHE_READ 259 |
| #define PAL_CACHE_WRITE 260 |
| #define PAL_TEST_INFO 37 |
| #define PAL_TEST_PROC 258 |
| #define PAL_COPY_INFO 30 |
| #define PAL_COPY_PAL 256 |
| #define PAL_ENTER_IA_32_ENV 33 |
| #define PAL_PMI_ENTRYPOINT 32 |
| /* |
| Ski PTCE data |
| */ |
| #define PAL_PTCE_INFO_BASE() (0x100000000LL) |
| #define PAL_PTCE_INFO_COUNT1() (2) |
| #define PAL_PTCE_INFO_COUNT2() (3) |
| #define PAL_PTCE_INFO_STRIDE1() (0x10000000) |
| #define PAL_PTCE_INFO_STRIDE2() (0x2000) |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/memstr.h |
|---|
| 0,0 → 1,39 |
| /* |
| * Copyright (C) 2005 Sergey Bondari |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_MEMSTR_H__ |
| #define __ia64_MEMSTR_H__ |
| #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) |
| extern void memsetw(__address dst, size_t cnt, __u16 x); |
| extern void memsetb(__address dst, size_t cnt, __u8 x); |
| extern int memcmp(__address src, __address dst, int cnt); |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/debug.h |
|---|
| 0,0 → 1,32 |
| /* |
| * Copyright (C) 2005 |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_DEBUG_H__ |
| #define __ia64_DEBUG_H__ |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/drivers/it.h |
|---|
| 0,0 → 1,43 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_IT_H__ |
| #define __ia64_IT_H__ |
| /* |
| * Unfortunately, Ski does not emulate PAL, |
| * so we can't read the real frequency ratios |
| * from firmware. |
| * |
| */ |
| #define IT_DELTA 100000 |
| extern void it_init(void); |
| extern void it_interrupt(void); |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/cpu.h |
|---|
| 0,0 → 1,60 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_CPU_H__ |
| #define __ia64_CPU_H__ |
| #include <arch/types.h> |
| #include <typedefs.h> |
| #include <arch/register.h> |
| #define FAMILY_ITANIUM 0x7 |
| #define FAMILY_ITANIUM2 0x1f |
| struct cpu_arch { |
| __u64 cpuid0; |
| __u64 cpuid1; |
| cpuid3_t cpuid3; |
| }; |
| /** Read CPUID register. |
| * |
| * @param n CPUID register number. |
| * |
| * @return Value of CPUID[n] register. |
| */ |
| static inline __u64 cpuid_read(int n) |
| { |
| __u64 v; |
| __asm__ volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n)); |
| return v; |
| } |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/stack.h |
|---|
| 0,0 → 1,37 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_STACK_H__ |
| #define __ia64_STACK_H__ |
| #define STACK_ITEM_SIZE 8 |
| #define STACK_ALIGNMENT 16 |
| #define STACK_SCRATCH_AREA_SIZE 16 |
| #define REGISTER_STACK_ALIGNMENT 8 |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/barrier.h |
|---|
| 0,0 → 1,45 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_BARRIER_H__ |
| #define __ia64_BARRIER_H__ |
| /* |
| * TODO: Implement true IA-64 memory barriers for macros below. |
| */ |
| #define CS_ENTER_BARRIER() memory_barrier() |
| #define CS_LEAVE_BARRIER() memory_barrier() |
| #define memory_barrier() __asm__ volatile ("mf\n" ::: "memory") |
| #define read_barrier() memory_barrier() |
| #define write_barrier() memory_barrier() |
| #define srlz_i() __asm__ volatile (";; srlz.i ;;\n" ::: "memory") |
| #define srlz_d() __asm__ volatile (";; srlz.d\n" ::: "memory") |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/byteorder.h |
|---|
| 0,0 → 1,36 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_BYTEORDER_H__ |
| #define __ia64_BYTEORDER_H__ |
| /* IA-64 is little-endian */ |
| #define __native_le2host(n) (n) |
| #define __u64_le2host(n) (n) |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/arg.h |
|---|
| 0,0 → 1,34 |
| /* |
| * Copyright (C) 2005 Jakub Jermar |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * |
| * - Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * - Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * - The name of the author may not be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| #ifndef __ia64_ARG_H__ |
| #define __ia64_ARG_H__ |
| #include <stdarg.h> |
| #endif |
| /tags/0.2.0/kernel/arch/ia64/include/smp/atomic.h |
|---|