/kernel/trunk/kernel.config |
---|
98,7 → 98,7 |
! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64] CONFIG_FPU_LAZY (y/n) |
# Power off on halt |
! [ARCH=ppc32] CONFIG_POWEROFF (y/n) |
! [ARCH=ppc32] CONFIG_POWEROFF (n/y) |
## Debugging configuration directives |
/kernel/trunk/arch/ppc32/include/boot/boot.h |
---|
35,7 → 35,7 |
#ifndef __ppc32_BOOT_H__ |
#define __ppc32_BOOT_H__ |
#define BOOT_OFFSET 0x4000 |
#define BOOT_OFFSET 0x8000 |
/* Temporary stack size for boot process */ |
#define TEMP_STACK_SIZE 0x100 |
/kernel/trunk/arch/ppc32/src/exception.S |
---|
116,38 → 116,6 |
stw r12, 156(sp) |
.endm |
.org 0x060 |
jump_to_kernel: |
lis r12, iret@ha |
addi r12, r12, iret@l |
mtlr r12 |
mfmsr r12 |
ori r12, r12, (msr_ir | msr_dr)@l |
mtsrr1 r12 |
addis sp, sp, 0x8000 |
mr r4, sp |
addi r4, r4, 8 |
rfi |
jump_to_kernel_syscall: |
lis r12, syscall_handler@ha |
addi r12, r12, syscall_handler@l |
mtsrr0 r12 |
lis r12, iret_syscall@ha |
addi r12, r12, iret_syscall@l |
mtlr r12 |
mfmsr r12 |
ori r12, r12, (msr_ir | msr_dr)@l |
mtsrr1 r12 |
addis sp, sp, 0x8000 |
rfi |
.org 0x100 |
.global exc_system_reset |
exc_system_reset: |
298,3 → 266,35 |
li r3, 12 |
b jump_to_kernel |
.org 0x4000 |
jump_to_kernel: |
lis r12, iret@ha |
addi r12, r12, iret@l |
mtlr r12 |
mfmsr r12 |
ori r12, r12, (msr_ir | msr_dr)@l |
mtsrr1 r12 |
addis sp, sp, 0x8000 |
mr r4, sp |
addi r4, r4, 8 |
rfi |
jump_to_kernel_syscall: |
lis r12, syscall_handler@ha |
addi r12, r12, syscall_handler@l |
mtsrr0 r12 |
lis r12, iret_syscall@ha |
addi r12, r12, iret_syscall@l |
mtlr r12 |
mfmsr r12 |
ori r12, r12, (msr_ir | msr_dr)@l |
mtsrr1 r12 |
addis sp, sp, 0x8000 |
rfi |
/kernel/trunk/arch/ppc32/src/mm/frame.c |
---|
62,8 → 62,9 |
last_frame = ALIGN_UP(bootinfo.memmap.zones[i].start + bootinfo.memmap.zones[i].size, FRAME_SIZE); |
} |
/* First is exception vector, second is 'implementation specific', third and fourth is reserved */ |
frame_mark_unavailable(0, 4); |
/* First is exception vector, second is 'implementation specific', |
third and fourth is reserved, other contain real mode code */ |
frame_mark_unavailable(0, 8); |
} |