/kernel/trunk/generic/src/adt/btree.c |
---|
28,7 → 28,7 |
/* |
* This B-tree has the following properties: |
* - it is a ballanced 2-3-4 tree (i.e. M = 4) |
* - it is a ballanced 2-3-4 tree (i.e. BTREE_M = 4) |
* - values (i.e. pointers to values) are stored only in leaves |
* - leaves are linked in a list |
* - technically, it is a B+-tree (because of the previous properties) |
/kernel/trunk/arch/ia64/src/ia64.c |
---|
42,6 → 42,7 |
#include <userspace.h> |
#include <console/console.h> |
#include <proc/uarg.h> |
#include <syscall/syscall.h> |
void arch_pre_mm_init(void) |
{ |
101,3 → 102,12 |
; |
} |
} |
/** Set thread-local-storage pointer. |
* |
* We use r13 (a.k.a. tp) for this purpose. |
*/ |
__native sys_tls_set(__native addr) |
{ |
return 0; |
} |
/kernel/trunk/arch/amd64/include/atomic.h |
---|
101,7 → 101,7 |
__asm__ volatile ( |
"0:;" |
#ifdef CONFIG_HT |
"pause;" /* Pentium 4's HT love this instruction */ |
"pause;" |
#endif |
"mov %0, %1;" |
"testq %1, %1;" |
/kernel/trunk/arch/amd64/src/amd64.c |
---|
163,12 → 163,12 |
i8254_normal_operation(); |
} |
/** Set Thread-local-storeage pointer |
/** Set thread-local-storage pointer |
* |
* TLS pointer is set in FS register. Unfortunately the 64-bit |
* part can be set only in CPL0 mode. |
* |
* The specs says, that on %fs:0 there is stored contents of %fs register, |
* The specs say, that on %fs:0 there is stored contents of %fs register, |
* we need not to go to CPL0 to read it. |
*/ |
__native sys_tls_set(__native addr) |
/kernel/trunk/arch/amd64/src/asm_utils.S |
---|
180,8 → 180,7 |
* Both versions have to be of the same size. amd64 assembly is, however, |
* a little bit tricky. For instance, subq $0x80, %rsp and subq $0x78, %rsp |
* can result in two instructions with different op-code lengths. |
* Therefore, pay special attention to the extra NOP's that serve as |
* a necessary fill. |
* Therefore we align the interrupt handlers. |
*/ |
.iflt \i-32 |
/kernel/trunk/arch/mips32/src/mips32.c |
---|
143,7 → 143,7 |
{ |
} |
/** Set Thread-local-storeage pointer |
/** Set thread-local-storage pointer |
* |
* We have it currently in K1, it is |
* possible to have it separately in the future. |
/kernel/trunk/arch/ia32/src/ia32.c |
---|
109,7 → 109,7 |
} |
} |
/** Set Thread-local-storeage pointer |
/** Set thread-local-storage pointer |
* |
* TLS pointer is set in GS register. That means, the GS contains |
* selector, and the descriptor->base is the correct address. |
/kernel/trunk/arch/ia32/src/userspace.c |
---|
42,7 → 42,7 |
void userspace(uspace_arg_t *kernel_uarg) |
{ |
ipl_t ipl; |
ipl = interrupts_disable(); |
__asm__ volatile ( |