/kernel/trunk/test/fpu/fpu1/test.c |
---|
36,15 → 36,42 |
#include <proc/thread.h> |
#include <arch.h> |
#include <arch/arch.h> |
#define THREADS 150*2 |
#define ATTEMPTS 100 |
#define THREADS 15*2 |
#define ATTEMPTS 10 |
#define E_10e8 271828182 |
#define PI_10e8 314159265 |
#ifdef __ia32_ARCH_H__ |
static inline double sqrt(double x) { double v; __asm__ ("fsqrt\n" : "=t" (v) : "0" (x)); return v; } |
#endif |
#ifdef __amd64_ARCH_H__ |
static inline double sqrt(double x) { double v; __asm__ ("fsqrt\n" : "=t" (v) : "0" (x)); return v; } |
#endif |
#ifdef __ia64_ARCH_H__ |
static inline long double sqrt(long double a) |
{ |
long double x = 1; |
long double lx = 0; |
if(a<0.00000000000000001) return 0; |
while(x!=lx) |
{ |
lx=x; |
x=(x+(a/x))/2; |
} |
return x; |
} |
#endif |
static atomic_t threads_ok; |
static waitq_t can_start; |
75,6 → 102,12 |
static void pi(void *data) |
{ |
#ifdef __ia64_ARCH_H__ |
#undef PI_10e8 |
#define PI_10e8 3141592 |
#endif |
int i; |
double lpi, pi; |
double n, ab, ad; |
96,8 → 129,14 |
pi = 2 * n * ad; |
} |
#ifdef __ia64_ARCH_H__ |
if((int)(1000000*pi)!=PI_10e8) |
panic("tid%d: pi*10e8=%d should be %d\n", THREAD->tid, (__native) (1000000*pi),(__native) (PI_10e8/100)); |
#else |
if((int)(100000000*pi)!=PI_10e8) |
panic("tid%d: pi*10e8=%d should be %d\n", THREAD->tid, (__native) (100000000*pi),(__native) PI_10e8); |
#endif |
} |
printf("tid%d: pi*10e8=%d should be %d\n", THREAD->tid, (__native) (100000000*pi),(__native) PI_10e8); |
133,3 → 172,43 |
printf("Test passed.\n"); |
} |
/* |
static void pi(void *data) |
{ |
#undef PI_10e8 |
#define PI_10e8 3141592 |
int i; |
double lpi, pi; |
double n, ab, ad; |
printf("pi test\n"); |
waitq_sleep(&can_start); |
for (i = 0; i<ATTEMPTS; i++) { |
lpi = -1; |
pi = 0; |
for (n=2, ab = sqrt(2); lpi != pi; n *= 2, ab = ad) { |
double sc, cd; |
sc = sqrt(1 - (ab*ab/4)); |
cd = 1 - sc; |
ad = sqrt(ab*ab/4 + cd*cd); |
lpi = pi; |
pi = 2 * n * ad; |
} |
atomic_inc(&threads_ok); |
if((int)(1000000*pi)!=PI_10e8) |
panic("tid%d: pi*10e6=%d\n", THREAD->tid, (int) 1000000*pi); |
} |
printf("tid%d: pi*10e6=%d\n", THREAD->tid, (int) 1000000*pi); |
} |
*/ |
/kernel/trunk/kernel.config |
---|
57,7 → 57,7 |
! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
# Lazy FPU context switching |
! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32] CONFIG_FPU_LAZY (y/n) |
! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64] CONFIG_FPU_LAZY (y/n) |
# Power off on halt |
! [ARCH=ppc32] CONFIG_POWEROFF (y/n) |
81,7 → 81,7 |
@ "synch/rwlock5" Read write test 5 |
@ "synch/semaphore1" Semaphore test 1 |
@ "synch/semaphore2" Sempahore test 2 |
@ [ARCH=ia32|ARCH=amd64] "fpu/fpu1" Intel fpu test 1 |
@ [ARCH=ia32|ARCH=amd64|ARCH=ia64] "fpu/fpu1" Intel fpu test 1 |
@ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1 |
@ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1 |
@ "print/print1" Printf test 1 |
/kernel/trunk/arch/ia64/include/interrupt.h |
---|
78,6 → 78,10 |
extern void general_exception(__u64 vector, istate_t *istate); |
extern int break_instruction(__u64 vector, istate_t *istate); |
extern void universal_handler(__u64 vector, istate_t *istate); |
extern void nop_handler(__u64 vector, istate_t *istate); |
extern void external_interrupt(__u64 vector, istate_t *istate); |
extern void disabled_fp_register(__u64 vector, istate_t *istate); |
#endif |
/kernel/trunk/arch/ia64/include/fpu_context.h |
---|
29,6 → 29,9 |
#ifndef __ia64_FPU_CONTEXT_H__ |
#define __ia64_FPU_CONTEXT_H__ |
#define ARCH_HAS_FPU 1 |
#define FPU_CONTEXT_ALIGN 16 |
#include <arch/types.h> |
#define FRS 128 |
/kernel/trunk/arch/ia64/include/register.h |
---|
36,6 → 36,10 |
#define PSR_DT_MASK (1<<17) |
#define PSR_RT_MASK (1<<27) |
#define PSR_DFL_MASK (1<<18) |
#define PSR_DFH_MASK (1<<19) |
#define PSR_IT_MASK 0x0000001000000000 |
#define PSR_CPL_SHIFT 32 |
/kernel/trunk/arch/ia64/src/fpu_context.c |
---|
28,10 → 28,10 |
*/ |
#include <fpu_context.h> |
#include <arch/register.h> |
#include <print.h> |
void fpu_context_save(fpu_context_t *fctx){ |
return; |
asm volatile( |
"stf.spill [%2]=f2,0x80\n" |
"stf.spill [%3]=f3,0x80\n" |
188,7 → 188,6 |
void fpu_context_restore(fpu_context_t *fctx) |
{ |
return; |
asm volatile( |
"ldf.fill f2=[%2],0x80\n" |
"ldf.fill f3=[%3],0x80\n" |
343,5 → 342,185 |
} |
void fpu_disable(void) |
{ |
asm volatile( |
"ssm %0;;\n" |
"srlz.i\n" |
"srlz.d;;\n" |
: |
:"i" (PSR_DFL_MASK|PSR_DFH_MASK) |
); |
} |
void fpu_enable(void) |
{ |
asm volatile( |
"rsm %0;;\n" |
"srlz.i\n" |
"srlz.d;;\n" |
: |
:"i" (PSR_DFL_MASK|PSR_DFH_MASK) |
); |
} |
void fpu_init(void) |
{ |
__u64 a = 0; |
fpu_enable(); |
asm volatile |
( |
"mov %0=ar.fpsr;;\n" |
"or %0=%0,%1;;\n" |
"mov ar.fpsr=%0;;\n" |
: "+r" (a) |
: "r" (0x38) |
); |
asm volatile( |
"mov f2=f0\n" |
"mov f3=f0\n" |
"mov f4=f0\n" |
"mov f5=f0\n" |
"mov f6=f0\n" |
"mov f7=f0\n" |
"mov f8=f0\n" |
"mov f9=f0\n" |
"mov f10=f0\n" |
"mov f11=f0\n" |
"mov f12=f0\n" |
"mov f13=f0\n" |
"mov f14=f0\n" |
"mov f15=f0\n" |
"mov f16=f0\n" |
"mov f17=f0\n" |
"mov f18=f0\n" |
"mov f19=f0\n" |
"mov f20=f0\n" |
"mov f21=f0\n" |
"mov f22=f0\n" |
"mov f23=f0\n" |
"mov f24=f0\n" |
"mov f25=f0\n" |
"mov f26=f0\n" |
"mov f27=f0\n" |
"mov f28=f0\n" |
"mov f29=f0\n" |
"mov f30=f0\n" |
"mov f31=f0\n" |
"mov f32=f0\n" |
"mov f33=f0\n" |
"mov f34=f0\n" |
"mov f35=f0\n" |
"mov f36=f0\n" |
"mov f37=f0\n" |
"mov f38=f0\n" |
"mov f39=f0\n" |
"mov f40=f0\n" |
"mov f41=f0\n" |
"mov f42=f0\n" |
"mov f43=f0\n" |
"mov f44=f0\n" |
"mov f45=f0\n" |
"mov f46=f0\n" |
"mov f47=f0\n" |
"mov f48=f0\n" |
"mov f49=f0\n" |
"mov f50=f0\n" |
"mov f51=f0\n" |
"mov f52=f0\n" |
"mov f53=f0\n" |
"mov f54=f0\n" |
"mov f55=f0\n" |
"mov f56=f0\n" |
"mov f57=f0\n" |
"mov f58=f0\n" |
"mov f59=f0\n" |
"mov f60=f0\n" |
"mov f61=f0\n" |
"mov f62=f0\n" |
"mov f63=f0\n" |
"mov f64=f0\n" |
"mov f65=f0\n" |
"mov f66=f0\n" |
"mov f67=f0\n" |
"mov f68=f0\n" |
"mov f69=f0\n" |
"mov f70=f0\n" |
"mov f71=f0\n" |
"mov f72=f0\n" |
"mov f73=f0\n" |
"mov f74=f0\n" |
"mov f75=f0\n" |
"mov f76=f0\n" |
"mov f77=f0\n" |
"mov f78=f0\n" |
"mov f79=f0\n" |
"mov f80=f0\n" |
"mov f81=f0\n" |
"mov f82=f0\n" |
"mov f83=f0\n" |
"mov f84=f0\n" |
"mov f85=f0\n" |
"mov f86=f0\n" |
"mov f87=f0\n" |
"mov f88=f0\n" |
"mov f89=f0\n" |
"mov f90=f0\n" |
"mov f91=f0\n" |
"mov f92=f0\n" |
"mov f93=f0\n" |
"mov f94=f0\n" |
"mov f95=f0\n" |
"mov f96=f0\n" |
"mov f97=f0\n" |
"mov f98=f0\n" |
"mov f99=f0\n" |
"mov f100=f0\n" |
"mov f101=f0\n" |
"mov f102=f0\n" |
"mov f103=f0\n" |
"mov f104=f0\n" |
"mov f105=f0\n" |
"mov f106=f0\n" |
"mov f107=f0\n" |
"mov f108=f0\n" |
"mov f109=f0\n" |
"mov f110=f0\n" |
"mov f111=f0\n" |
"mov f112=f0\n" |
"mov f113=f0\n" |
"mov f114=f0\n" |
"mov f115=f0\n" |
"mov f116=f0\n" |
"mov f117=f0\n" |
"mov f118=f0\n" |
"mov f119=f0\n" |
"mov f120=f0\n" |
"mov f121=f0\n" |
"mov f122=f0\n" |
"mov f123=f0\n" |
"mov f124=f0\n" |
"mov f125=f0\n" |
"mov f126=f0\n" |
"mov f127=f0\n" |
); |
fpu_enable(); |
} |
/kernel/trunk/arch/ia64/src/ivt.S |
---|
433,7 → 433,7 |
HEAVYWEIGHT_HANDLER 0x5200 |
HEAVYWEIGHT_HANDLER 0x5300 |
HEAVYWEIGHT_HANDLER 0x5400 general_exception |
HEAVYWEIGHT_HANDLER 0x5500 |
HEAVYWEIGHT_HANDLER 0x5500 disabled_fp_register |
HEAVYWEIGHT_HANDLER 0x5600 |
HEAVYWEIGHT_HANDLER 0x5700 |
HEAVYWEIGHT_HANDLER 0x5800 |
441,7 → 441,7 |
HEAVYWEIGHT_HANDLER 0x5a00 |
HEAVYWEIGHT_HANDLER 0x5b00 |
HEAVYWEIGHT_HANDLER 0x5c00 |
HEAVYWEIGHT_HANDLER 0x5d00 |
HEAVYWEIGHT_HANDLER 0x5d00 |
HEAVYWEIGHT_HANDLER 0x5e00 |
HEAVYWEIGHT_HANDLER 0x5f00 |
/kernel/trunk/arch/ia64/src/dummy.s |
---|
32,16 → 32,10 |
.global asm_delay_loop |
.global cpu_sleep |
.global dummy |
.global fpu_enable |
.global fpu_disable |
.global fpu_init |
calibrate_delay_loop: |
asm_delay_loop: |
cpu_sleep: |
fpu_init: |
fpu_enable: |
fpu_disable: |
dummy: |
br.ret.sptk.many b0 |
/kernel/trunk/arch/ia64/src/interrupt.c |
---|
42,6 → 42,7 |
#include <debug.h> |
#include <syscall/syscall.h> |
#include <print.h> |
#include <proc/scheduler.h> |
#define VECTORS_64_BUNDLE 20 |
#define VECTORS_16_BUNDLE 48 |
173,6 → 174,21 |
panic("General Exception (%s)\n", desc); |
} |
void disabled_fp_register(__u64 vector, istate_t *istate) |
{ |
#ifdef CONFIG_CPU_LAZY |
scheduler_fpu_lazy_request(); |
#endif |
} |
void nop_handler(__u64 vector, istate_t *istate) |
{ |
} |
/** Handle syscall. */ |
int break_instruction(__u64 vector, istate_t *istate) |
{ |