/kernel/trunk/arch/sparc64/include/mm/asid.h |
---|
36,6 → 36,6 |
*/ |
typedef __u16 asid_t; |
#define asid_get() 0 |
#define ASID_MAX_ARCH 0x4095 /* 2^12 - 1 */ |
#endif |
/kernel/trunk/arch/sparc64/Makefile.inc |
---|
51,6 → 51,12 |
CONFIG_PAGE_HT = y |
## Compile with support for address space identifiers. |
# |
CONFIG_ASID = y |
ARCH_SOURCES = \ |
arch/$(ARCH)/src/cpu/cpu.c \ |
arch/$(ARCH)/src/asm.S \ |
/kernel/trunk/arch/sparc64/src/mm/tlb.c |
---|
165,14 → 165,19 |
dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
} |
/** Invalidate all ITLB and DLTB entries for specified page in specified address space. |
/** Invalidate all ITLB and DTLB entries for specified page range in specified address space. |
* |
* @param asid Address Space ID. |
* @param page Page which to sweep out from ITLB and DTLB. |
* @param page First page which to sweep out from ITLB and DTLB. |
* @param cnt Number of ITLB and DTLB entries to invalidate. |
*/ |
void tlb_invalidate_page(asid_t asid, __address page) |
void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt) |
{ |
/* TODO: write asid to some Context register and encode the register in second parameter below. */ |
itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page); |
dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page); |
int i; |
for (i = 0; i < cnt; i++) { |
/* TODO: write asid to some Context register and encode the register in second parameter below. */ |
itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE); |
dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE); |
} |
} |
/kernel/trunk/arch/ia64/include/mm/asid.h |
---|
29,8 → 29,14 |
#ifndef __ia64_ASID_H__ |
#define __ia64_ASID_H__ |
typedef int asid_t; |
#include <arch/types.h> |
#define asid_get() 0 |
typedef __u32 asid_t; |
/* |
* ASID_MAX can range from 2^18 - 1 to 2^24 - , |
* depending on architecture implementation. |
*/ |
#define ASID_MAX_ARCH 16777215 /* 2^24 - 1 */ |
#endif |
/kernel/trunk/arch/ia64/Makefile.inc |
---|
47,6 → 47,12 |
CONFIG_PAGE_HT = y |
## Compile with support for address space identifiers. |
# |
CONFIG_ASID = y |
ARCH_SOURCES = \ |
arch/$(ARCH)/src/start.S \ |
arch/$(ARCH)/src/asm.S \ |
/kernel/trunk/arch/ppc32/include/mm/asid.h |
---|
31,6 → 31,8 |
typedef int asid_t; |
#define asid_get() 0 |
#define ASID_MAX_ARCH 0 |
#define asid_install(as) |
#endif |
/kernel/trunk/arch/amd64/include/mm/asid.h |
---|
1,36 → 1,0 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __amd64_ASID_H__ |
#define __amd64_ASID_H__ |
typedef int asid_t; |
#define asid_get() 0 |
#endif |
link ../../../ia32/include/mm/asid.h |
Property changes: |
Added: svn:special |
+* |
\ No newline at end of property |
/kernel/trunk/arch/mips32/include/mm/asid.h |
---|
30,16 → 30,9 |
#define __mips32_ASID_H__ |
#include <arch/types.h> |
#include <typedefs.h> |
#define ASIDS 256 |
#define ASID_INVALID 0 |
#define ASID_START 1 |
#define ASID_MAX_ARCH 255 |
typedef __u8 asid_t; |
extern asid_t asid_get(void); |
extern void asid_put(asid_t asid); |
extern bool asid_has_conflicts(asid_t asid); |
#endif |
/kernel/trunk/arch/mips32/Makefile.inc |
---|
51,7 → 51,12 |
CONFIG_PAGE_PT = y |
## Compile with support for address space identifiers. |
# |
CONFIG_ASID = y |
## Accepted MACHINEs |
# |
/kernel/trunk/arch/mips32/src/mm/asid.c |
---|
28,93 → 28,5 |
*/ |
#include <arch/mm/asid.h> |
#include <synch/spinlock.h> |
#include <arch.h> |
#include <debug.h> |
#include <typedefs.h> |
SPINLOCK_INITIALIZE(asid_usage_lock); |
static count_t asid_usage[ASIDS]; /**< Usage tracking array for ASIDs */ |
/** Get ASID |
* |
* Get the least used ASID. |
* |
* @return ASID |
*/ |
asid_t asid_get(void) |
{ |
ipl_t ipl; |
int i, j; |
count_t min; |
min = (unsigned) -1; |
ipl = interrupts_disable(); |
spinlock_lock(&asid_usage_lock); |
for (i = ASID_START, j = ASID_START; i < ASIDS; i++) { |
if (asid_usage[i] < min) { |
j = i; |
min = asid_usage[i]; |
if (!min) |
break; |
} |
} |
asid_usage[j]++; |
spinlock_unlock(&asid_usage_lock); |
interrupts_restore(ipl); |
return i; |
} |
/** Release ASID |
* |
* Release ASID by decrementing its usage count. |
* |
* @param asid ASID. |
*/ |
void asid_put(asid_t asid) |
{ |
ipl_t ipl; |
ipl = interrupts_disable(); |
spinlock_lock(&asid_usage_lock); |
ASSERT(asid != ASID_INVALID); |
ASSERT(asid_usage[asid] > 0); |
asid_usage[asid]--; |
spinlock_unlock(&asid_usage_lock); |
interrupts_restore(ipl); |
} |
/** Find out whether ASID is used by more address spaces |
* |
* Find out whether ASID is used by more address spaces. |
* |
* @param asid ASID in question. |
* |
* @return True if 'asid' is used by more address spaces, false otherwise. |
*/ |
bool asid_has_conflicts(asid_t asid) |
{ |
bool has_conflicts = false; |
ipl_t ipl; |
ASSERT(asid != ASID_INVALID); |
ipl = interrupts_disable(); |
spinlock_lock(&asid_usage_lock); |
if (asid_usage[asid] > 1) |
has_conflicts = true; |
spinlock_unlock(&asid_usage_lock); |
interrupts_restore(ipl); |
return has_conflicts; |
} |
/kernel/trunk/arch/mips32/src/mm/tlb.c |
---|
27,7 → 27,7 |
*/ |
#include <arch/mm/tlb.h> |
#include <arch/mm/asid.h> |
#include <mm/asid.h> |
#include <mm/tlb.h> |
#include <mm/page.h> |
#include <mm/as.h> |
494,13 → 494,15 |
cp0_entry_hi_write(hi_save.value); |
} |
/** Invalidate TLB entry for specified page belonging to specified address space. |
/** Invalidate TLB entries for specified page range belonging to specified address space. |
* |
* @param asid Address space identifier. |
* @param page Page whose TLB entry is to be invalidated. |
* @param page First page whose TLB entry is to be invalidated. |
* @param cnt Number of entries to invalidate. |
*/ |
void tlb_invalidate_page(asid_t asid, __address page) |
void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt) |
{ |
int i; |
ipl_t ipl; |
entry_lo_t lo0, lo1; |
entry_hi_t hi, hi_save; |
511,27 → 513,29 |
hi_save.value = cp0_entry_hi_read(); |
ipl = interrupts_disable(); |
hi.value = 0; |
prepare_entry_hi(&hi, asid, page); |
cp0_entry_hi_write(hi.value); |
for (i = 0; i < cnt; i++) { |
hi.value = 0; |
prepare_entry_hi(&hi, asid, page + i * PAGE_SIZE); |
cp0_entry_hi_write(hi.value); |
tlbp(); |
index.value = cp0_index_read(); |
tlbp(); |
index.value = cp0_index_read(); |
if (!index.p) { |
/* Entry was found, index register contains valid index. */ |
tlbr(); |
if (!index.p) { |
/* Entry was found, index register contains valid index. */ |
tlbr(); |
lo0.value = cp0_entry_lo0_read(); |
lo1.value = cp0_entry_lo1_read(); |
lo0.value = cp0_entry_lo0_read(); |
lo1.value = cp0_entry_lo1_read(); |
lo0.v = 0; |
lo1.v = 0; |
lo0.v = 0; |
lo1.v = 0; |
cp0_entry_lo0_write(lo0.value); |
cp0_entry_lo1_write(lo1.value); |
cp0_entry_lo0_write(lo0.value); |
cp0_entry_lo1_write(lo1.value); |
tlbwi(); |
tlbwi(); |
} |
} |
interrupts_restore(ipl); |
/kernel/trunk/arch/mips32/src/mm/as.c |
---|
35,7 → 35,7 |
/** Install address space. |
* |
* Install ASID and if necessary, purge TLB. |
* Install ASID. |
* |
* @param as Address space structure. |
*/ |
45,11 → 45,6 |
ipl_t ipl; |
/* |
* If necessary, purge TLB. |
*/ |
tlb_invalidate_asid(as->asid); /* TODO: do it only if necessary */ |
/* |
* Install ASID. |
*/ |
hi.value = cp0_entry_hi_read(); |
/kernel/trunk/arch/ia32/include/mm/asid.h |
---|
26,11 → 26,19 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/* |
* ia32 has no hardware support for address space identifiers. |
* This file is provided to do nop-implementation of mm/asid.h |
* interface. |
*/ |
#ifndef __ia32_ASID_H__ |
#define __ia32_ASID_H__ |
typedef int asid_t; |
#define asid_get() 0 |
#define ASID_MAX_ARCH 0 |
#define asid_install(as) |
#endif |
/kernel/trunk/arch/ia32/src/mm/tlb.c |
---|
31,17 → 31,6 |
#include <arch/asm.h> |
#include <arch/types.h> |
/** Invalidate all TLB entries |
* |
* Invalidate all TLB entries. |
* |
* @param asid This argument is ignored. |
*/ |
void tlb_invalidate(asid_t asid) |
{ |
write_cr3(read_cr3()); |
} |
/** Invalidate all entries in TLB. */ |
void tlb_invalidate_all(void) |
{ |
57,12 → 46,16 |
tlb_invalidate_all(); |
} |
/** Invalidate TLB entry for specified page belongs to specified address space. |
/** Invalidate TLB entry for specified page range belonging to specified address space. |
* |
* @param asid This parameter is ignored as the architecture doesn't support it. |
* @param page Address of the page whose entry is to be invalidated. |
* @param page Address of the first page whose entry is to be invalidated. |
* @param cnt Number of entries to invalidate. |
*/ |
void tlb_invalidate_page(asid_t asid, __address page) |
void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt) |
{ |
invlpg(page); |
int i; |
for (i = 0; i < cnt; i++) |
invlpg(page + i * PAGE_SIZE); |
} |