/kernel/trunk/arch/sparc64/src/console.c |
---|
0,0 → 1,145 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/console.h> |
#include <genarch/ofw/ofw.h> |
#include <console/chardev.h> |
#include <console/console.h> |
#include <arch/asm.h> |
#include <arch/register.h> |
#include <arch/types.h> |
#include <typedefs.h> |
#include <proc/thread.h> |
#include <synch/mutex.h> |
static void ofw_sparc64_putchar(chardev_t *d, const char ch); |
static char ofw_sparc64_getchar(chardev_t *d); |
static void ofw_sparc64_suspend(chardev_t *d); |
static void ofw_sparc64_resume(chardev_t *d); |
mutex_t canwork; |
static chardev_t ofw_sparc64_console; |
static chardev_operations_t ofw_sparc64_console_ops = { |
.write = ofw_sparc64_putchar, |
.read = ofw_sparc64_getchar, |
.resume = ofw_sparc64_resume, |
.suspend = ofw_sparc64_suspend |
}; |
void ofw_sparc64_console_init(void) |
{ |
chardev_initialize("ofw_sparc64_console", &ofw_sparc64_console, &ofw_sparc64_console_ops); |
stdin = &ofw_sparc64_console; |
stdout = &ofw_sparc64_console; |
mutex_initialize(&canwork); |
} |
/** Write one character. |
* |
* @param d Character device (ignored). |
* @param ch Character to be written. |
*/ |
void ofw_sparc64_putchar(chardev_t *d, const char ch) |
{ |
pstate_reg_t pstate; |
/* |
* 32-bit OpenFirmware depends on PSTATE.AM bit set. |
*/ |
pstate.value = pstate_read(); |
pstate.am = true; |
pstate_write(pstate.value); |
if (ch == '\n') |
ofw_putchar('\r'); |
ofw_putchar(ch); |
pstate.am = false; |
pstate_write(pstate.value); |
} |
/** Read one character. |
* |
* The call is non-blocking. |
* |
* @param d Character device (ignored). |
* @return Character read or zero if no character was read. |
*/ |
char ofw_sparc64_getchar(chardev_t *d) |
{ |
char ch; |
pstate_reg_t pstate; |
/* |
* 32-bit OpenFirmware depends on PSTATE.AM bit set. |
*/ |
pstate.value = pstate_read(); |
pstate.am = true; |
pstate_write(pstate.value); |
ch = ofw_getchar(); |
pstate.am = false; |
pstate_write(pstate.value); |
return ch; |
} |
void ofw_sparc64_suspend(chardev_t *d) |
{ |
mutex_lock(&canwork); |
} |
void ofw_sparc64_resume(chardev_t *d) |
{ |
mutex_unlock(&canwork); |
} |
/** Kernel thread for pushing characters read from OFW to input buffer. |
* |
* @param arg Ignored. |
*/ |
void kofwinput(void *arg) |
{ |
while (1) { |
char ch = 0; |
mutex_lock(&canwork); |
mutex_unlock(&canwork); |
ch = ofw_sparc64_getchar(NULL); |
if (ch) { |
if (ch == '\r') |
ch = '\n'; |
chardev_push_character(&ofw_sparc64_console, ch); |
} |
thread_usleep(25000); |
} |
} |
/kernel/trunk/arch/sparc64/src/sparc64.c |
---|
0,0 → 1,71 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch.h> |
#include <debug.h> |
#include <arch/trap/trap.h> |
#include <arch/console.h> |
#include <arch/drivers/tick.h> |
#include <proc/thread.h> |
void arch_pre_mm_init(void) |
{ |
interrupts_disable(); |
ofw_sparc64_console_init(); |
trap_init(); |
tick_init(); |
} |
void arch_post_mm_init(void) |
{ |
} |
void arch_pre_smp_init(void) |
{ |
} |
void arch_post_smp_init(void) |
{ |
thread_t *t; |
/* |
* Create thread that reads characters from OFW's input. |
*/ |
t = thread_create(kofwinput, NULL, TASK, 0); |
if (!t) |
panic("cannot create kofwinput\n"); |
thread_ready(t); |
} |
void calibrate_delay_loop(void) |
{ |
} |
void before_thread_runs_arch(void) |
{ |
} |
/kernel/trunk/arch/sparc64/src/trap/exception.c |
---|
0,0 → 1,42 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/trap/exception.h> |
#include <debug.h> |
/** Handle instruction_access_exception. */ |
void do_instruction_access_exc(void) |
{ |
panic("Instruction Access Exception\n"); |
} |
/** Handle mem_address_not_aligned. */ |
void do_mem_address_not_aligned(void) |
{ |
panic("Memory Address Not Aligned\n"); |
} |
/kernel/trunk/arch/sparc64/src/trap/trap.c |
---|
0,0 → 1,109 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/trap/trap.h> |
#include <arch/trap/trap_table.h> |
#include <arch/trap/regwin.h> |
#include <arch/trap/exception.h> |
#include <arch/trap/interrupt.h> |
#include <arch/asm.h> |
#include <memstr.h> |
#include <debug.h> |
#include <arch/types.h> |
#include <typedefs.h> |
#include <arch/drivers/tick.h> |
/** Initialize trap table. */ |
void trap_init(void) |
{ |
/* |
* Save kernel provided trap handlers. |
*/ |
memcpy((void *) trap_table_save, (void *) trap_table, TRAP_TABLE_SIZE); |
/* |
* Copy OFW's trap table into kernel. |
*/ |
memcpy((void *) trap_table, (void *) tba_read(), TRAP_TABLE_SIZE); |
/* |
* Install kernel-provided handlers. |
*/ |
trap_install_handler(TT_INSTRUCTION_ACCESS_EXCEPTION, TRAP_TABLE_ENTRY_SIZE, false); |
trap_install_handler(TT_CLEAN_WINDOW, CLEAN_WINDOW_HANDLER_SIZE, false); |
trap_install_handler(TT_MEM_ADDRESS_NOT_ALIGNED, TRAP_TABLE_ENTRY_SIZE, false); |
trap_install_handler(TT_SPILL_0_NORMAL, SPILL_HANDLER_SIZE, false); |
trap_install_handler(TT_FILL_0_NORMAL, FILL_HANDLER_SIZE, false); |
trap_install_handler(TT_INSTRUCTION_ACCESS_EXCEPTION, TRAP_TABLE_ENTRY_SIZE, true); |
trap_install_handler(TT_CLEAN_WINDOW, CLEAN_WINDOW_HANDLER_SIZE, true); |
trap_install_handler(TT_MEM_ADDRESS_NOT_ALIGNED, TRAP_TABLE_ENTRY_SIZE, true); |
trap_install_handler(TT_SPILL_0_NORMAL, SPILL_HANDLER_SIZE, true); |
trap_install_handler(TT_FILL_0_NORMAL, FILL_HANDLER_SIZE, true); |
trap_install_handler(TT_INTERRUPT_LEVEL_1, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_2, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_3, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_4, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_5, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_6, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_7, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_8, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_9, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_10, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_11, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_12, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_13, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_14, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_LEVEL_15, INTERRUPT_LEVEL_N_HANDLER_SIZE, false); |
trap_install_handler(TT_INTERRUPT_VECTOR_TRAP, INTERRUPT_VECTOR_TRAP_HANDLER_SIZE, false); |
} |
/** Copy trap handler to active trap table. |
* |
* The handler is copied from trap_table_kernel to trap_handler. |
* |
* @param tt Trap type. An index that uniquelly identifies handler code. |
* @param len Length of the handler in bytes. Must be multiple of TRAP_TABLE_ENTRY_SIZE (i.e. 32). |
* @param tlnonz If false, tt is considered from the lower half of trap table. If true, the upper half is chosen. |
*/ |
void trap_install_handler(index_t tt, size_t len, bool tlnonz) |
{ |
count_t cnt; |
int i; |
ASSERT(tt < TRAP_TABLE_ENTRY_COUNT/2); |
ASSERT(len % TRAP_TABLE_ENTRY_SIZE == 0); |
if (tlnonz) |
tt += TRAP_TABLE_ENTRY_COUNT/2; |
cnt = len/TRAP_TABLE_ENTRY_SIZE; |
for (i = tt; i < tt + cnt; i++) { |
trap_table[i] = trap_table_save[i]; |
} |
} |
/kernel/trunk/arch/sparc64/src/trap/trap_table.S |
---|
0,0 → 1,336 |
# |
# Copyright (C) 2005 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
/** |
* This file contains two trap tables. |
* First, trap_table, is the one wich contains handlers implemented by |
* kernel. During initialization, these handlers are copied out to |
* the second trap table, trap_table_save, and the first table is |
* overwritten with copy of OFW's own trap table. The copy is then patched |
* from the trap_table_save. |
* |
* This arrangement is beneficial because kernel handlers stay on their |
* link-time addresses which is good for debugging. |
*/ |
.register %g2, #scratch |
.register %g3, #scratch |
.register %g6, #scratch |
.register %g7, #scratch |
.text |
#include <arch/trap/trap_table.h> |
#include <arch/trap/regwin.h> |
#include <arch/trap/interrupt.h> |
#include <arch/trap/exception.h> |
#include <arch/stack.h> |
#define TABLE_SIZE TRAP_TABLE_SIZE |
#define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE |
/* |
* Kernel trap table. |
*/ |
.align TABLE_SIZE |
.global trap_table |
trap_table: |
/* TT = 0x08, TL = 0, instruction_access_exception */ |
.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE |
.global instruction_access_exception |
instruction_access_exception: |
SIMPLE_HANDLER do_instruction_access_exc |
/* TT = 0x24, TL = 0, clean_window handler */ |
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
.global clean_window_handler |
clean_window_handler: |
CLEAN_WINDOW_HANDLER |
/* TT = 0x34, TL = 0, mem_address_not_aligned */ |
.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
.global mem_address_not_aligned |
mem_address_not_aligned: |
SIMPLE_HANDLER do_mem_address_not_aligned |
/* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
.global interrupt_level_1_handler |
interrupt_level_1_handler: |
INTERRUPT_LEVEL_N_HANDLER 1 |
/* TT = 0x42, TL = 0, interrupt_level_2 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE |
.global interrupt_level_2_handler |
interrupt_level_2_handler: |
INTERRUPT_LEVEL_N_HANDLER 2 |
/* TT = 0x43, TL = 0, interrupt_level_3 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE |
.global interrupt_level_3_handler |
interrupt_level_3_handler: |
INTERRUPT_LEVEL_N_HANDLER 3 |
/* TT = 0x44, TL = 0, interrupt_level_4 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE |
.global interrupt_level_4_handler |
interrupt_level_4_handler: |
INTERRUPT_LEVEL_N_HANDLER 4 |
/* TT = 0x45, TL = 0, interrupt_level_5 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE |
.global interrupt_level_5_handler |
interrupt_level_5_handler: |
INTERRUPT_LEVEL_N_HANDLER 5 |
/* TT = 0x46, TL = 0, interrupt_level_6 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE |
.global interrupt_level_6_handler |
interrupt_level_6_handler: |
INTERRUPT_LEVEL_N_HANDLER 6 |
/* TT = 0x47, TL = 0, interrupt_level_7 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE |
.global interrupt_level_7_handler |
interrupt_level_7_handler: |
INTERRUPT_LEVEL_N_HANDLER 7 |
/* TT = 0x48, TL = 0, interrupt_level_8 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE |
.global interrupt_level_8_handler |
interrupt_level_8_handler: |
INTERRUPT_LEVEL_N_HANDLER 8 |
/* TT = 0x49, TL = 0, interrupt_level_9 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE |
.global interrupt_level_9_handler |
interrupt_level_9_handler: |
INTERRUPT_LEVEL_N_HANDLER 9 |
/* TT = 0x4a, TL = 0, interrupt_level_10 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE |
.global interrupt_level_10_handler |
interrupt_level_10_handler: |
INTERRUPT_LEVEL_N_HANDLER 10 |
/* TT = 0x4b, TL = 0, interrupt_level_11 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE |
.global interrupt_level_11_handler |
interrupt_level_11_handler: |
INTERRUPT_LEVEL_N_HANDLER 11 |
/* TT = 0x4c, TL = 0, interrupt_level_12 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE |
.global interrupt_level_12_handler |
interrupt_level_12_handler: |
INTERRUPT_LEVEL_N_HANDLER 12 |
/* TT = 0x4d, TL = 0, interrupt_level_13 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE |
.global interrupt_level_13_handler |
interrupt_level_13_handler: |
INTERRUPT_LEVEL_N_HANDLER 13 |
/* TT = 0x4e, TL = 0, interrupt_level_14 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE |
.global interrupt_level_14_handler |
interrupt_level_14_handler: |
INTERRUPT_LEVEL_N_HANDLER 14 |
/* TT = 0x4f, TL = 0, interrupt_level_15 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE |
.global interrupt_level_15_handler |
interrupt_level_15_handler: |
INTERRUPT_LEVEL_N_HANDLER 15 |
/* TT = 0x60, TL = 0, interrupt_vector_trap handler */ |
.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE |
.global interrupt_vector_trap_handler |
interrupt_vector_trap_handler: |
INTERRUPT_VECTOR_TRAP_HANDLER |
/* TT = 0x80, TL = 0, spill_0_normal handler */ |
.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE |
.global spill_0_normal |
spill_0_normal: |
SPILL_NORMAL_HANDLER |
/* TT = 0xc0, TL = 0, fill_0_normal handler */ |
.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE |
.global fill_0_normal |
fill_0_normal: |
FILL_NORMAL_HANDLER |
/* |
* Handlers for TL>0. |
*/ |
/* TT = 0x08, TL > 0, instruction_access_exception */ |
.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
.global instruction_access_exception_high |
instruction_access_exception_high: |
SIMPLE_HANDLER do_instruction_access_exc |
/* TT = 0x24, TL > 0, clean_window handler */ |
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
.global clean_window_handler_high |
clean_window_handler_high: |
CLEAN_WINDOW_HANDLER |
/* TT = 0x34, TL > 0, mem_address_not_aligned */ |
.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE |
.global mem_address_not_aligned_high |
mem_address_not_aligned_high: |
SIMPLE_HANDLER do_mem_address_not_aligned |
/* TT = 0x80, TL > 0, spill_0_normal handler */ |
.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
.global spill_0_normal_high |
spill_0_normal_high: |
SPILL_NORMAL_HANDLER |
/* TT = 0xc0, TL > 0, fill_0_normal handler */ |
.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE |
.global fill_0_normal_high |
fill_0_normal_high: |
FILL_NORMAL_HANDLER |
/* |
* Save trap table. |
*/ |
.align TABLE_SIZE |
.global trap_table_save |
trap_table_save: |
.space TABLE_SIZE, 0 |
/* Preemptible trap handler. |
* |
* This trap handler makes arrangements to |
* make calling scheduler() possible. |
* |
* The caller is responsible for doing save |
* and allocating PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE |
* bytes on stack. |
* |
* Input registers: |
* %l0 Address of function to call. |
* Output registers: |
* %l1 - %l7 Copy of %g1 - %g7 |
*/ |
.global preemptible_handler |
preemptible_handler: |
/* |
* Save TSTATE, TPC, TNPC and PSTATE aside. |
*/ |
rdpr %tstate, %g1 |
rdpr %tpc, %g2 |
rdpr %tnpc, %g3 |
rdpr %pstate, %g4 |
stx %g1, [%fp + STACK_BIAS + SAVED_TSTATE] |
stx %g2, [%fp + STACK_BIAS + SAVED_TPC] |
stx %g3, [%fp + STACK_BIAS + SAVED_TNPC] |
stx %g4, [%fp + STACK_BIAS + SAVED_PSTATE] |
/* |
* Write 0 to TL. |
*/ |
wrpr %g0, 0, %tl |
/* |
* Alter PSTATE. |
* - switch to normal globals. |
*/ |
and %g4, ~1, %g4 ! mask alternate globals |
wrpr %g4, 0, %pstate |
/* |
* Save the normal globals. |
*/ |
SAVE_GLOBALS |
/* |
* Call the higher-level handler. |
*/ |
call %l0 |
nop |
/* |
* Restore the normal global register set. |
*/ |
RESTORE_GLOBALS |
/* |
* Restore PSTATE from saved copy. |
* Alternate globals become active. |
*/ |
ldx [%fp + STACK_BIAS + SAVED_PSTATE], %l4 |
wrpr %l4, 0, %pstate |
/* |
* Write 1 to TL. |
*/ |
wrpr %g0, 1, %tl |
/* |
* Read TSTATE, TPC and TNPC from saved copy. |
*/ |
ldx [%fp + STACK_BIAS + SAVED_TSTATE], %g1 |
ldx [%fp + STACK_BIAS + SAVED_TPC], %g2 |
ldx [%fp + STACK_BIAS + SAVED_TNPC], %g3 |
/* |
* Do restore to match the save instruction from the top-level handler. |
*/ |
restore |
/* |
* On execution of retry instruction, CWP will be restored from TSTATE register. |
* However, because of scheduling, it is possible that CWP in saved TSTATE |
* is different from current CWP. The following chunk of code fixes CWP |
* in the saved copy of TSTATE. |
*/ |
rdpr %cwp, %g4 ! read current CWP |
and %g1, ~0x1f, %g1 ! clear CWP field in saved TSTATE |
or %g1, %g4, %g1 ! write current CWP to TSTATE |
/* |
* Restore TSTATE, TPC and TNPC from saved copies. |
*/ |
wrpr %g1, 0, %tstate |
wrpr %g2, 0, %tpc |
wrpr %g3, 0, %tnpc |
/* |
* Return from interrupt. |
*/ |
retry |
/kernel/trunk/arch/sparc64/src/trap/interrupt.c |
---|
0,0 → 1,44 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/interrupt.h> |
#include <interrupt.h> |
#include <debug.h> |
/** Register Interrupt Level Handler. |
* |
* @param n Interrupt Level (1 - 15). |
* @param name Short descriptive string. |
* @param f Handler. |
*/ |
void interrupt_register(int n, const char *name, iroutine f) |
{ |
ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS); |
exc_register(n - 1, name, f); |
} |
/kernel/trunk/arch/sparc64/src/panic.S |
---|
0,0 → 1,40 |
# |
# Copyright (C) 2005 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
.text |
#include <arch/stack.h> |
.global panic_printf |
panic_printf: |
call printf |
nop |
call halt |
nop |
/* Not reached. */ |
/kernel/trunk/arch/sparc64/src/context.S |
---|
0,0 → 1,108 |
# |
# Copyright (C) 2005 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
#include <arch/context_offset.h> |
#include <arch/stack.h> |
/** |
* Both context_save_arch() and context_restore_arch() are |
* leaf-optimized procedures. This kind of optimization |
* is very important and prevents any implicit window |
* spill/fill/clean traps in these very core kernel |
* functions. |
*/ |
.text |
.global context_save_arch |
.global context_restore_arch |
.macro CONTEXT_STORE r |
stx %sp, [\r + OFFSET_SP] |
stx %o7, [\r + OFFSET_PC] |
stx %i0, [\r + OFFSET_I0] |
stx %i1, [\r + OFFSET_I1] |
stx %i2, [\r + OFFSET_I2] |
stx %i3, [\r + OFFSET_I3] |
stx %i4, [\r + OFFSET_I4] |
stx %i5, [\r + OFFSET_I5] |
stx %fp, [\r + OFFSET_FP] |
stx %i7, [\r + OFFSET_I7] |
stx %l0, [\r + OFFSET_L0] |
stx %l1, [\r + OFFSET_L1] |
stx %l2, [\r + OFFSET_L2] |
stx %l3, [\r + OFFSET_L3] |
stx %l4, [\r + OFFSET_L4] |
stx %l5, [\r + OFFSET_L5] |
stx %l6, [\r + OFFSET_L6] |
stx %l7, [\r + OFFSET_L7] |
rdpr %cleanwin, %g1 |
stx %g1, [\r + OFFSET_CLEANWIN] |
.endm |
.macro CONTEXT_LOAD r |
ldx [\r + OFFSET_SP], %sp |
ldx [\r + OFFSET_PC], %o7 |
ldx [\r + OFFSET_I0], %i0 |
ldx [\r + OFFSET_I1], %i1 |
ldx [\r + OFFSET_I2], %i2 |
ldx [\r + OFFSET_I3], %i3 |
ldx [\r + OFFSET_I4], %i4 |
ldx [\r + OFFSET_I5], %i5 |
ldx [\r + OFFSET_FP], %fp |
ldx [\r + OFFSET_I7], %i7 |
ldx [\r + OFFSET_L0], %l0 |
ldx [\r + OFFSET_L1], %l1 |
ldx [\r + OFFSET_L2], %l2 |
ldx [\r + OFFSET_L3], %l3 |
ldx [\r + OFFSET_L4], %l4 |
ldx [\r + OFFSET_L5], %l5 |
ldx [\r + OFFSET_L6], %l6 |
ldx [\r + OFFSET_L7], %l7 |
ldx [\r + OFFSET_CLEANWIN], %g1 |
wrpr %g1, %g0, %cleanwin |
.endm |
context_save_arch: |
CONTEXT_STORE %o0 |
retl |
mov 1, %o0 ! context_save_arch returns 1 |
context_restore_arch: |
# |
# Flush all active windows. |
# This is essential, because CONTEXT_LOAD overwrites |
# %sp of CWP - 1 with the value written to %fp of CWP. |
# Flushing all active windows mitigates this problem |
# as CWP - 1 becomes the overlap window. |
# |
flushw |
CONTEXT_LOAD %o0 |
retl |
xor %o0, %o0, %o0 ! context_restore_arch returns 0 |
/kernel/trunk/arch/sparc64/src/drivers/tick.c |
---|
0,0 → 1,82 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/drivers/tick.h> |
#include <arch/interrupt.h> |
#include <arch/asm.h> |
#include <arch/register.h> |
#include <debug.h> |
#include <time/clock.h> |
/** Initialize tick interrupt. */ |
void tick_init(void) |
{ |
tick_compare_reg_t compare; |
interrupt_register(14, "tick_int", tick_interrupt); |
compare.int_dis = false; |
compare.tick_cmpr = TICK_DELTA; |
tick_compare_write(compare.value); |
tick_write(0); |
} |
/** Process tick interrupt. |
* |
* @param n Interrupt Level, 14, (can be ignored) |
* @param stack Stack pointer of the interrupted context. |
*/ |
void tick_interrupt(int n, void *stack) |
{ |
softint_reg_t softint, clear; |
softint.value = softint_read(); |
/* |
* Make sure we are servicing interrupt_level_14 |
*/ |
ASSERT(n == 14); |
/* |
* Make sure we are servicing TICK_INT. |
*/ |
ASSERT(softint.tick_int); |
/* |
* Clear tick interrupt. |
*/ |
clear.value = 0; |
clear.tick_int = 1; |
clear_softint_write(clear.value); |
/* |
* Restart counter. |
*/ |
tick_write(0); |
clock(); |
} |
/kernel/trunk/arch/sparc64/src/dummy.s |
---|
0,0 → 1,66 |
# |
# Copyright (C) 2005 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
.text |
.global asm_delay_loop |
.global cpu_sleep |
.global fmath_dpow |
.global fmath_fint |
.global fmath_get_decimal_exponent |
.global fmath_is_infinity |
.global fmath_is_nan |
.global fpu_context_restore |
.global fpu_context_save |
.global fpu_enable |
.global fpu_init |
.global userspace |
.global dummy |
asm_delay_loop: |
cpu_sleep: |
fmath_dpow: |
fmath_fint: |
fmath_get_decimal_exponent: |
fmath_is_infinity: |
fmath_is_nan: |
fpu_context_restore: |
fpu_context_save: |
fpu_enable: |
fpu_init: |
userspace: |
dummy: |
retl |
nop |
.global cpu_halt |
cpu_halt: |
b cpu_halt |
nop |
/kernel/trunk/arch/sparc64/src/mm/tlb.c |
---|
0,0 → 1,178 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/mm/tlb.h> |
#include <mm/tlb.h> |
#include <arch/mm/frame.h> |
#include <arch/mm/page.h> |
#include <arch/mm/mmu.h> |
#include <print.h> |
#include <arch/types.h> |
#include <typedefs.h> |
#include <config.h> |
#include <arch/trap/trap.h> |
/** Initialize ITLB and DTLB. |
* |
* The goal of this function is to disable MMU |
* so that both TLBs can be purged and new |
* kernel 4M locked entry can be installed. |
* After TLB is initialized, MMU is enabled |
* again. |
* |
* Switching MMU off imposes the requirement for |
* the kernel to run in identity mapped environment. |
*/ |
void tlb_arch_init(void) |
{ |
tlb_tag_access_reg_t tag; |
tlb_data_t data; |
frame_address_t fr; |
page_address_t pg; |
fr.address = config.base; |
pg.address = config.base; |
immu_disable(); |
dmmu_disable(); |
/* |
* For simplicity, we do identity mapping of first 4M of memory. |
* The very next change should be leaving the first 4M unmapped. |
*/ |
tag.value = 0; |
tag.vpn = pg.vpn; |
itlb_tag_access_write(tag.value); |
dtlb_tag_access_write(tag.value); |
data.value = 0; |
data.v = true; |
data.size = PAGESIZE_4M; |
data.pfn = fr.pfn; |
data.l = true; |
data.cp = 1; |
data.cv = 1; |
data.p = true; |
data.w = true; |
data.g = true; |
itlb_data_in_write(data.value); |
dtlb_data_in_write(data.value); |
/* |
* Register window traps can occur before MMU is enabled again. |
* This ensures that any such traps will be handled from |
* kernel identity mapped trap handler. |
*/ |
trap_switch_trap_table(); |
tlb_invalidate_all(); |
dmmu_enable(); |
immu_enable(); |
} |
/** Print contents of both TLBs. */ |
void tlb_print(void) |
{ |
int i; |
tlb_data_t d; |
tlb_tag_read_reg_t t; |
printf("I-TLB contents:\n"); |
for (i = 0; i < ITLB_ENTRY_COUNT; i++) { |
d.value = itlb_data_access_read(i); |
t.value = itlb_tag_read_read(i); |
printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", |
i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); |
} |
printf("D-TLB contents:\n"); |
for (i = 0; i < DTLB_ENTRY_COUNT; i++) { |
d.value = dtlb_data_access_read(i); |
t.value = dtlb_tag_read_read(i); |
printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", |
i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); |
} |
} |
/** Invalidate all unlocked ITLB and DTLB entries. */ |
void tlb_invalidate_all(void) |
{ |
int i; |
tlb_data_t d; |
tlb_tag_read_reg_t t; |
for (i = 0; i < ITLB_ENTRY_COUNT; i++) { |
d.value = itlb_data_access_read(i); |
if (!d.l) { |
t.value = itlb_tag_read_read(i); |
d.v = false; |
itlb_tag_access_write(t.value); |
itlb_data_access_write(i, d.value); |
} |
} |
for (i = 0; i < DTLB_ENTRY_COUNT; i++) { |
d.value = dtlb_data_access_read(i); |
if (!d.l) { |
t.value = dtlb_tag_read_read(i); |
d.v = false; |
dtlb_tag_access_write(t.value); |
dtlb_data_access_write(i, d.value); |
} |
} |
} |
/** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context). |
* |
* @param asid Address Space ID. |
*/ |
void tlb_invalidate_asid(asid_t asid) |
{ |
/* TODO: write asid to some Context register and encode the register in second parameter below. */ |
itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
} |
/** Invalidate all ITLB and DLTB entries for specified page in specified address space. |
* |
* @param asid Address Space ID. |
* @param page Page which to sweep out from ITLB and DTLB. |
*/ |
void tlb_invalidate_page(asid_t asid, __address page) |
{ |
/* TODO: write asid to some Context register and encode the register in second parameter below. */ |
itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page); |
dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page); |
} |
/kernel/trunk/arch/sparc64/src/mm/frame.c |
---|
0,0 → 1,36 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/mm/frame.h> |
#include <mm/frame.h> |
#include <config.h> |
void frame_arch_init(void) |
{ |
zone_create_in_region(0, config.memory_size & ~(FRAME_SIZE - 1)); |
} |
/kernel/trunk/arch/sparc64/src/mm/page.c |
---|
0,0 → 1,33 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/mm/page.h> |
void page_arch_init(void) |
{ |
} |
/kernel/trunk/arch/sparc64/src/cpu/cpu.c |
---|
0,0 → 1,91 |
/* |
* Copyright (C) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <cpu.h> |
#include <arch.h> |
#include <arch/register.h> |
#include <arch/asm.h> |
#include <print.h> |
void cpu_arch_init(void) |
{ |
} |
void cpu_identify(void) |
{ |
CPU->arch.ver.value = ver_read(); |
} |
void cpu_print_report(cpu_t *m) |
{ |
char *manuf, *impl; |
switch (CPU->arch.ver.manuf) { |
case MANUF_FUJITSU: |
manuf = "Fujitsu"; |
break; |
case MANUF_ULTRASPARC: |
manuf = "UltraSPARC"; |
break; |
case MANUF_SUN: |
manuf = "Sun"; |
break; |
default: |
manuf = "Unknown"; |
break; |
} |
switch (CPU->arch.ver.impl) { |
case IMPL_ULTRASPARCI: |
impl = "UltraSPARC I"; |
break; |
case IMPL_ULTRASPARCII: |
impl = "UltraSPARC II"; |
break; |
case IMPL_ULTRASPARCII_I: |
impl = "UltraSPARC IIi"; |
break; |
case IMPL_ULTRASPARCII_E: |
impl = "UltraSPARC IIe"; |
break; |
case IMPL_ULTRASPARCIII: |
impl = "UltraSPARC III"; |
break; |
case IMPL_ULTRASPARCIV_PLUS: |
impl = "UltraSPARC IV+"; |
break; |
case IMPL_SPARC64V: |
impl = "SPARC 64V"; |
break; |
default: |
impl = "Unknown"; |
break; |
} |
printf("cpu%d: manuf=%s, impl=%s, mask=%d\n", CPU->id, manuf, impl, CPU->arch.ver.mask); |
} |
/kernel/trunk/arch/sparc64/src/start.S |
---|
0,0 → 1,65 |
# |
# Copyright (C) 2005 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
.register %g2, #scratch |
.register %g3, #scratch |
.register %g6, #scratch |
.register %g7, #scratch |
.section K_TEXT_START, "ax" |
.global kernel_image_start |
kernel_image_start: |
0: |
b 1f |
nop |
# |
# This header forces SILO to load the kernel at 0x4000. |
# More precisely, SILO will think this is an old version of Linux. |
# |
.ascii "HdrS" |
.word 0 |
.half 0 |
.align 8 |
1: |
set ofw, %l0 |
call ofw_init |
stx %o4, [%l0] |
call main_bsp |
nop |
/* Not reached. */ |
2: |
b 2b |
nop |
/kernel/trunk/arch/sparc64/src/asm.S |
---|
0,0 → 1,41 |
# |
# Copyright (C) 2005 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
.text |
.global memcpy |
.global memsetb |
memcpy: |
b _memcpy |
nop |
memsetb: |
b _memsetb |
nop |