31,6 → 31,7 |
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#include <arch/mm/tte.h> |
#include <arch/asm.h> |
#include <arch/barrier.h> |
#include <arch/types.h> |
#include <typedefs.h> |
|
97,6 → 98,7 |
} __attribute__ ((packed)); |
}; |
typedef union tlb_tag_read_reg tlb_tag_read_reg_t; |
typedef union tlb_tag_read_reg tlb_tag_access_reg_t; |
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/** Read IMMU TLB Data Access Register. |
* |
134,7 → 136,7 |
* |
* @return Current value of specified IMMU TLB Tag Read Register. |
*/ |
static inline __u64 itlb_tag_read(index_t entry) |
static inline __u64 itlb_tag_read_read(index_t entry) |
{ |
tlb_tag_read_addr_t tag; |
|
149,7 → 151,7 |
* |
* @return Current value of specified DMMU TLB Tag Read Register. |
*/ |
static inline __u64 dtlb_tag_read(index_t entry) |
static inline __u64 dtlb_tag_read_read(index_t entry) |
{ |
tlb_tag_read_addr_t tag; |
|
158,4 → 160,44 |
return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value); |
} |
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/** Write IMMU TLB Tag Access Register. |
* |
* @param v Value to be written. |
*/ |
static inline void itlb_tag_access_write(__u64 v) |
{ |
asi_u64_write(ASI_IMMU, VA_IMMU_TAG_ACCESS, v); |
flush(); |
} |
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/** Write DMMU TLB Tag Access Register. |
* |
* @param v Value to be written. |
*/ |
static inline void dtlb_tag_access_write(__u64 v) |
{ |
asi_u64_write(ASI_DMMU, VA_DMMU_TAG_ACCESS, v); |
flush(); |
} |
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/** Write IMMU TLB Data in Register. |
* |
* @param v Value to be written. |
*/ |
static inline void itlb_data_in_write(__u64 v) |
{ |
asi_u64_write(ASI_ITLB_DATA_IN_REG, 0, v); |
flush(); |
} |
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/** Write DMMU TLB Data in Register. |
* |
* @param v Value to be written. |
*/ |
static inline void dtlb_data_in_write(__u64 v) |
{ |
asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v); |
flush(); |
} |
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#endif |