/kernel/trunk/arch/sparc64/include/mm/mmu.h |
---|
110,7 → 110,7 |
cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0); |
cr.im = enable; |
asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value); |
flush(); |
membar(); |
} |
/** Disable or Enable DMMU. */ |
121,7 → 121,7 |
cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0); |
cr.dm = enable; |
asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value); |
flush(); |
membar(); |
} |
#endif |