/kernel/trunk/arch/sparc64/include/trap.h |
---|
29,6 → 29,16 |
#ifndef __sparc64_TRAP_H__ |
#define __sparc64_TRAP_H__ |
#include <arch/trap_table.h> |
#include <arch/asm.h> |
/** Switch to in-kernel trap table. */ |
static inline void trap_switch_trap_table(void) |
{ |
/* Point TBA to kernel copy of OFW's trap table. */ |
tba_write((__u64) trap_table); |
} |
extern void trap_init(void); |
#endif |
/kernel/trunk/arch/sparc64/include/atomic.h |
---|
38,12 → 38,24 |
* WARNING: the following functions cause the code to be preemption-unsafe !!! |
*/ |
static inline void atomic_inc(atomic_t *val) { |
static inline void atomic_inc(atomic_t *val) |
{ |
val->count++; |
} |
static inline void atomic_dec(atomic_t *val) { |
static inline void atomic_dec(atomic_t *val) |
{ |
val->count--; |
} |
static inline void atomic_set(atomic_t *val, __u64 i) |
{ |
val->count = i; |
} |
static inline __u64 atomic_get(atomic_t *val) |
{ |
return val->count; |
} |
#endif |
/kernel/trunk/arch/sparc64/src/sparc64.c |
---|
35,6 → 35,7 |
void arch_pre_mm_init(void) |
{ |
ofw_sparc64_console_init(); |
trap_init(); |
} |
void arch_post_mm_init(void) |
43,7 → 44,6 |
void arch_pre_smp_init(void) |
{ |
trap_init(); |
} |
void arch_post_smp_init(void) |
/kernel/trunk/arch/sparc64/src/trap.c |
---|
31,6 → 31,7 |
#include <arch/asm.h> |
#include <memstr.h> |
/** Initialize trap table. */ |
void trap_init(void) |
{ |
/* |
37,7 → 38,4 |
* Copy OFW's trap table into kernel. |
*/ |
memcpy((void *) trap_table, (void *) tba_read(), TRAP_TABLE_SIZE); |
/* Point TBA to kernel copy of OFW's trap table. */ |
tba_write((__u64) trap_table); |
} |
/kernel/trunk/arch/sparc64/src/mm/tlb.c |
---|
35,6 → 35,7 |
#include <arch/types.h> |
#include <typedefs.h> |
#include <config.h> |
#include <arch/trap.h> |
/** Initialize ITLB and DTLB. |
* |
43,6 → 44,9 |
* kernel 4M locked entry can be installed. |
* After TLB is initialized, MMU is enabled |
* again. |
* |
* Switching MMU off imposes the requirement for |
* the kernel to run in identity mapped environment. |
*/ |
void tlb_arch_init(void) |
{ |
81,6 → 85,13 |
itlb_data_in_write(data.value); |
dtlb_data_in_write(data.value); |
/* |
* Register window traps can occur before MMU is enabled again. |
* This ensures that any such traps will be handled from |
* kernel identity mapped trap handler. |
*/ |
trap_switch_trap_table(); |
tlb_invalidate_all(); |
dmmu_enable(); |