/kernel/trunk/arch/ppc64/src/console.c |
---|
File deleted |
/kernel/trunk/arch/ppc64/src/exception.S |
---|
31,6 → 31,123 |
.section K_UNMAPPED_TEXT_START, "ax" |
.macro CONTEXT_STORE |
# save R12 in SPRG1, backup CR in R12 |
# save SP in SPRG2 |
mtsprg1 r12 |
mfcr r12 |
mtsprg2 sp |
# check whether SP is in kernel |
andis. sp, sp, 0x8000 |
bne 1f |
# stack is in user-space |
mfsprg0 sp |
b 2f |
1: |
# stack is in kernel |
mfsprg2 sp |
subis sp, sp, 0x8000 |
2: |
subi sp, sp, 160 |
stw r0, 8(sp) |
stw r2, 12(sp) |
stw r3, 16(sp) |
stw r4, 20(sp) |
stw r5, 24(sp) |
stw r6, 28(sp) |
stw r7, 32(sp) |
stw r8, 36(sp) |
stw r9, 40(sp) |
stw r10, 44(sp) |
stw r11, 48(sp) |
stw r13, 52(sp) |
stw r14, 56(sp) |
stw r15, 60(sp) |
stw r16, 64(sp) |
stw r17, 68(sp) |
stw r18, 72(sp) |
stw r19, 76(sp) |
stw r20, 80(sp) |
stw r21, 84(sp) |
stw r22, 88(sp) |
stw r23, 92(sp) |
stw r24, 96(sp) |
stw r25, 100(sp) |
stw r26, 104(sp) |
stw r27, 108(sp) |
stw r28, 112(sp) |
stw r29, 116(sp) |
stw r30, 120(sp) |
stw r31, 124(sp) |
stw r12, 128(sp) |
mfsrr0 r12 |
stw r12, 132(sp) |
mfsrr1 r12 |
stw r12, 136(sp) |
mflr r12 |
stw r12, 140(sp) |
mfctr r12 |
stw r12, 144(sp) |
mfxer r12 |
stw r12, 148(sp) |
mfsprg1 r12 |
stw r12, 152(sp) |
mfsprg2 r12 |
stw r12, 156(sp) |
.endm |
.org 0x060 |
jump_to_kernel: |
lis r12, iret@ha |
addi r12, r12, iret@l |
mtlr r12 |
mfmsr r12 |
ori r12, r12, (msr_ir | msr_dr)@l |
mtsrr1 r12 |
addis sp, sp, 0x8000 |
mr r4, sp |
addi r4, r4, 8 |
rfi |
jump_to_kernel_syscall: |
lis r12, syscall_handler@ha |
addi r12, r12, syscall_handler@l |
mtsrr0 r12 |
lis r12, iret_syscall@ha |
addi r12, r12, iret_syscall@l |
mtlr r12 |
mfmsr r12 |
ori r12, r12, (msr_ir | msr_dr)@l |
mtsrr1 r12 |
addis sp, sp, 0x8000 |
rfi |
.org 0x100 |
.global exc_system_reset |
exc_system_reset: |
44,23 → 161,27 |
.org 0x300 |
.global exc_data_storage |
exc_data_storage: |
b exc_data_storage |
CONTEXT_STORE |
.org 0x380 |
.global exc_data_segment |
exc_data_segment: |
b exc_data_segment |
lis r12, pht_refill@ha |
addi r12, r12, pht_refill@l |
mtsrr0 r12 |
li r3, 1 |
b jump_to_kernel |
.org 0x400 |
.global exc_instruction_storage |
exc_instruction_storage: |
b exc_instruction_storage |
CONTEXT_STORE |
.org 0x480 |
.global exc_instruction_segment |
exc_instruction_segment: |
b exc_instruction_segment |
lis r12, pht_refill@ha |
addi r12, r12, pht_refill@l |
mtsrr0 r12 |
li r3, 0 |
b jump_to_kernel |
.org 0x500 |
.global exc_external |
exc_external: |
84,76 → 205,14 |
.org 0x900 |
.global exc_decrementer |
exc_decrementer: |
mtspr sprg1, sp |
CONTEXT_STORE |
subis sp, sp, 0x8000 |
lis r12, exc_dispatch@ha |
addi r12, r12, exc_dispatch@l |
mtsrr0 r12 |
subi sp, sp, 144 |
stw r0, 0(sp) |
stw r2, 4(sp) |
stw r3, 8(sp) |
stw r4, 12(sp) |
stw r5, 16(sp) |
stw r6, 20(sp) |
stw r7, 24(sp) |
stw r8, 28(sp) |
stw r9, 32(sp) |
stw r10, 36(sp) |
stw r11, 40(sp) |
stw r12, 44(sp) |
stw r13, 48(sp) |
stw r14, 52(sp) |
stw r15, 56(sp) |
stw r16, 60(sp) |
stw r17, 64(sp) |
stw r18, 68(sp) |
stw r19, 72(sp) |
stw r20, 76(sp) |
stw r21, 80(sp) |
stw r22, 84(sp) |
stw r23, 88(sp) |
stw r24, 92(sp) |
stw r25, 96(sp) |
stw r26, 100(sp) |
stw r27, 104(sp) |
stw r28, 108(sp) |
stw r29, 112(sp) |
stw r30, 116(sp) |
stw r31, 120(sp) |
mfspr r3, srr0 |
stw r3, 124(sp) |
mfspr r3, srr1 |
stw r3, 128(sp) |
mflr r3 |
stw r3, 132(sp) |
mfcr r3 |
stw r3, 136(sp) |
mfctr r3 |
stw r3, 140(sp) |
mfxer r3 |
stw r3, 144(sp) |
lis r3, exc_dispatch@ha |
addi r3, r3, exc_dispatch@l |
mtspr srr0, r3 |
mfmsr r3 |
ori r3, r3, (msr_ir | msr_dr)@l |
mtspr srr1, r3 |
lis r3, iret@ha |
addi r3, r3, iret@l |
mtlr r3 |
addis sp, sp, 0x8000 |
li r3, 10 |
rfid |
b jump_to_kernel |
.org 0xa00 |
.global exc_reserved0 |
168,8 → 227,10 |
.org 0xc00 |
.global exc_syscall |
exc_syscall: |
b exc_syscall |
CONTEXT_STORE |
b jump_to_kernel_syscall |
.org 0xd00 |
.global exc_trace |
exc_trace: |
/kernel/trunk/arch/ppc64/src/asm.S |
---|
30,65 → 30,174 |
.text |
.global userspace_asm |
.global iret |
.global iret_syscall |
.global memsetb |
.global memcpy |
.global memcpy_from_uspace |
.global memcpy_to_uspace |
.global memcpy_from_uspace_failover_address |
.global memcpy_to_uspace_failover_address |
userspace_asm: |
# r3 = uspace_uarg |
# r4 = stack |
# r5 = entry |
# disable interrupts |
mfmsr r31 |
rlwinm r31, r31, 0, 17, 15 |
mtmsr r31 |
# set entry point |
mtsrr0 r5 |
# set problem state, enable interrupts |
ori r31, r31, msr_pr |
ori r31, r31, msr_ee |
mtsrr1 r31 |
# set stack |
mr sp, r4 |
# jump to userspace |
rfi |
iret: |
lwz r3, 144(sp) |
mtxer r3 |
lwz r3, 140(sp) |
mtctr r3 |
# disable interrupts |
lwz r3, 136(sp) |
mtcr r3 |
mfmsr r31 |
rlwinm r31, r31, 0, 17, 15 |
mtmsr r31 |
lwz r3, 132(sp) |
mtlr r3 |
lwz r0, 8(sp) |
lwz r2, 12(sp) |
lwz r3, 16(sp) |
lwz r4, 20(sp) |
lwz r5, 24(sp) |
lwz r6, 28(sp) |
lwz r7, 32(sp) |
lwz r8, 36(sp) |
lwz r9, 40(sp) |
lwz r10, 44(sp) |
lwz r11, 48(sp) |
lwz r13, 52(sp) |
lwz r14, 56(sp) |
lwz r15, 60(sp) |
lwz r16, 64(sp) |
lwz r17, 68(sp) |
lwz r18, 72(sp) |
lwz r19, 76(sp) |
lwz r20, 80(sp) |
lwz r21, 84(sp) |
lwz r22, 88(sp) |
lwz r23, 92(sp) |
lwz r24, 96(sp) |
lwz r25, 100(sp) |
lwz r26, 104(sp) |
lwz r27, 108(sp) |
lwz r28, 112(sp) |
lwz r29, 116(sp) |
lwz r30, 120(sp) |
lwz r31, 124(sp) |
lwz r3, 128(sp) |
mtspr srr1, r3 |
lwz r12, 128(sp) |
mtcr r12 |
lwz r3, 124(sp) |
mtspr srr0, r3 |
lwz r12, 132(sp) |
mtsrr0 r12 |
lwz r0, 0(sp) |
lwz r2, 4(sp) |
lwz r3, 8(sp) |
lwz r4, 12(sp) |
lwz r5, 16(sp) |
lwz r6, 20(sp) |
lwz r7, 24(sp) |
lwz r8, 28(sp) |
lwz r9, 32(sp) |
lwz r10, 36(sp) |
lwz r11, 40(sp) |
lwz r12, 44(sp) |
lwz r13, 48(sp) |
lwz r14, 52(sp) |
lwz r15, 56(sp) |
lwz r16, 60(sp) |
lwz r17, 64(sp) |
lwz r18, 68(sp) |
lwz r19, 72(sp) |
lwz r20, 76(sp) |
lwz r21, 80(sp) |
lwz r22, 84(sp) |
lwz r23, 88(sp) |
lwz r24, 92(sp) |
lwz r25, 96(sp) |
lwz r26, 100(sp) |
lwz r27, 104(sp) |
lwz r28, 108(sp) |
lwz r29, 112(sp) |
lwz r30, 116(sp) |
lwz r31, 120(sp) |
lwz r12, 136(sp) |
mtsrr1 r12 |
mfspr sp, sprg1 |
lwz r12, 140(sp) |
mtlr r12 |
lwz r12, 144(sp) |
mtctr r12 |
lwz r12, 148(sp) |
mtxer r12 |
lwz r12, 152(sp) |
lwz sp, 156(sp) |
rfi |
iret_syscall: |
# reset decrementer |
li r31, 1000 |
mtdec r31 |
# disable interrupts |
mfmsr r31 |
rlwinm r31, r31, 0, 17, 15 |
mtmsr r31 |
lwz r0, 8(sp) |
lwz r2, 12(sp) |
lwz r4, 20(sp) |
lwz r5, 24(sp) |
lwz r6, 28(sp) |
lwz r7, 32(sp) |
lwz r8, 36(sp) |
lwz r9, 40(sp) |
lwz r10, 44(sp) |
lwz r11, 48(sp) |
lwz r13, 52(sp) |
lwz r14, 56(sp) |
lwz r15, 60(sp) |
lwz r16, 64(sp) |
lwz r17, 68(sp) |
lwz r18, 72(sp) |
lwz r19, 76(sp) |
lwz r20, 80(sp) |
lwz r21, 84(sp) |
lwz r22, 88(sp) |
lwz r23, 92(sp) |
lwz r24, 96(sp) |
lwz r25, 100(sp) |
lwz r26, 104(sp) |
lwz r27, 108(sp) |
lwz r28, 112(sp) |
lwz r29, 116(sp) |
lwz r30, 120(sp) |
lwz r31, 124(sp) |
lwz r12, 128(sp) |
mtcr r12 |
lwz r12, 132(sp) |
mtsrr0 r12 |
lwz r12, 136(sp) |
mtsrr1 r12 |
lwz r12, 140(sp) |
mtlr r12 |
lwz r12, 144(sp) |
mtctr r12 |
lwz r12, 148(sp) |
mtxer r12 |
lwz r12, 152(sp) |
lwz sp, 156(sp) |
rfi |
memsetb: |
rlwimi r5, r5, 8, 16, 23 |
rlwimi r5, r5, 16, 0, 15 |
133,6 → 242,9 |
blr |
memcpy: |
memcpy_from_uspace: |
memcpy_to_uspace: |
srwi. r7, r5, 3 |
addi r6, r3, -4 |
addi r4, r4, -4 |
193,3 → 305,7 |
beq 2b |
mtctr r7 |
b 1b |
memcpy_from_uspace_failover_address: |
memcpy_to_uspace_failover_address: |
b memcpy_from_uspace_failover_address |
/kernel/trunk/arch/ppc64/src/boot/boot.S |
---|
34,19 → 34,22 |
.global kernel_image_start |
kernel_image_start: |
# load temporary stack |
# load temporal kernel stack |
lis sp, end_stack@ha |
addi sp, sp, end_stack@l |
lis sp, kernel_stack@ha |
addi sp, sp, kernel_stack@l |
# set kernel stack for interrupt handling |
mr r31, sp |
subis r31, r31, 0x8000 |
mtsprg0 r31 |
# r3 contains physical address of bootinfo_t |
# r4 contains size of bootinfo_t |
lis r31, 0x80000000@ha |
addi r31, r31, 0x80000000@l |
addis r3, r3, 0x8000 |
add r3, r3, r31 |
lis r31, bootinfo@ha |
addi r31, r31, bootinfo@l # r31 = bootinfo |
67,9 → 70,12 |
bootinfo_end: |
bl arch_pre_main |
b main_bsp |
.section K_DATA_START, "aw", @progbits |
.align 12 |
kernel_stack_bottom: |
.space TEMP_STACK_SIZE |
end_stack: |
kernel_stack: |
/kernel/trunk/arch/ppc64/src/proc/scheduler.c |
---|
27,13 → 27,11 |
*/ |
#include <arch/mm/page.h> |
#include <arch/boot/boot.h> |
#include <proc/scheduler.h> |
#include <proc/thread.h> |
#include <arch.h> |
__address supervisor_sp; |
__address supervisor_sp_physical; |
/** Perform ppc64 specific tasks needed before the new task is run. */ |
void before_task_runs_arch(void) |
{ |
42,8 → 40,13 |
/** Perform ppc64 specific tasks needed before the new thread is scheduled. */ |
void before_thread_runs_arch(void) |
{ |
supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA]; |
supervisor_sp_physical = KA2PA(supervisor_sp_physical); |
pht_init(); |
tlb_invalidate_all(); |
asm volatile ( |
"mtsprg0 %0\n" |
: |
: "r" (KA2PA(&THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA])) |
); |
} |
void after_thread_ran_arch(void) |
/kernel/trunk/arch/ppc64/src/mm/tlb.c |
---|
0,0 → 1,77 |
/* |
* Copyright (C) 2006 Martin Decky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <mm/tlb.h> |
/** Initialize Page Hash Table. |
* |
* Setup the Page Hash Table with no entries. |
* |
*/ |
void tlb_arch_init(void) |
{ |
tlb_invalidate_all(); |
} |
void tlb_invalidate_all(void) |
{ |
asm volatile ( |
"tlbia\n" |
"tlbsync\n" |
); |
} |
/** Invalidate all entries in TLB that belong to specified address space. |
* |
* @param asid This parameter is ignored as the architecture doesn't support it. |
*/ |
void tlb_invalidate_asid(asid_t asid) |
{ |
tlb_invalidate_all(); |
} |
/** Invalidate TLB entries for specified page range belonging to specified address space. |
* |
* @param asid This parameter is ignored as the architecture doesn't support it. |
* @param page Address of the first page whose entry is to be invalidated. |
* @param cnt Number of entries to invalidate. |
*/ |
void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt) |
{ |
tlb_invalidate_all(); |
} |
/** Print contents of Page Hash Table. */ |
void tlb_print(void) |
{ |
} |
/kernel/trunk/arch/ppc64/src/mm/memory_init.c |
---|
43,5 → 43,5 |
count_t i; |
for (i = 0; i < bootinfo.memmap.count; i++) |
printf("base: %p size: %#x\n", bootinfo.memmap.zones[i].start, bootinfo.memmap.zones[i].size); |
printf("base: %#x size: %#x\n", bootinfo.memmap.zones[i].start, bootinfo.memmap.zones[i].size); |
} |
/kernel/trunk/arch/ppc64/src/mm/page.c |
---|
29,11 → 29,268 |
#include <arch/mm/page.h> |
#include <genarch/mm/page_pt.h> |
#include <arch/mm/frame.h> |
#include <arch/asm.h> |
#include <mm/frame.h> |
#include <mm/page.h> |
#include <mm/as.h> |
#include <arch.h> |
#include <arch/types.h> |
#include <arch/exception.h> |
#include <align.h> |
#include <config.h> |
#include <print.h> |
#include <symtab.h> |
static phte_t *phte; |
/** Try to find PTE for faulting address |
* |
* Try to find PTE for faulting address. |
* The as->lock must be held on entry to this function |
* if lock is true. |
* |
* @param as Address space. |
* @param lock Lock/unlock the address space. |
* @param badvaddr Faulting virtual address. |
* @param istate Pointer to interrupted state. |
* @param pfrc Pointer to variable where as_page_fault() return code will be stored. |
* @return PTE on success, NULL otherwise. |
* |
*/ |
static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, istate_t *istate, int *pfcr) |
{ |
/* |
* Check if the mapping exists in page tables. |
*/ |
pte_t *pte = page_mapping_find(as, badvaddr); |
if ((pte) && (pte->p)) { |
/* |
* Mapping found in page tables. |
* Immediately succeed. |
*/ |
return pte; |
} else { |
int rc; |
/* |
* Mapping not found in page tables. |
* Resort to higher-level page fault handler. |
*/ |
page_table_unlock(as, lock); |
switch (rc = as_page_fault(badvaddr, istate)) { |
case AS_PF_OK: |
/* |
* The higher-level page fault handler succeeded, |
* The mapping ought to be in place. |
*/ |
page_table_lock(as, lock); |
pte = page_mapping_find(as, badvaddr); |
ASSERT((pte) && (pte->p)); |
return pte; |
case AS_PF_DEFER: |
page_table_lock(as, lock); |
*pfcr = rc; |
return NULL; |
case AS_PF_FAULT: |
page_table_lock(as, lock); |
printf("Page fault.\n"); |
*pfcr = rc; |
return NULL; |
default: |
panic("unexpected rc (%d)\n", rc); |
} |
} |
} |
static void pht_refill_fail(__address badvaddr, istate_t *istate) |
{ |
char *symbol = ""; |
char *sym2 = ""; |
char *s = get_symtab_entry(istate->pc); |
if (s) |
symbol = s; |
s = get_symtab_entry(istate->lr); |
if (s) |
sym2 = s; |
panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2); |
} |
static void pht_insert(const __address vaddr, const pfn_t pfn) |
{ |
__u32 page = (vaddr >> 12) & 0xffff; |
__u32 api = (vaddr >> 22) & 0x3f; |
__u32 vsid; |
asm volatile ( |
"mfsrin %0, %1\n" |
: "=r" (vsid) |
: "r" (vaddr) |
); |
/* Primary hash (xor) */ |
__u32 h = 0; |
__u32 hash = vsid ^ page; |
__u32 base = (hash & 0x3ff) << 3; |
__u32 i; |
bool found = false; |
/* Find unused or colliding |
PTE in PTEG */ |
for (i = 0; i < 8; i++) { |
if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) && (phte[base + i].api == api))) { |
found = true; |
break; |
} |
} |
if (!found) { |
/* Secondary hash (not) */ |
__u32 base2 = (~hash & 0x3ff) << 3; |
/* Find unused or colliding |
PTE in PTEG */ |
for (i = 0; i < 8; i++) { |
if ((!phte[base2 + i].v) || ((phte[base2 + i].vsid == vsid) && (phte[base2 + i].api == api))) { |
found = true; |
base = base2; |
h = 1; |
break; |
} |
} |
if (!found) { |
// TODO: A/C precedence groups |
i = page % 8; |
} |
} |
phte[base + i].v = 1; |
phte[base + i].vsid = vsid; |
phte[base + i].h = h; |
phte[base + i].api = api; |
phte[base + i].rpn = pfn; |
phte[base + i].r = 0; |
phte[base + i].c = 0; |
phte[base + i].pp = 2; // FIXME |
} |
/** Process Instruction/Data Storage Interrupt |
* |
* @param data True if Data Storage Interrupt. |
* @param istate Interrupted register context. |
* |
*/ |
void pht_refill(bool data, istate_t *istate) |
{ |
__address badvaddr; |
pte_t *pte; |
int pfcr; |
as_t *as; |
bool lock; |
if (AS == NULL) { |
as = AS_KERNEL; |
lock = false; |
} else { |
as = AS; |
lock = true; |
} |
if (data) { |
asm volatile ( |
"mfdar %0\n" |
: "=r" (badvaddr) |
); |
} else |
badvaddr = istate->pc; |
page_table_lock(as, lock); |
pte = find_mapping_and_check(as, lock, badvaddr, istate, &pfcr); |
if (!pte) { |
switch (pfcr) { |
case AS_PF_FAULT: |
goto fail; |
break; |
case AS_PF_DEFER: |
/* |
* The page fault came during copy_from_uspace() |
* or copy_to_uspace(). |
*/ |
page_table_unlock(as, lock); |
return; |
default: |
panic("Unexpected pfrc (%d)\n", pfcr); |
} |
} |
pte->a = 1; /* Record access to PTE */ |
pht_insert(badvaddr, pte->pfn); |
page_table_unlock(as, lock); |
return; |
fail: |
page_table_unlock(as, lock); |
pht_refill_fail(badvaddr, istate); |
} |
void pht_init(void) |
{ |
memsetb((__address) phte, 1 << PHT_BITS, 0); |
} |
void page_arch_init(void) |
{ |
if (config.cpu_active == 1) { |
page_mapping_operations = &pt_mapping_operations; |
__address cur; |
int flags; |
/* Frames below 128 MB are mapped using BAT, |
map rest of the physical memory */ |
for (cur = 128 << 20; cur < last_frame; cur += FRAME_SIZE) { |
flags = PAGE_CACHEABLE; |
if ((PA2KA(cur) >= config.base) && (PA2KA(cur) < config.base + config.kernel_size)) |
flags |= PAGE_GLOBAL; |
page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); |
} |
/* Allocate page hash table */ |
phte_t *physical_phte = (phte_t *) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA | FRAME_PANIC)); |
phte = (phte_t *) PA2KA((__address) physical_phte); |
ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0); |
pht_init(); |
asm volatile ( |
"mtsdr1 %0\n" |
: |
: "r" ((__address) physical_phte) |
); |
} |
} |
__address hw_map(__address physaddr, size_t size) |
{ |
if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) |
panic("Unable to map physical memory %p (%d bytes)", physaddr, size) |
__address virtaddr = PA2KA(last_frame); |
pfn_t i; |
for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) |
page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE); |
last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE); |
return virtaddr; |
} |
/kernel/trunk/arch/ppc64/src/dummy.s |
---|
28,29 → 28,9 |
.text |
.global cpu_halt |
.global asm_delay_loop |
.global userspace |
.global sys_tls_set |
.global tlb_invalidate_all |
.global tlb_invalidate_asid |
.global tlb_invalidate_pages |
cpu_halt: |
b cpu_halt |
tlb_invalidate_all: |
b tlb_invalidate_all |
tlb_invalidate_asid: |
b tlb_invalidate_asid |
tlb_invalidate_pages: |
b tlb_invalidate_pages |
userspace: |
b userspace |
sys_tls_set: |
b sys_tls_set |
/kernel/trunk/arch/ppc64/src/interrupt.c |
---|
31,7 → 31,7 |
#include <arch/types.h> |
#include <arch.h> |
#include <time/clock.h> |
#include <print.h> |
#include <ipc/sysipc.h> |
void start_decrementer(void) |
38,7 → 38,8 |
{ |
asm volatile ( |
"mtdec %0\n" |
:: "r" (1000) |
: |
: "r" (1000) |
); |
} |
55,3 → 56,11 |
{ |
exc_register(VECTOR_DECREMENTER, "timer", exception_decrementer); |
} |
/* Reregister irq to be IPC-ready */ |
void irq_ipc_bind_arch(__native irq) |
{ |
panic("not implemented\n"); |
/* TODO */ |
} |
/kernel/trunk/arch/ppc64/src/ppc64.c |
---|
28,13 → 28,27 |
#include <arch.h> |
#include <arch/boot/boot.h> |
#include <arch/console.h> |
#include <arch/mm/memory_init.h> |
#include <arch/interrupt.h> |
#include <mm/frame.h> |
#include <genarch/fb/fb.h> |
#include <userspace.h> |
#include <proc/uarg.h> |
bootinfo_t bootinfo; |
void arch_pre_main(void) |
{ |
/* Setup usermode */ |
init.cnt = bootinfo.taskmap.count; |
__u32 i; |
for (i = 0; i < bootinfo.taskmap.count; i++) { |
init.tasks[i].addr = PA2KA(bootinfo.taskmap.tasks[i].addr); |
init.tasks[i].size = bootinfo.taskmap.tasks[i].size; |
} |
} |
void arch_pre_mm_init(void) |
{ |
/* Initialize dispatch table */ |
42,13 → 56,13 |
/* Start decrementer */ |
start_decrementer(); |
ppc64_console_init(); |
} |
void arch_post_mm_init(void) |
{ |
if (config.cpu_active == 1) { |
fb_init(bootinfo.screen.addr, bootinfo.screen.width, bootinfo.screen.height, bootinfo.screen.bpp, bootinfo.screen.scanline); |
/* Merge all zones to 1 big zone */ |
zone_merge_all(); |
} |
67,3 → 81,11 |
{ |
} |
void userspace(uspace_arg_t *kernel_uarg) |
{ |
userspace_asm((__address) kernel_uarg->uspace_uarg, (__address) kernel_uarg->uspace_stack + THREAD_STACK_SIZE - SP_DELTA, (__address) kernel_uarg->uspace_entry); |
/* Unreachable */ |
for (;;) |
; |
} |