/kernel/trunk/arch/mips32/src/exception.c |
---|
62,52 → 62,52 |
"Virtual Coherency - data", |
}; |
static void print_regdump(struct exception_regdump *pstate) |
static void print_regdump(istate_t *istate) |
{ |
char *pcsymbol = ""; |
char *rasymbol = ""; |
char *s = get_symtab_entry(pstate->epc); |
char *s = get_symtab_entry(istate->epc); |
if (s) |
pcsymbol = s; |
s = get_symtab_entry(pstate->ra); |
s = get_symtab_entry(istate->ra); |
if (s) |
rasymbol = s; |
printf("PC: %X(%s) RA: %X(%s), SP(%P)\n",pstate->epc,pcsymbol, |
pstate->ra,rasymbol, pstate->sp); |
printf("PC: %X(%s) RA: %X(%s), SP(%P)\n",istate->epc,pcsymbol, |
istate->ra,rasymbol, istate->sp); |
} |
static void unhandled_exception(int n, struct exception_regdump *pstate) |
static void unhandled_exception(int n, istate_t *istate) |
{ |
print_regdump(pstate); |
print_regdump(istate); |
panic("unhandled exception %s\n", exctable[n]); |
} |
static void breakpoint_exception(int n, struct exception_regdump *pstate) |
static void breakpoint_exception(int n, istate_t *istate) |
{ |
#ifdef CONFIG_DEBUG |
debugger_bpoint(pstate); |
debugger_bpoint(istate); |
#else |
/* it is necessary to not re-execute BREAK instruction after |
returning from Exception handler |
(see page 138 in R4000 Manual for more information) */ |
pstate->epc += 4; |
istate->epc += 4; |
#endif |
} |
static void tlbmod_exception(int n, struct exception_regdump *pstate) |
static void tlbmod_exception(int n, istate_t *istate) |
{ |
tlb_modified(pstate); |
tlb_modified(istate); |
} |
static void tlbinv_exception(int n, struct exception_regdump *pstate) |
static void tlbinv_exception(int n, istate_t *istate) |
{ |
tlb_invalid(pstate); |
tlb_invalid(istate); |
} |
#ifdef CONFIG_FPU_LAZY |
static void cpuns_exception(int n, struct exception_regdump *pstate) |
static void cpuns_exception(int n, istate_t *istate) |
{ |
if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id) |
scheduler_fpu_lazy_request(); |
116,7 → 116,7 |
} |
#endif |
static void interrupt_exception(int n, struct exception_regdump *pstate) |
static void interrupt_exception(int n, istate_t *istate) |
{ |
__u32 cause; |
int i; |
126,26 → 126,25 |
for (i = 0; i < 8; i++) |
if (cause & (1 << i)) |
exc_dispatch(i+INT_OFFSET, pstate); |
exc_dispatch(i+INT_OFFSET, istate); |
} |
#include <debug.h> |
/** Handle syscall userspace call */ |
static void syscall_exception(int n, struct exception_regdump *pstate) |
static void syscall_exception(int n, istate_t *istate) |
{ |
interrupts_enable(); |
if (pstate->a3 < SYSCALL_END) |
pstate->v0 = syscall_table[pstate->a3](pstate->a0, |
pstate->a1, |
pstate->a2); |
if (istate->a3 < SYSCALL_END) |
istate->v0 = syscall_table[istate->a3](istate->a0, |
istate->a1, |
istate->a2); |
else |
panic("Undefined syscall %d", pstate->a3); |
panic("Undefined syscall %d", istate->a3); |
istate->epc += 4; |
interrupts_disable(); |
pstate->epc += 4; |
} |
void exception(struct exception_regdump *pstate) |
void exception(istate_t *istate) |
{ |
int cause; |
int excno; |
163,26 → 162,26 |
cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit | |
cp0_status_um_bit)); |
/* Save pstate so that the threads can access it */ |
/* If THREAD->pstate is set, this is nested exception, |
/* Save istate so that the threads can access it */ |
/* If THREAD->istate is set, this is nested exception, |
* do not rewrite it |
*/ |
if (THREAD && !THREAD->pstate) |
THREAD->pstate = pstate; |
if (THREAD && !THREAD->istate) |
THREAD->istate = istate; |
cause = cp0_cause_read(); |
excno = cp0_cause_excno(cause); |
/* Dispatch exception */ |
exc_dispatch(excno, pstate); |
exc_dispatch(excno, istate); |
/* Set to NULL, so that we can still support nested |
* exceptions |
* TODO: We should probably set EXL bit before this command, |
* nesting. On the other hand, if some exception occurs between |
* here and ERET, it won't set anything on the pstate anyway. |
* here and ERET, it won't set anything on the istate anyway. |
*/ |
if (THREAD) |
THREAD->pstate = NULL; |
THREAD->istate = NULL; |
} |
void exception_init(void) |
/kernel/trunk/arch/mips32/src/fpu_context.c |
---|
36,8 → 36,8 |
{ |
#ifdef ARCH_HAS_FPU |
cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit); |
if (THREAD && THREAD->pstate) |
THREAD->pstate->status &= ~cp0_status_fpu_bit; |
if (THREAD && THREAD->istate) |
THREAD->istate->status &= ~cp0_status_fpu_bit; |
#endif |
} |
45,8 → 45,8 |
{ |
#ifdef ARCH_HAS_FPU |
cp0_status_write(cp0_status_read() | cp0_status_fpu_bit); |
if (THREAD && THREAD->pstate) |
THREAD->pstate->status |= cp0_status_fpu_bit; |
if (THREAD && THREAD->istate) |
THREAD->istate->status |= cp0_status_fpu_bit; |
#endif |
} |
/kernel/trunk/arch/mips32/src/debugger.c |
---|
179,7 → 179,7 |
cur->flags = 0; |
} else { /* We are add extended */ |
cur->flags = BKPOINT_FUNCCALL; |
cur->bkfunc = (void (*)(void *, struct exception_regdump *)) argv[1].intval; |
cur->bkfunc = (void (*)(void *, istate_t *)) argv[1].intval; |
} |
if (is_jump(cur->instruction)) |
cur->flags |= BKPOINT_ONESHOT; |
289,10 → 289,10 |
* If breakpoint not found in breakpoint table, call kconsole and start |
* next instruction. |
*/ |
void debugger_bpoint(struct exception_regdump *pstate) |
void debugger_bpoint(istate_t *istate) |
{ |
bpinfo_t *cur = NULL; |
__address fireaddr = pstate->epc; |
__address fireaddr = istate->epc; |
int i; |
/* test branch delay slot */ |
329,7 → 329,7 |
if (!(cur->flags & BKPOINT_FUNCCALL)) |
printf("***Breakpoint %d: 0x%p in %s.\n", i, |
fireaddr, get_symtab_entry(pstate->epc)); |
fireaddr, get_symtab_entry(istate->epc)); |
/* Return first instruction back */ |
((__u32 *)cur->address)[0] = cur->instruction; |
344,7 → 344,7 |
printf("***Breakpoint 0x%p in %s.\n", fireaddr, |
get_symtab_entry(fireaddr)); |
/* Move on to next instruction */ |
pstate->epc += 4; |
istate->epc += 4; |
} |
if (cur) |
cur->counter++; |
351,7 → 351,7 |
if (cur && (cur->flags & BKPOINT_FUNCCALL)) { |
/* Allow zero bkfunc, just for counting */ |
if (cur->bkfunc) |
cur->bkfunc(cur, pstate); |
cur->bkfunc(cur, istate); |
} else { |
printf("***Type 'exit' to exit kconsole.\n"); |
/* This disables all other processors - we are not SMP, |
/kernel/trunk/arch/mips32/src/mm/tlb.c |
---|
39,9 → 39,9 |
#include <print.h> |
#include <debug.h> |
static void tlb_refill_fail(struct exception_regdump *pstate); |
static void tlb_invalid_fail(struct exception_regdump *pstate); |
static void tlb_modified_fail(struct exception_regdump *pstate); |
static void tlb_refill_fail(istate_t *istate); |
static void tlb_invalid_fail(istate_t *istate); |
static void tlb_modified_fail(istate_t *istate); |
static pte_t *find_mapping_and_check(__address badvaddr); |
81,9 → 81,9 |
* |
* Process TLB Refill Exception. |
* |
* @param pstate Interrupted register context. |
* @param istate Interrupted register context. |
*/ |
void tlb_refill(struct exception_regdump *pstate) |
void tlb_refill(istate_t *istate) |
{ |
entry_lo_t lo; |
entry_hi_t hi; |
126,7 → 126,7 |
fail: |
spinlock_unlock(&AS->lock); |
tlb_refill_fail(pstate); |
tlb_refill_fail(istate); |
} |
/** Process TLB Invalid Exception |
133,9 → 133,9 |
* |
* Process TLB Invalid Exception. |
* |
* @param pstate Interrupted register context. |
* @param istate Interrupted register context. |
*/ |
void tlb_invalid(struct exception_regdump *pstate) |
void tlb_invalid(istate_t *istate) |
{ |
tlb_index_t index; |
__address badvaddr; |
195,7 → 195,7 |
fail: |
spinlock_unlock(&AS->lock); |
tlb_invalid_fail(pstate); |
tlb_invalid_fail(istate); |
} |
/** Process TLB Modified Exception |
202,9 → 202,9 |
* |
* Process TLB Modified Exception. |
* |
* @param pstate Interrupted register context. |
* @param istate Interrupted register context. |
*/ |
void tlb_modified(struct exception_regdump *pstate) |
void tlb_modified(istate_t *istate) |
{ |
tlb_index_t index; |
__address badvaddr; |
271,42 → 271,42 |
fail: |
spinlock_unlock(&AS->lock); |
tlb_modified_fail(pstate); |
tlb_modified_fail(istate); |
} |
void tlb_refill_fail(struct exception_regdump *pstate) |
void tlb_refill_fail(istate_t *istate) |
{ |
char *symbol = ""; |
char *sym2 = ""; |
char *s = get_symtab_entry(pstate->epc); |
char *s = get_symtab_entry(istate->epc); |
if (s) |
symbol = s; |
s = get_symtab_entry(pstate->ra); |
s = get_symtab_entry(istate->ra); |
if (s) |
sym2 = s; |
panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), pstate->epc, symbol, sym2); |
panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), istate->epc, symbol, sym2); |
} |
void tlb_invalid_fail(struct exception_regdump *pstate) |
void tlb_invalid_fail(istate_t *istate) |
{ |
char *symbol = ""; |
char *s = get_symtab_entry(pstate->epc); |
char *s = get_symtab_entry(istate->epc); |
if (s) |
symbol = s; |
panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol); |
panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), istate->epc, symbol); |
} |
void tlb_modified_fail(struct exception_regdump *pstate) |
void tlb_modified_fail(istate_t *istate) |
{ |
char *symbol = ""; |
char *s = get_symtab_entry(pstate->epc); |
char *s = get_symtab_entry(istate->epc); |
if (s) |
symbol = s; |
panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol); |
panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), istate->epc, symbol); |
} |
/** Try to find PTE for faulting address |
/kernel/trunk/arch/mips32/src/interrupt.c |
---|
74,18 → 74,18 |
return cp0_status_read(); |
} |
static void timer_exception(int n, void *stack) |
static void timer_exception(int n, istate_t *istate) |
{ |
cp0_compare_write(cp0_count_read() + cp0_compare_value); |
clock(); |
} |
static void swint0(int n, void *stack) |
static void swint0(int n, istate_t *istate) |
{ |
cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */ |
} |
static void swint1(int n, void *stack) |
static void swint1(int n, istate_t *istate) |
{ |
cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */ |
} |
/kernel/trunk/arch/mips32/src/drivers/serial.c |
---|
112,10 → 112,10 |
iroutine old_timer; |
/** Do polling on timer interrupt */ |
static void timer_replace(int n, void *stack) |
static void timer_replace(int n, istate_t *istate) |
{ |
old_timer(n, stack); |
serial_interrupt(n, stack); |
old_timer(n, istate); |
serial_interrupt(n, istate); |
} |
void serial_console(void) |
/kernel/trunk/arch/mips32/src/drivers/arc.c |
---|
349,10 → 349,10 |
iroutine old_timer; |
/** Do polling on timer interrupt */ |
static void timer_replace(int n, void *stack) |
static void timer_replace(int n, istate_t *istate) |
{ |
arc_keyboard_poll(); |
old_timer(n, stack); |
old_timer(n, istate); |
arc_keyboard_poll(); |
} |
/kernel/trunk/arch/mips32/src/drivers/msim.c |
---|
83,7 → 83,7 |
} |
/** Process keyboard interrupt. */ |
static void msim_interrupt(int n, void *stack) |
static void msim_interrupt(int n, istate_t *istate) |
{ |
char ch = 0; |