429,14 → 429,10 |
void alternate_instruction_tlb_fault(__u64 vector, istate_t *istate) |
{ |
region_register rr; |
rid_t rid; |
__address va; |
pte_t *t; |
|
va = istate->cr_ifa; /* faulting address */ |
rr.word = rr_read(VA2VRN(va)); |
rid = rr.map.rid; |
|
page_table_lock(AS, true); |
t = page_mapping_find(AS, va); |
if (t) { |
451,8 → 447,8 |
* Forward the page fault to address space page fault handler. |
*/ |
page_table_unlock(AS, true); |
if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) { |
panic("%s: va=%p, rid=%d, iip=%p\n", __FUNCTION__, va, rid, istate->cr_iip); |
if (as_page_fault(va, istate) == AS_PF_FAULT) { |
panic("%s: va=%p, rid=%d, iip=%p\n", __FUNCTION__, istate->cr_ifa, rr.map.rid, istate->cr_iip); |
} |
} |
} |
497,7 → 493,7 |
* Forward the page fault to address space page fault handler. |
*/ |
page_table_unlock(AS, true); |
if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) { |
if (as_page_fault(va, istate) == AS_PF_FAULT) { |
panic("%s: va=%p, rid=%d, iip=%p\n", __FUNCTION__, va, rid, istate->cr_iip); |
} |
} |
522,19 → 518,12 |
*/ |
void data_dirty_bit_fault(__u64 vector, istate_t *istate) |
{ |
region_register rr; |
rid_t rid; |
__address va; |
pte_t *t; |
|
va = istate->cr_ifa; /* faulting address */ |
rr.word = rr_read(VA2VRN(va)); |
rid = rr.map.rid; |
|
page_table_lock(AS, true); |
t = page_mapping_find(AS, va); |
t = page_mapping_find(AS, istate->cr_ifa); |
ASSERT(t && t->p); |
if (t && t->p && t->w) { |
if (t && t->p) { |
/* |
* Update the Dirty bit in page tables and reinsert |
* the mapping into DTC. |
541,12 → 530,6 |
*/ |
t->d = true; |
dtc_pte_copy(t); |
} else { |
if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) { |
panic("%s: va=%p, rid=%d, iip=%p\n", __FUNCTION__, va, rid, istate->cr_iip); |
t->d = true; |
dtc_pte_copy(t); |
} |
} |
page_table_unlock(AS, true); |
} |
558,19 → 541,12 |
*/ |
void instruction_access_bit_fault(__u64 vector, istate_t *istate) |
{ |
region_register rr; |
rid_t rid; |
__address va; |
pte_t *t; |
pte_t *t; |
|
va = istate->cr_ifa; /* faulting address */ |
rr.word = rr_read(VA2VRN(va)); |
rid = rr.map.rid; |
|
page_table_lock(AS, true); |
t = page_mapping_find(AS, va); |
t = page_mapping_find(AS, istate->cr_ifa); |
ASSERT(t && t->p); |
if (t && t->p && t->x) { |
if (t && t->p) { |
/* |
* Update the Accessed bit in page tables and reinsert |
* the mapping into ITC. |
577,12 → 553,6 |
*/ |
t->a = true; |
itc_pte_copy(t); |
} else { |
if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) { |
panic("%s: va=%p, rid=%d, iip=%p\n", __FUNCTION__, va, rid, istate->cr_iip); |
t->a = true; |
itc_pte_copy(t); |
} |
} |
page_table_unlock(AS, true); |
} |
594,17 → 564,10 |
*/ |
void data_access_bit_fault(__u64 vector, istate_t *istate) |
{ |
region_register rr; |
rid_t rid; |
__address va; |
pte_t *t; |
|
va = istate->cr_ifa; /* faulting address */ |
rr.word = rr_read(VA2VRN(va)); |
rid = rr.map.rid; |
|
page_table_lock(AS, true); |
t = page_mapping_find(AS, va); |
t = page_mapping_find(AS, istate->cr_ifa); |
ASSERT(t && t->p); |
if (t && t->p) { |
/* |
613,12 → 576,6 |
*/ |
t->a = true; |
dtc_pte_copy(t); |
} else { |
if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) { |
panic("%s: va=%p, rid=%d, iip=%p\n", __FUNCTION__, va, rid, istate->cr_iip); |
t->a = true; |
itc_pte_copy(t); |
} |
} |
page_table_unlock(AS, true); |
} |
631,14 → 588,10 |
void page_not_present(__u64 vector, istate_t *istate) |
{ |
region_register rr; |
rid_t rid; |
__address va; |
pte_t *t; |
|
va = istate->cr_ifa; /* faulting address */ |
rr.word = rr_read(VA2VRN(va)); |
rid = rr.map.rid; |
|
page_table_lock(AS, true); |
t = page_mapping_find(AS, va); |
ASSERT(t); |
655,8 → 608,8 |
page_table_unlock(AS, true); |
} else { |
page_table_unlock(AS, true); |
if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) { |
panic("%s: va=%p, rid=%d\n", __FUNCTION__, va, rid); |
if (as_page_fault(va, istate) == AS_PF_FAULT) { |
panic("%s: va=%p, rid=%d\n", __FUNCTION__, va, rr.map.rid); |
} |
} |
} |