/kernel/trunk/arch/ia32/src/smp/smp.c |
---|
61,7 → 61,7 |
void smp_init(void) |
{ |
uintptr_t l_apic_address, io_apic_address; |
__address l_apic_address, io_apic_address; |
if (acpi_madt) { |
acpi_madt_parse(); |
72,22 → 72,22 |
ops = &mps_config_operations; |
} |
l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
l_apic_address = (__address) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
if (!l_apic_address) |
panic("cannot allocate address for l_apic\n"); |
io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
io_apic_address = (__address) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
if (!io_apic_address) |
panic("cannot allocate address for io_apic\n"); |
if (config.cpu_count > 1) { |
page_mapping_insert(AS_KERNEL, l_apic_address, (uintptr_t) l_apic, |
page_mapping_insert(AS_KERNEL, l_apic_address, (__address) l_apic, |
PAGE_NOT_CACHEABLE); |
page_mapping_insert(AS_KERNEL, io_apic_address, (uintptr_t) io_apic, |
page_mapping_insert(AS_KERNEL, io_apic_address, (__address) io_apic, |
PAGE_NOT_CACHEABLE); |
l_apic = (uint32_t *) l_apic_address; |
io_apic = (uint32_t *) io_apic_address; |
l_apic = (__u32 *) l_apic_address; |
io_apic = (__u32 *) io_apic_address; |
} |
} |
114,8 → 114,8 |
/* |
* Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot() |
*/ |
*((uint16_t *) (PA2KA(0x467+0))) = ((uintptr_t) ap_boot) >> 4; /* segment */ |
*((uint16_t *) (PA2KA(0x467+2))) = 0; /* offset */ |
*((__u16 *) (PA2KA(0x467+0))) = ((__address) ap_boot) >> 4; /* segment */ |
*((__u16 *) (PA2KA(0x467+2))) = 0; /* offset */ |
/* |
* Save 0xa to address 0xf of the CMOS RAM. |
154,10 → 154,10 |
panic("couldn't allocate memory for GDT\n"); |
memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
memsetb((uintptr_t)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0); |
memsetb((__address)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0); |
protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor); |
protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new); |
gdtr.base = (uintptr_t) gdt_new; |
protected_ap_gdtr.base = KA2PA((__address) gdt_new); |
gdtr.base = (__address) gdt_new; |
if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) { |
/* |
/kernel/trunk/arch/ia32/src/smp/apic.c |
---|
67,10 → 67,10 |
* optimize the code too much and accesses to l_apic and io_apic, that must |
* always be 32-bit, would use byte oriented instructions. |
*/ |
volatile uint32_t *l_apic = (uint32_t *) 0xfee00000; |
volatile uint32_t *io_apic = (uint32_t *) 0xfec00000; |
volatile __u32 *l_apic = (__u32 *) 0xfee00000; |
volatile __u32 *io_apic = (__u32 *) 0xfec00000; |
uint32_t apic_id_mask = 0; |
__u32 apic_id_mask = 0; |
static int apic_poll_errors(void); |
218,7 → 218,7 |
* |
* @return 0 on failure, 1 on success. |
*/ |
int l_apic_broadcast_custom_ipi(uint8_t vector) |
int l_apic_broadcast_custom_ipi(__u8 vector) |
{ |
icr_t icr; |
248,7 → 248,7 |
* |
* @return 0 on failure, 1 on success. |
*/ |
int l_apic_send_init_ipi(uint8_t apicid) |
int l_apic_send_init_ipi(__u8 apicid) |
{ |
icr_t icr; |
int i; |
305,7 → 305,7 |
*/ |
for (i = 0; i<2; i++) { |
icr.lo = l_apic[ICRlo]; |
icr.vector = ((uintptr_t) ap_boot) / 4096; /* calculate the reset vector */ |
icr.vector = ((__address) ap_boot) / 4096; /* calculate the reset vector */ |
icr.delmod = DELMOD_STARTUP; |
icr.destmod = DESTMOD_PHYS; |
icr.level = LEVEL_ASSERT; |
331,7 → 331,7 |
lvt_tm_t tm; |
ldr_t ldr; |
dfr_t dfr; |
uint32_t t1, t2; |
__u32 t1, t2; |
/* Initialize LVT Error register. */ |
error.value = l_apic[LVT_Err]; |
455,7 → 455,7 |
* |
* @return Local APIC ID. |
*/ |
uint8_t l_apic_id(void) |
__u8 l_apic_id(void) |
{ |
l_apic_id_t idreg; |
469,7 → 469,7 |
* |
* @return Content of the addressed IO APIC register. |
*/ |
uint32_t io_apic_read(uint8_t address) |
__u32 io_apic_read(__u8 address) |
{ |
io_regsel_t regsel; |
484,7 → 484,7 |
* @param address IO APIC register address. |
* @param x Content to be written to the addressed IO APIC register. |
*/ |
void io_apic_write(uint8_t address, uint32_t x) |
void io_apic_write(__u8 address, __u32 x) |
{ |
io_regsel_t regsel; |
501,7 → 501,7 |
* @param v Interrupt vector to trigger. |
* @param flags Flags. |
*/ |
void io_apic_change_ioredtbl(int pin, int dest, uint8_t v, int flags) |
void io_apic_change_ioredtbl(int pin, int dest, __u8 v, int flags) |
{ |
io_redirection_reg_t reg; |
int dlvr = DELMOD_FIXED; |
527,7 → 527,7 |
* |
* @param irqmask Bitmask of IRQs to be masked (0 = do not mask, 1 = mask). |
*/ |
void io_apic_disable_irqs(uint16_t irqmask) |
void io_apic_disable_irqs(__u16 irqmask) |
{ |
io_redirection_reg_t reg; |
int i, pin; |
553,7 → 553,7 |
* |
* @param irqmask Bitmask of IRQs to be unmasked (0 = do not unmask, 1 = unmask). |
*/ |
void io_apic_enable_irqs(uint16_t irqmask) |
void io_apic_enable_irqs(__u16 irqmask) |
{ |
int i, pin; |
io_redirection_reg_t reg; |
/kernel/trunk/arch/ia32/src/smp/mps.c |
---|
55,11 → 55,11 |
#define FS_SIGNATURE 0x5f504d5f |
#define CT_SIGNATURE 0x504d4350 |
int mps_fs_check(uint8_t *base); |
int mps_fs_check(__u8 *base); |
int mps_ct_check(void); |
int configure_via_ct(void); |
int configure_via_default(uint8_t n); |
int configure_via_default(__u8 n); |
int ct_processor_entry(struct __processor_entry *pr); |
void ct_bus_entry(struct __bus_entry *bus); |
92,7 → 92,7 |
static count_t get_cpu_count(void); |
static bool is_cpu_enabled(index_t i); |
static bool is_bsp(index_t i); |
static uint8_t get_cpu_apic_id(index_t i); |
static __u8 get_cpu_apic_id(index_t i); |
static int mps_irq_to_pin(int irq); |
struct smp_config_operations mps_config_operations = { |
120,7 → 120,7 |
return processor_entries[i].cpu_flags & 0x2; |
} |
uint8_t get_cpu_apic_id(index_t i) |
__u8 get_cpu_apic_id(index_t i) |
{ |
ASSERT(i < processor_entry_cnt); |
return processor_entries[i].l_apic_id; |
130,10 → 130,10 |
/* |
* Used to check the integrity of the MP Floating Structure. |
*/ |
int mps_fs_check(uint8_t *base) |
int mps_fs_check(__u8 *base) |
{ |
int i; |
uint8_t sum; |
__u8 sum; |
for (i = 0, sum = 0; i < 16; i++) |
sum += base[i]; |
146,9 → 146,9 |
*/ |
int mps_ct_check(void) |
{ |
uint8_t *base = (uint8_t *) ct; |
uint8_t *ext = base + ct->base_table_length; |
uint8_t sum; |
__u8 *base = (__u8 *) ct; |
__u8 *ext = base + ct->base_table_length; |
__u8 sum; |
int i; |
/* count the checksum for the base table */ |
167,7 → 167,7 |
void mps_init(void) |
{ |
uint8_t *addr[2] = { NULL, (uint8_t *) PA2KA(0xf0000) }; |
__u8 *addr[2] = { NULL, (__u8 *) PA2KA(0xf0000) }; |
int i, j, length[2] = { 1024, 64*1024 }; |
178,10 → 178,10 |
* 2. search 64K starting at 0xf0000 |
*/ |
addr[0] = (uint8_t *) PA2KA(ebda ? ebda : 639 * 1024); |
addr[0] = (__u8 *) PA2KA(ebda ? ebda : 639 * 1024); |
for (i = 0; i < 2; i++) { |
for (j = 0; j < length[i]; j += 16) { |
if (*((uint32_t *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) { |
if (*((__u32 *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) { |
fs = (struct mps_fs *) &addr[i][j]; |
goto fs_found; |
} |
199,7 → 199,7 |
return; |
} |
ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table); |
ct = (struct mps_ct *)PA2KA((__address)fs->configuration_table); |
config.cpu_count = configure_via_ct(); |
} |
else |
210,7 → 210,7 |
int configure_via_ct(void) |
{ |
uint8_t *cur; |
__u8 *cur; |
int i, cnt; |
if (ct->signature != CT_SIGNATURE) { |
226,7 → 226,7 |
return 1; |
} |
l_apic = (uint32_t *)(uintptr_t)ct->l_apic; |
l_apic = (__u32 *)(__address)ct->l_apic; |
cnt = 0; |
cur = &ct->base_table[0]; |
289,7 → 289,7 |
return cnt; |
} |
int configure_via_default(uint8_t n) |
int configure_via_default(__u8 n) |
{ |
/* |
* Not yet implemented. |
336,7 → 336,7 |
return; |
} |
io_apic = (uint32_t *)(uintptr_t)ioa->io_apic; |
io_apic = (__u32 *)(__address)ioa->io_apic; |
} |
//#define MPSCT_VERBOSE |
404,8 → 404,8 |
void ct_extended_entries(void) |
{ |
uint8_t *ext = (uint8_t *) ct + ct->base_table_length; |
uint8_t *cur; |
__u8 *ext = (__u8 *) ct + ct->base_table_length; |
__u8 *cur; |
for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) { |
switch (cur[CT_EXT_ENTRY_TYPE]) { |
/kernel/trunk/arch/ia32/src/smp/ipi.c |
---|
39,7 → 39,7 |
void ipi_broadcast_arch(int ipi) |
{ |
(void) l_apic_broadcast_custom_ipi((uint8_t) ipi); |
(void) l_apic_broadcast_custom_ipi((__u8) ipi); |
} |
#endif /* CONFIG_SMP */ |
/kernel/trunk/arch/ia32/src/smp/ap.S |
---|
69,7 → 69,7 |
movw %ax, %ds |
movw %ax, %es |
movw %ax, %ss |
movl $KA2PA(ctx), %eax # KA2PA((uintptr_t) &ctx) |
movl $KA2PA(ctx), %eax # KA2PA((__address) &ctx) |
movl (%eax), %esp |
subl $0x80000000, %esp # KA2PA(ctx.sp) |