32,6 → 32,7 |
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#include <config.h> |
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#include <proc/thread.h> |
#include <arch/ega.h> |
#include <genarch/i8042/i8042.h> |
#include <arch/i8254.h> |
47,7 → 48,9 |
#include <interrupt.h> |
#include <arch/syscall.h> |
#include <arch/debugger.h> |
#include <syscall/syscall.h> |
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/** Disable I/O on non-privileged levels |
* |
* Clean IOPL(12,13) and NT(14) flags in EFLAGS register |
159,3 → 162,18 |
i8254_calibrate_delay_loop(); |
i8254_normal_operation(); |
} |
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/** Set Thread-local-storeage pointer |
* |
* TLS pointer is set in FS register. Unfortunately the 64-bit |
* part can be set only in CPL0 mode. |
* |
* The specs says, that on %fs:0 there is stored contents of %fs register, |
* we need not to go to CPL0 to read it. |
*/ |
__native sys_tls_set(__native addr) |
{ |
THREAD->tls = addr; |
write_msr(AMD_MSR_FS, addr); |
return 0; |
} |