30,6 → 30,8 |
#define __amd64_ATOMIC_H__ |
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#include <arch/types.h> |
#include <arch/barrier.h> |
#include <preemption.h> |
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typedef struct { volatile __u64 count; } atomic_t; |
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101,6 → 103,31 |
} |
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extern void spinlock_arch(volatile int *val); |
/** AMD64 specific fast spinlock */ |
static inline void atomic_lock_arch(atomic_t *val) |
{ |
__u64 tmp; |
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preemption_disable(); |
__asm__ volatile ( |
"0:;" |
#ifdef CONFIG_HT |
"pause;" /* Pentium 4's HT love this instruction */ |
#endif |
"mov %0, %1;" |
"testq %1, %1;" |
"jnz 0b;" /* Leightweight looping on locked spinlock */ |
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"incq %1;" /* now use the atomic operation */ |
"xchgq %0, %1;" |
"testq %1, %1;" |
"jnz 0b;" |
: "=m"(val->count),"=r"(tmp) |
); |
/* |
* Prevent critical section code from bleeding out this way up. |
*/ |
CS_ENTER_BARRIER(); |
} |
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#endif |