| /kernel/trunk/arch/amd64/include/debugger.h |
|---|
| File deleted |
| /kernel/trunk/arch/amd64/include/interrupt.h |
|---|
| 53,7 → 53,6 |
| #error Wrong definition of VECTOR_APIC_SPUR |
| #endif |
| #define VECTOR_DEBUG 1 |
| #define VECTOR_PIC_SPUR (IVT_IRQBASE+IRQ_PIC_SPUR) |
| #define VECTOR_CLK (IVT_IRQBASE+IRQ_CLK) |
| #define VECTOR_KBD (IVT_IRQBASE+IRQ_KBD) |
| /kernel/trunk/arch/amd64/include/asm.h |
|---|
| 141,6 → 141,56 |
| return v; |
| } |
| /** Read CR0 |
| * |
| * Return value in CR0 |
| * |
| * @return Value read. |
| */ |
| static inline __u64 read_cr0(void) |
| { |
| __u64 v; |
| __asm__ volatile ("movq %%cr0,%0\n" : "=r" (v)); |
| return v; |
| } |
| /** Read CR2 |
| * |
| * Return value in CR2 |
| * |
| * @return Value read. |
| */ |
| static inline __u64 read_cr2(void) |
| { |
| __u64 v; |
| __asm__ volatile ("movq %%cr2,%0\n" : "=r" (v)); |
| return v; |
| } |
| /** Write CR3 |
| * |
| * Write value to CR3. |
| * |
| * @param v Value to be written. |
| */ |
| static inline void write_cr3(__u64 v) |
| { |
| __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); |
| } |
| /** Read CR3 |
| * |
| * Return value in CR3 |
| * |
| * @return Value read. |
| */ |
| static inline __u64 read_cr3(void) |
| { |
| __u64 v; |
| __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); |
| return v; |
| } |
| /** Write to MSR */ |
| static inline void write_msr(__u32 msr, __u64 value) |
| { |
| 200,38 → 250,6 |
| __asm__ volatile ("invlpg %0\n" :: "m" (*((__native *)addr))); |
| } |
| #define GEN_READ_REG(reg) static inline __native read_ ##reg (void) \ |
| { \ |
| __native res; \ |
| __asm__ volatile ("movq %%" #reg ", %0" : "=r" (res) ); \ |
| return res; \ |
| } |
| #define GEN_WRITE_REG(reg) static inline void write_ ##reg (__native regn) \ |
| { \ |
| __asm__ volatile ("movq %0, %%" #reg : : "r" (regn)); \ |
| } |
| GEN_READ_REG(cr0); |
| GEN_READ_REG(cr2); |
| GEN_READ_REG(cr3); |
| GEN_WRITE_REG(cr3); |
| GEN_READ_REG(dr0); |
| GEN_READ_REG(dr1); |
| GEN_READ_REG(dr2); |
| GEN_READ_REG(dr3); |
| GEN_READ_REG(dr6); |
| GEN_READ_REG(dr7); |
| GEN_WRITE_REG(dr0); |
| GEN_WRITE_REG(dr1); |
| GEN_WRITE_REG(dr2); |
| GEN_WRITE_REG(dr3); |
| GEN_WRITE_REG(dr6); |
| GEN_WRITE_REG(dr7); |
| extern size_t interrupt_handler_size; |
| extern void interrupt_handlers(void); |
| /kernel/trunk/arch/amd64/include/cpu.h |
|---|
| 29,7 → 29,6 |
| #ifndef __amd64_CPU_H__ |
| #define __amd64_CPU_H__ |
| #define RFLAGS_RF (1 << 16) |
| #define EFER_MSR_NUM 0xc0000080 |
| #define AMD_SCE_FLAG 0 |
| /kernel/trunk/arch/amd64/src/debugger.c |
|---|
| File deleted |
| /kernel/trunk/arch/amd64/src/proc/scheduler.c |
|---|
| 32,7 → 32,6 |
| #include <arch.h> |
| #include <arch/context.h> /* SP_DELTA */ |
| #include <arch/asm.h> |
| #include <arch/debugger.h> |
| void before_thread_runs_arch(void) |
| { |
| 43,16 → 42,6 |
| write_msr(AMD_MSR_GS, |
| (__u64)&THREAD->kstack); |
| swapgs(); |
| #ifdef CONFIG_DEBUG_AS_WATCHPOINT |
| /* Set watchpoint on AS to ensure that nobody sets it to zero */ |
| static int old_slot = -1; |
| if (old_slot >=0) |
| breakpoint_del(old_slot); |
| old_slot = breakpoint_add(&((the_t *) THREAD->kstack)->as, |
| BKPOINT_WRITE | BKPOINT_CHECK_ZERO); |
| #endif |
| } |
| void after_thread_ran_arch(void) |
| /kernel/trunk/arch/amd64/src/amd64.c |
|---|
| 46,7 → 46,6 |
| #include <panic.h> |
| #include <interrupt.h> |
| #include <arch/syscall.h> |
| #include <arch/debugger.h> |
| /** Disable I/O on non-privileged levels |
| * |
| 130,12 → 129,10 |
| { |
| if (config.cpu_active == 1) { |
| ega_init(); /* video */ |
| /* Enable debugger */ |
| debugger_init(); |
| } |
| /* Setup fast SYSCALL/SYSRET */ |
| syscall_setup_cpu(); |
| } |
| void arch_pre_smp_init(void) |
| /kernel/trunk/arch/amd64/Makefile.inc |
|---|
| 103,8 → 103,7 |
| arch/$(ARCH)/src/cpu/cpu.c \ |
| arch/$(ARCH)/src/proc/scheduler.c \ |
| arch/$(ARCH)/src/userspace.c \ |
| arch/$(ARCH)/src/syscall.c \ |
| arch/$(ARCH)/src/debugger.c |
| arch/$(ARCH)/src/syscall.c |
| ifeq ($(CONFIG_SMP),y) |
| ARCH_SOURCES += \ |