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Ignore whitespace Rev 624 → Rev 625

/kernel/trunk/arch/sparc64/include/atomic.h
31,7 → 31,7
 
#include <arch/types.h>
 
typedef volatile __u64 atomic_t;
typedef struct { volatile __u64 count; } atomic_t;
 
/*
* TODO: these are just placeholders for real implementations of atomic_inc and atomic_dec.
39,11 → 39,11
*/
 
static inline void atomic_inc(atomic_t *val) {
*val++;
val->count++;
}
 
static inline void atomic_dec(atomic_t *val) {
*val--;
val->count--;
}
 
#endif
/kernel/trunk/arch/ia64/include/atomic.h
31,7 → 31,7
 
#include <arch/types.h>
 
typedef volatile __u64 atomic_t;
typedef struct { volatile __u64 count; } atomic_t;
 
static inline atomic_t atomic_add(atomic_t *val, int imm)
{
38,11 → 38,21
atomic_t v;
 
__asm__ volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (*val) : "i" (imm));
__asm__ volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm));
return v;
}
 
static inline void atomic_set(atomic_t *val, __u64 i)
{
val->count = i;
}
 
static inline __u32 atomic_get(atomic_t *val)
{
return val->count;
}
 
static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
 
/kernel/trunk/arch/ppc32/include/atomic.h
31,7 → 31,7
 
#include <arch/types.h>
 
typedef volatile __u32 atomic_t;
typedef struct { volatile __u32 count; } atomic_t;
 
/*
* TODO: these are just placeholders for real implementations of atomic_inc and atomic_dec.
39,11 → 39,21
*/
 
static inline void atomic_inc(atomic_t *val) {
*val++;
val->count++;
}
 
static inline void atomic_dec(atomic_t *val) {
*val--;
val->count--;
}
 
static inline void atomic_set(atomic_t *val, __u32 i)
{
val->count = i;
}
 
static inline __u32 atomic_get(atomic_t *val)
{
return val->count;
}
 
#endif
/kernel/trunk/arch/amd64/include/asm.h
54,33 → 54,24
static inline void cpu_halt(void) { __asm__ volatile ("hlt\n"); };
 
 
static inline __u8 inb(__u16 port)
{
__u8 out;
/** Byte from port
*
* Get byte from port
*
* @param port Port to read from
* @return Value read
*/
static inline __u8 inb(__u16 port) { __u8 val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
 
__asm__ volatile (
"mov %1, %%dx\n"
"inb %%dx,%%al\n"
"mov %%al, %0\n"
:"=m"(out)
:"m"(port)
:"%rdx","%rax"
);
return out;
}
/** Byte to port
*
* Output byte to port
*
* @param port Port to write to
* @param val Value to write
*/
static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
 
static inline __u8 outb(__u16 port,__u8 b)
{
__asm__ volatile (
"mov %0,%%dx\n"
"mov %1,%%al\n"
"outb %%al,%%dx\n"
:
:"m"( port), "m" (b)
:"%rdx","%rax"
);
}
 
/** Enable interrupts.
*
* Enable interrupts and return previous
/kernel/trunk/arch/amd64/src/cpu/cpu.c
125,7 → 125,6
void cpu_identify(void)
{
cpu_info_t info;
int i;
 
CPU->arch.vendor = VendorUnknown;
if (has_cpuid()) {
/kernel/trunk/arch/mips32/include/atomic.h
41,7 → 41,7
#define atomic_dec_post(x) atomic_add(x, -1)
 
 
typedef volatile __u32 atomic_t;
typedef struct { volatile __u32 count; } atomic_t;
 
/* Atomic addition of immediate value.
*
62,7 → 62,7
" sc %0, %1\n"
" beq %0, %4, 1b\n" /* if the atomic operation failed, try again */
/* nop */ /* nop is inserted automatically by compiler */
: "=r" (tmp), "=m" (*val), "=r" (v)
: "=r" (tmp), "=m" (val->count), "=r" (v)
: "i" (i), "i" (0)
);
 
69,5 → 69,16
return v;
}
 
/* Reads/writes are atomic on mips for 4-bytes */
 
static inline void atomic_set(atomic_t *val, __u32 i)
{
val->count = i;
}
 
static inline __u32 atomic_get(atomic_t *val)
{
return val->count;
}
 
#endif
/kernel/trunk/arch/mips32/src/drivers/serial.c
38,7 → 38,6
 
static void serial_write(chardev_t *d, const char ch)
{
int i;
serial_t *sd = (serial_t *)d->data;
 
if (ch == '\n')
/kernel/trunk/arch/mips32/src/drivers/arc.c
188,6 → 188,8
arc_putchar('R');
arc_putchar('C');
arc_putchar('\n');
 
return 0;
}
 
static bool kbd_polling_enabled;
286,7 → 288,6
int total = 0;
__address base;
size_t basesize;
unsigned int i,j;
 
desc = arc_entry->getmemorydescriptor(NULL);
while (desc) {
/kernel/trunk/arch/ia32/include/atomic.h
31,21 → 31,31
 
#include <arch/types.h>
 
typedef volatile __u32 atomic_t;
typedef struct { volatile __u32 count; } atomic_t;
 
static inline void atomic_set(atomic_t *val, __u32 i)
{
val->count = i;
}
 
static inline __u32 atomic_get(atomic_t *val)
{
return val->count;
}
 
static inline void atomic_inc(atomic_t *val) {
#ifdef CONFIG_SMP
__asm__ volatile ("lock incl %0\n" : "=m" (*val));
__asm__ volatile ("lock incl %0\n" : "=m" (val->count));
#else
__asm__ volatile ("incl %0\n" : "=m" (*val));
__asm__ volatile ("incl %0\n" : "=m" (val->count));
#endif /* CONFIG_SMP */
}
 
static inline void atomic_dec(atomic_t *val) {
#ifdef CONFIG_SMP
__asm__ volatile ("lock decl %0\n" : "=m" (*val));
__asm__ volatile ("lock decl %0\n" : "=m" (val->count));
#else
__asm__ volatile ("decl %0\n" : "=m" (*val));
__asm__ volatile ("decl %0\n" : "=m" (val->count));
#endif /* CONFIG_SMP */
}
 
55,7 → 65,7
__asm__ volatile (
"movl $1, %0\n"
"lock xaddl %0, %1\n"
: "=r"(r), "=m" (*val)
: "=r"(r), "=m" (val->count)
);
return r;
}
76,13 → 86,13
#define atomic_inc_post(val) (atomic_inc_pre(val)+1)
#define atomic_dec_post(val) (atomic_dec_pre(val)-1)
 
static inline int test_and_set(volatile int *val) {
static inline int test_and_set(atomic_t *val) {
int v;
__asm__ volatile (
"movl $1, %0\n"
"xchgl %0, %1\n"
: "=r" (v),"=m" (*val)
: "=r" (v),"=m" (val->count)
);
return v;
/kernel/trunk/arch/ia32/src/fmath.c
62,7 → 62,8
fmath_ld_union_t fmath_ld_union_num;
fmath_ld_union_t fmath_ld_union_int;
signed short exp;
__u64 mask,mantisa;
__u64 mask;
// __u64 mantisa;
int i;
exp=fmath_get_binary_exponent(num);
/kernel/trunk/arch/ia32/src/smp/smp.c
87,7 → 87,6
*/
void kmp(void *arg)
{
__address src, dst;
int i;
ASSERT(ops != NULL);
/kernel/trunk/arch/ia32/src/mm/frame.c
43,7 → 43,6
 
void frame_arch_init(void)
{
zone_t *z;
__u8 i;
if (config.cpu_active == 1) {