| /kernel/trunk/arch/mips32/src/exception.c |
|---|
| 111,6 → 111,7 |
| tlb_invalid(pstate); |
| } |
| #ifdef CONFIG_FPU_LAZY |
| static void cpuns_exception(int n, void *data) |
| { |
| if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id) |
| 118,6 → 119,7 |
| else |
| panic("unhandled Coprocessor Unusable Exception\n"); |
| } |
| #endif |
| static void interrupt_exception(int n, void *pstate) |
| { |
| /kernel/trunk/arch/mips32/src/fmath.c |
|---|
| 43,7 → 43,7 |
| double fmath_get_decimal_exponent(double num) |
| { //TODO: |
| double value; |
| // double value; |
| // log10(2)*log2(x) => log10(x) |
| /* __asm__ __volatile__ ( \ |
| "fldlg2 #load log10(2) \n\t" \ |
| 50,7 → 50,7 |
| "fxch %%st(1) \n\t" \ |
| "fyl2x #count st(0)*log2(st(1))->st(1); pop st(0) \n\t" \ |
| : "=t" (value) : "0"(num) ); |
| */ return value; |
| */ return 1.0; |
| } |
| /kernel/trunk/arch/mips32/src/debugger.c |
|---|
| 231,7 → 231,7 |
| (!cur->executing && pstate->epc==cur->address+sizeof(__native))) |
| panic("Weird breakpoint state.\n"); |
| if (!cur->executing) { |
| printf("***Breakpoint %d: %p in %s.\n", i, |
| printf("***Breakpoint %d: 0x%p in %s.\n", i, |
| pstate->epc,symbol); |
| /* Return first instruction back */ |
| ((__u32 *)cur->address)[0] = cur->instruction; |
| 248,7 → 248,7 |
| return; |
| } |
| } else { |
| printf("***Breakpoint %p in %s.\n", pstate->epc, symbol); |
| printf("***Breakpoint 0x%p in %s.\n", pstate->epc, symbol); |
| /* Move on to next instruction */ |
| pstate->epc += 4; |
| } |
| /kernel/trunk/arch/ia32/src/smp/mps.c |
|---|
| 322,7 → 322,7 |
| static int io_apic_count = 0; |
| /* this ioapic is marked unusable */ |
| if (ioa->io_apic_flags & 1 == 0) |
| if ((ioa->io_apic_flags & 1) == 0) |
| return; |
| if (io_apic_count++ > 0) { |