/kernel/trunk/arch/sparc64/src/ddi/ddi.c |
---|
45,3 → 45,14 |
{ |
return 0; |
} |
/** Enable/disable interrupts for syscall |
* |
* @param enable If non-zero, interrupts are enabled, otherwise disabled |
* @param flags PSTATE register. |
*/ |
__native ddi_int_control_arch(__native enable, __native *flags) |
{ |
/* TODO: not implemented. */ |
return 0; |
} |
/kernel/trunk/arch/ia64/src/ddi/ddi.c |
---|
45,3 → 45,14 |
{ |
return 0; |
} |
/** Enable/disable interrupts for syscall |
* |
* @param enable If non-zero, interrupts are enabled, otherwise disabled |
* @param flags PSR register. |
*/ |
__native ddi_int_control_arch(__native enable, __native *flags) |
{ |
/* TODO: not implemented. */ |
return 0; |
} |
/kernel/trunk/arch/ia64/src/ia64.c |
---|
44,6 → 44,16 |
#include <proc/uarg.h> |
#include <syscall/syscall.h> |
void arch_pre_main(void) |
{ |
/* Setup usermode init tasks. */ |
init.cnt = 2; |
init.tasks[0].addr = INIT0_ADDRESS; |
init.tasks[0].size = INIT0_SIZE; |
init.tasks[1].addr = INIT1_ADDRESS; |
init.tasks[1].size = INIT1_SIZE; |
} |
void arch_pre_mm_init(void) |
{ |
/* Set Interruption Vector Address (i.e. location of interruption vector table). */ |
52,13 → 62,6 |
ski_init_console(); |
it_init(); |
/* Setup usermode */ |
init.cnt = 2; |
init.tasks[0].addr = INIT0_ADDRESS; |
init.tasks[0].size = INIT0_SIZE; |
init.tasks[1].addr = INIT1_ADDRESS; |
init.tasks[1].size = INIT1_SIZE; |
} |
void arch_post_mm_init(void) |
/kernel/trunk/arch/ia64/src/start.S |
---|
128,6 → 128,7 |
srlz.i; |
srlz.d;; |
br.call.sptk.many b0 = arch_pre_main |
movl r18=main_bsp ;; |
mov b1=r18 ;; |
/kernel/trunk/arch/ppc32/include/arch.h |
---|
29,6 → 29,4 |
#ifndef __ppc32_ARCH_H__ |
#define __ppc32_ARCH_H__ |
extern void arch_pre_main(void); |
#endif |
/kernel/trunk/arch/ppc32/src/ddi/ddi.c |
---|
46,10 → 46,10 |
return 0; |
} |
/** Enable/disable interrupts form syscall |
/** Enable/disable interrupts for syscall |
* |
* @param enable If non-zero, interrupts are enabled, otherwise disabled |
* @param flags CP0 flags register |
* @param flags PPC32 register holding interrupt state. |
*/ |
__native ddi_int_control_arch(__native enable, __native *flags) |
{ |
/kernel/trunk/arch/amd64/src/ddi/ddi.c |
---|
95,7 → 95,7 |
/** Enable/disable interrupts form syscall |
* |
* @param enable If non-zero, interrupts are enabled, otherwise disabled |
* @param flags CP0 flags register |
* @param flags RFLAGS register |
*/ |
__native ddi_int_control_arch(__native enable, __native *flags) |
{ |
/kernel/trunk/arch/mips32/include/arch.h |
---|
29,6 → 29,4 |
#ifndef __mips32_ARCH_H__ |
#define __mips32_ARCH_H__ |
extern void arch_pre_main(void); |
#endif |
/kernel/trunk/arch/mips32/src/ddi/ddi.c |
---|
49,10 → 49,10 |
return 0; |
} |
/** Enable/disable interrupts form syscall |
/** Enable/disable interrupts for syscall |
* |
* @param enable If non-zero, interrupts are enabled, otherwise disabled |
* @param flags CP0 flags register |
* @param flags CP0 status register |
*/ |
__native ddi_int_control_arch(__native enable, __native *flags) |
{ |
/kernel/trunk/arch/ia32/src/ddi/ddi.c |
---|
92,10 → 92,10 |
return 0; |
} |
/** Enable/disable interrupts form syscall |
/** Enable/disable interrupts for syscall |
* |
* @param enable If non-zero, interrupts are enabled, otherwise disabled |
* @param flags CP0 flags register |
* @param flags EFLAGS flags register |
*/ |
__native ddi_int_control_arch(__native enable, __native *flags) |
{ |