/kernel/trunk/arch/ia64/src/ia64.c |
---|
41,6 → 41,7 |
#include <config.h> |
#include <userspace.h> |
#include <console/console.h> |
#include <proc/thread.h> |
void arch_pre_mm_init(void) |
{ |
72,7 → 73,7 |
} |
/** Enter userspace and never return. */ |
void userspace(__address entry) |
void userspace(uspace_arg_t *uarg) |
{ |
psr_t psr; |
rsc_t rsc; |
90,7 → 91,7 |
rsc.pl = PL_USER; |
rsc.mode = 3; /* eager mode */ |
switch_to_userspace(entry, USTACK_ADDRESS+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), USTACK_ADDRESS, psr.value, rsc.value); |
switch_to_userspace(uarg->uspace_entry, uarg->uspace_stack+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), uarg->uspace_stack, psr.value, rsc.value); |
while (1) { |
; |
/kernel/trunk/arch/amd64/src/userspace.c |
---|
39,7 → 39,7 |
* Change CPU protection level to 3, enter userspace. |
* |
*/ |
void userspace(__address entry) |
void userspace(uspace_arg_t *uarg) |
{ |
ipl_t ipl; |
46,22 → 46,18 |
ipl = interrupts_disable(); |
__asm__ volatile ("" |
"movq %0, %%rax;" |
"movq %1, %%rbx;" |
"movq %2, %%rcx;" |
"movq %3, %%rdx;" |
"movq %4, %%rsi;" |
"pushq %%rax;" |
"pushq %%rbx;" |
"pushq %%rcx;" |
"pushq %%rdx;" |
"pushq %%rsi;" |
"iretq;" |
: : "i" (gdtselector(UDATA_DES) | PL_USER), |
"i" (USTACK_ADDRESS+THREAD_STACK_SIZE), |
"pushq %0\n" |
"pushq %1\n" |
"pushq %2\n" |
"pushq %3\n" |
"pushq %4\n" |
"iretq\n" |
: : |
"i" (gdtselector(UDATA_DES) | PL_USER), |
"r" (uarg->uspace_stack+THREAD_STACK_SIZE), |
"r" (ipl), |
"i" (gdtselector(UTEXT_DES) | PL_USER), |
"r" (entry)); |
"r" (uarg->uspace_entry)); |
/* Unreachable */ |
for(;;); |
/kernel/trunk/arch/mips32/src/mips32.c |
---|
120,14 → 120,14 |
*/ |
__address supervisor_sp __attribute__ ((section (".text"))); |
void userspace(__address entry) |
void userspace(uspace_arg_t *uarg) |
{ |
/* EXL=1, UM=1, IE=1 */ |
cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
cp0_status_um_bit | |
cp0_status_ie_enabled_bit)); |
cp0_epc_write(entry); |
userspace_asm(USTACK_ADDRESS+PAGE_SIZE); |
cp0_epc_write(uarg->uspace_entry); |
userspace_asm(uarg->uspace_stack+PAGE_SIZE); |
while (1) |
; |
} |
/kernel/trunk/arch/ia32/include/fpu_context.h |
---|
39,7 → 39,6 |
struct fpu_context { |
/* TODO: We need malloc that aligns structures on 16-byte boundary */ |
__u8 fpu[512]; /* FXSAVE & FXRSTOR storage area */ |
}; |
/kernel/trunk/arch/ia32/src/userspace.c |
---|
39,7 → 39,7 |
* Change CPU protection level to 3, enter userspace. |
* |
*/ |
void userspace(__address entry) |
void userspace(uspace_arg_t *uarg) |
{ |
ipl_t ipl; |
60,7 → 60,8 |
"pushl %4\n" |
"iret" |
: |
: "i" (selector(UDATA_DES) | PL_USER), "r" (USTACK_ADDRESS+(THREAD_STACK_SIZE)), "r" (ipl), "i" (selector(UTEXT_DES) | PL_USER), "r" (entry) |
: "i" (selector(UDATA_DES) | PL_USER), "r" (uarg->uspace_stack+THREAD_STACK_SIZE), |
"r" (ipl), "i" (selector(UTEXT_DES) | PL_USER), "r" (uarg->uspace_entry) |
: "eax"); |
/* Unreachable */ |