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Regard whitespace Rev 664 → Rev 665

/kernel/trunk/arch/sparc64/include/asm.h
122,6 → 122,17
__asm__ volatile ("wr %0, %1, %%softint\n" : : "r" (v), "i" (0));
}
 
/** Write CLEAR_SOFTINT Register.
*
* Bits set in CLEAR_SOFTINT register will be cleared in SOFTINT register.
*
* @param New value of CLEAR_SOFTINT register.
*/
static inline void clear_softint_write(__u64 v)
{
__asm__ volatile ("wr %0, %1, %%clear_softint\n" : : "r" (v), "i" (0));
}
 
/** Enable interrupts.
*
* Enable interrupts and return previous
/kernel/trunk/arch/sparc64/include/drivers/tick.h
29,7 → 29,7
#ifndef __sparc64_TICK_H__
#define __sparc64_TICK_H__
 
#define TICK_DELTA 100000
#define TICK_DELTA 500000
 
extern void tick_init(void);
extern void tick_interrupt(int n, void *stack);
/kernel/trunk/arch/sparc64/src/drivers/tick.c
31,8 → 31,9
#include <arch/asm.h>
#include <arch/register.h>
#include <debug.h>
#include <print.h>
#include <time/clock.h>
 
/** Initialize tick interrupt. */
void tick_init(void)
{
tick_compare_reg_t compare;
44,7 → 45,38
tick_write(0);
}
 
/** Process tick interrupt.
*
* @param n Interrupt Level, 14, (can be ignored)
* @param stack Stack pointer of the interrupted context.
*/
void tick_interrupt(int n, void *stack)
{
panic("Unserviced %s.\n", __FUNCTION__);
softint_reg_t softint, clear;
softint.value = softint_read();
/*
* Make sure we are servicing interrupt_level_14
*/
ASSERT(n == 14);
/*
* Make sure we are servicing TICK_INT.
*/
ASSERT(softint.tick_int);
 
/*
* Clear tick interrupt.
*/
clear.value = 0;
clear.tick_int = 1;
clear_softint_write(clear.value);
/*
* Restart counter.
*/
tick_write(0);
clock();
}