| 194,22 → 194,51 |
|---|
| </section> |
| |
| <section id="tlb"> |
| <title>Translation Lookaside Buffer</title> |
| <title>Translation Lookaside buffer</title> |
| |
| <para>- TLB cachuji informace ve strankovacich tabulkach; alternativne |
| se lze na strankovaci tabulky (ci ruzne hw rozsireni [e.g. VHPT, ppc32 |
| hw hash table]) divat jako na velke TLB</para> |
| <para>Due to the extensive overhead during the page mapping lookup in |
| the page tables, all architectures has fast assotiative cache memory |
| built-in CPU. This memory called TLB stores recently used page table |
| entries.</para> |
| |
| <para>- pri modifikaci mapovani nebo odstraneni mapovani ze |
| strankovacich tabulek je potreba zajistit konsistenci TLB a techto |
| tabulek; nutne delat na vsech CPU; na to mame zjednodusenou verzi TLB |
| shootdown mechanismu; je to variace na algoritmus popsany zde: D. |
| Black et al., "Translation Lookaside Buffer Consistency: A Software |
| Approach," Proc. Third Int'l Conf. Architectural Support for |
| Programming Languages and Operating Systems, 1989, pp. 113-122.</para> |
| <section id="tlb_shootdown"> |
| <title>TLB consistency. TLB shootdown algorithm.</title> |
| |
| <para>- nutno poznamenat, ze existuji odlehcenejsi verze TLB shootdown |
| algoritm</para> |
| <para>Operating system is responsible for keeping TLB consistent by |
| invalidating the contents of TLB, whenever there is some change in |
| page tables. Those changes may occur when page or group of pages |
| were unmapped, mapping is changed or system switching active address |
| space to schedule a new system task (which is a batch unmap of all |
| address space mappings). Moreover, this invalidation operation must |
| be done an all system CPUs because each CPU has its own independent |
| TLB cache. Thus maintaining TLB consistency on SMP configuration as |
| not as trivial task as it looks at the first glance. Naive solution |
| would assume remote TLB invalidatation, which is not possible on the |
| most of the architectures, because of the simple fact - flushing TLB |
| is allowed only on the local CPU and there is no possibility to |
| access other CPUs' TLB caches.</para> |
| |
| <para>Technique of remote invalidation of TLB entries is called "TLB |
| shootdown". HelenOS uses a variation of the algorithm described by |
| D. Black et al., "Translation Lookaside Buffer Consistency: A |
| Software Approach," Proc. Third Int'l Conf. Architectural Support |
| for Programming Languages and Operating Systems, 1989, pp. |
| 113-122.</para> |
| |
| <para>As the situation demands, you will want partitial invalidation |
| of TLB caches. In case of simple memory mapping change it is |
| necessary to invalidate only one or more adjacent pages. In case if |
| the architecture is aware of ASIDs, during the address space |
| switching, kernel invalidates only entries from this particular |
| address space. Final option of the TLB invalidation is the complete |
| TLB cache invalidation, which is the operation that flushes all |
| entries in TLB.</para> |
| |
| <para>TLB shootdown is performed in two phases. First, the initiator |
| process sends an IPI message indicating the TLB shootdown request to |
| the rest of the CPUs. Then, it waits until all CPUs confirm TLB |
| invalidating action execution.</para> |
| </section> |
| </section> |
| </section> |
| |