| 38,11 → 38,11 |
|---|
| #define LIBC_amd64_ATOMIC_H_ |
| |
| static inline void atomic_inc(atomic_t *val) { |
| asm volatile ("lock incq %0\n" : "=m" (val->count)); |
| asm volatile ("lock incq %0\n" : "+m" (val->count)); |
| } |
| |
| static inline void atomic_dec(atomic_t *val) { |
| asm volatile ("lock decq %0\n" : "=m" (val->count)); |
| asm volatile ("lock decq %0\n" : "+m" (val->count)); |
| } |
| |
| static inline long atomic_postinc(atomic_t *val) |
| 52,7 → 52,7 |
|---|
| asm volatile ( |
| "movq $1, %0\n" |
| "lock xaddq %0, %1\n" |
| : "=r" (r), "=m" (val->count) |
| : "=r" (r), "+m" (val->count) |
| ); |
| |
| return r; |
| 65,14 → 65,14 |
|---|
| asm volatile ( |
| "movq $-1, %0\n" |
| "lock xaddq %0, %1\n" |
| : "=r" (r), "=m" (val->count) |
| : "=r" (r), "+m" (val->count) |
| ); |
| |
| return r; |
| } |
| |
| #define atomic_preinc(val) (atomic_postinc(val)+1) |
| #define atomic_predec(val) (atomic_postdec(val)-1) |
| #define atomic_preinc(val) (atomic_postinc(val) + 1) |
| #define atomic_predec(val) (atomic_postdec(val) - 1) |
| |
| #endif |
| |