39,10 → 39,11 |
#include <arch/types.h> |
#include <arch/register.h> |
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typedef uint64_t ioport_t; |
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#define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL |
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static inline void outb(uint64_t port,uint8_t v) |
static inline void outb(ioport_t port,uint8_t v) |
{ |
*((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v; |
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49,7 → 50,7 |
asm volatile ("mf\n" ::: "memory"); |
} |
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static inline void outw(uint64_t port,uint16_t v) |
static inline void outw(ioport_t port,uint16_t v) |
{ |
*((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v; |
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56,7 → 57,7 |
asm volatile ("mf\n" ::: "memory"); |
} |
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static inline void outl(uint64_t port,uint32_t v) |
static inline void outl(ioport_t port,uint32_t v) |
{ |
*((uint32_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v; |
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65,7 → 66,7 |
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static inline uint8_t inb(uint64_t port) |
static inline uint8_t inb(ioport_t port) |
{ |
asm volatile ("mf\n" ::: "memory"); |
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72,7 → 73,7 |
return *((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))); |
} |
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static inline uint16_t inw(uint64_t port) |
static inline uint16_t inw(ioport_t port) |
{ |
asm volatile ("mf\n" ::: "memory"); |
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79,7 → 80,7 |
return *((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xffE) | ( (port >> 2) << 12 )))); |
} |
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static inline uint32_t inl(uint64_t port) |
static inline uint32_t inl(ioport_t port) |
{ |
asm volatile ("mf\n" ::: "memory"); |
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98,9 → 99,14 |
{ |
uint64_t v; |
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asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1))); |
//I'm not sure why but this code bad inlines in scheduler, |
//so THE shifts about 16B and causes kernel panic |
//asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1))); |
//return v; |
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return v; |
//this code have the same meaning but inlines well |
asm volatile ("mov %0 = r12" : "=r" (v) ); |
return v & (~(STACK_SIZE-1)); |
} |
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/** Return Processor State Register. |
152,6 → 158,16 |
return v; |
} |
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static inline uint64_t cr64_read(void) |
{ |
uint64_t v; |
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asm volatile ("mov %0 = cr64\n" : "=r" (v)); |
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return v; |
} |
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/** Write ITC (Interval Timer Counter) register. |
* |
* @param v New counter value. |