28,8 → 28,26 |
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#include "asm.h" |
#include "regname.h" |
#include "debug.inc" |
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.macro SMC_COHERENCY addr |
dcbst 0, \addr |
sync |
icbi 0, \addr |
sync |
isync |
.endm |
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.macro FLUSH_DCACHE addr |
dcbst 0, \addr |
sync |
isync |
.endm |
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.macro TLB_FLUSH reg |
tlbie \reg |
addi \reg, \reg, 0x1000 |
.endm |
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.text |
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.global halt |
140,9 → 158,6 |
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real_mode: |
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DEBUG_INIT |
DEBUG_real_mode |
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# copy kernel to proper location |
# |
# r5 = trans (pa) |
163,14 → 178,13 |
mtctr r31 |
lwz r29, 0(r5) |
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DEBUG_INIT |
DEBUG_copy_loop |
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copy_loop: |
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lwz r28, 0(r29) |
stw r28, 0(r30) |
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SMC_COHERENCY r30 |
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addi r29, r29, 4 |
addi r30, r30, 4 |
subi r6, r6, 4 |
180,15 → 194,11 |
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bdnz copy_loop |
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DEBUG_end_copy_loop |
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addi r5, r5, 4 |
b page_copy |
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copy_end: |
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DEBUG_segments |
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# initially fill segment registers |
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li r31, 0 |
196,7 → 206,7 |
li r29, 8 |
mtctr r29 |
li r30, 0 # ASID 0 (VSIDs 0 .. 7) |
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seg_fill_uspace: |
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mtsrin r30, r31 |
220,8 → 230,6 |
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# invalidate block address translation registers |
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DEBUG_bat |
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li r30, 0 |
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mtspr ibat0u, r30 |
251,8 → 259,6 |
# create empty Page Hash Table |
# on top of memory, size 64 KB |
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DEBUG_pht |
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lwz r31, 0(r3) # r31 = memory size |
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lis r30, 65536@h |
274,6 → 280,7 |
# write zeroes |
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stw r29, 0(r31) |
FLUSH_DCACHE r31 |
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addi r31, r31, 4 |
subi r30, r30, 4 |
282,8 → 289,6 |
beq clear_end |
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bdnz pht_clear |
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DEBUG_end_pht_clear |
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clear_end: |
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291,8 → 296,6 |
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# create BAT identity mapping |
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DEBUG_mapping |
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lwz r31, 0(r3) # r31 = memory size |
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lis r29, 0x0002 |
315,8 → 318,6 |
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bdnz bat_mask |
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DEBUG_bat_mask |
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andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB) |
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li r29, 2 |
336,16 → 337,90 |
mtspr dbat0l, r30 |
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no_bat: |
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#endif |
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DEBUG_tlb |
# flush TLB |
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tlbia |
li r31, 0 |
sync |
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TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
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TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
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TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
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TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
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TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
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TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
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TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
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TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
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eieio |
tlbsync |
sync |
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DEBUG_prepare |
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# start the kernel |
# |
# pc = KERNEL_START_ADDR |
373,8 → 448,6 |
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sync |
isync |
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DEBUG_rfi |
rfi |
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.align PAGE_WIDTH |