/branches/sparc/usii.simics |
---|
0,0 → 1,140 |
# |
# This configuration file was assembled from the bagle machine |
# configuration files as found in Simics 3.0.21. It won't probably |
# work in Simics versions prior to Simics 3.0. |
# |
# The machine simulated is SunFire server Sun Enterprise E6500. |
# |
# - modified to boot from CD-ROM |
# - framebuffer color depth set to 24bpp |
# |
script-branch { |
wait-for-variable machine_defined |
$pcibrd = (create-sunfire-pci-board mac_address = "10:10:10:10:10:14") |
#$pgx64 = (create-sun-pci-pgx64) |
#$gfxcon = (create-std-graphics-console) |
#$keyboard = (create-sun-type5-keyboard) |
#$mouse = (create-sun-type5-mouse) |
$scsi_bus = (create-std-scsi-bus) |
$system.connect slot2 $pcibrd |
#$pcibrd.connect pci-slot0 $pgx64 |
$pcibrd.connect $scsi_bus |
#$system.connect keyboard $keyboard |
#$system.connect mouse $mouse |
#$gfxcon.connect $pgx64 |
#$gfxcon.connect $keyboard |
#$gfxcon.connect $mouse |
} |
$save_slot2 = "yes" |
if not defined hostid {$hostid = 0x80804a6c} |
if not defined freq_mhz {$freq_mhz = 168} |
if not defined mac_address {$mac_address = "10:10:10:10:10:12"} |
if not defined disk_size {$disk_size = 2128486400} |
if not defined rtc_time {$rtc_time = "2002-06-02 13:00:00 UTC"} |
if not defined num_cpus {$num_cpus = 3} |
if not defined memory_megs {$memory_megs = 256} |
if not defined save_slot2 {$save_slot2 = "no"} |
add-directory "%simics%/targets/sunfire/images/" |
import-pci-components |
import-std-components |
import-sun-components |
import-sunfire-components |
$system = (create-sunfire-6500-backplane cpu_frequency = $freq_mhz |
hostid = $hostid |
mac_address = $mac_address |
rtc_time = $rtc_time) |
$board = 0 |
$cpus_left = $num_cpus |
$megs_left = $memory_megs |
while $cpus_left or $megs_left { |
$cpubrd[$board] = (create-sunfire-cpu-board |
num_cpus = (min $cpus_left 2) |
memory_megs = (min $megs_left 4096)) |
$system.connect ("slot" + $board) $cpubrd[$board] |
if $board == 0 { |
$system.connect central-cpu $cpubrd[$board] |
} |
$cpus_left = (max ($cpus_left - 2) 0) |
$megs_left = (max ($megs_left - 4096) 0) |
$board += 1 |
if $board == 1 {$board = 2} |
if $board == 2 and ($save_slot2 == yes) {$board = 3} |
} |
$sbusbrd = (create-sunfire-sbus-board mac_address = $mac_address) |
$scsi_bus = (create-std-scsi-bus) |
$scsi_disk = (create-std-scsi-disk scsi_id = 1 size = $disk_size) |
$scsi_cdrom = (create-std-scsi-cdrom scsi_id = 6) |
$console = (create-std-text-console) |
$system.connect slot1 $sbusbrd |
$sbusbrd.connect $scsi_bus |
$scsi_bus.connect $scsi_disk |
$scsi_bus.connect $scsi_cdrom |
$system.connect ttya $console |
$machine_defined = 1 |
instantiate-components |
$eth_comp = $sbus_fas_hme |
$eth_cnt = "" |
run-command-file "%simics%/targets/common/add-eth-link.include" |
if not defined ip_address {$ip_address = "10.10.0.6"} |
if $service_node { |
local $sn = ($service_node.get-component-object sn) |
($sn.add-host name = $host_name |
ip = $ip_address domain = network.sim |
mac = $mac_address) |
} |
default-port-forward-target $ip_address |
$cdrom_path = "image.iso" |
($scsi_cdrom.get-component-object cd).insert (new-file-cdrom $cdrom_path) |
$system.set-prom-env boot-command "boot cdrom" |
$system.set-prom-env auto-boot? true |
#$system.set-prom-env "output-device" "screen:r1152x900x76x24" |
@buf = 0; |
@offset = 0; |
@register2Number = SIM_get_register_number(SIM_current_processor(), "g2"); |
@register3Number = SIM_get_register_number(SIM_current_processor(), "g3"); |
@def schedule(): |
SIM_realtime_event(100, handler, 0, 0, ''); |
@def handler(x): |
global buf |
global offset |
if (SIM_simics_is_running()): |
register2Value = SIM_read_register(SIM_current_processor(), register2Number); |
if ((buf == 0) and register2Value == 0x18273645): |
buf = SIM_read_register(SIM_current_processor(), register3Number); |
SIM_write_register(SIM_current_processor(), register2Number, 0); |
SIM_flush(); |
print buf |
elif (buf != 0): |
byte = SIM_read_phys_memory(SIM_current_processor(), buf + offset, 1); |
while byte != 0: |
SIM_putchar(byte); |
SIM_flush(); |
SIM_write_phys_memory(SIM_current_processor(), buf + offset, 0, 1); |
offset = (offset + 1) % 512; |
byte = SIM_read_phys_memory(SIM_current_processor(), buf + offset, 1); |
schedule(); |
@schedule(); |
/branches/sparc/kernel/arch/sparc64/include/trap/interrupt.h |
---|
49,21 → 49,43 |
/* Interrupt ASI registers. */ |
#define ASI_UDB_INTR_W 0x77 |
#define ASI_INTR_W 0x77 |
#define ASI_INTR_DISPATCH_STATUS 0x48 |
#define ASI_UDB_INTR_R 0x7f |
#define ASI_INTR_R 0x7f |
#define ASI_INTR_RECEIVE 0x49 |
/* VA's used with ASI_UDB_INTR_W register. */ |
#if defined (US) |
#define ASI_UDB_INTR_W_DATA_0 0x40 |
#define ASI_UDB_INTR_W_DATA_1 0x50 |
#define ASI_UDB_INTR_W_DATA_2 0x60 |
#define ASI_UDB_INTR_W_DISPATCH 0x70 |
#elif defined (US3) |
#define VA_INTR_W_DATA_0 0x40 |
#define VA_INTR_W_DATA_1 0x48 |
#define VA_INTR_W_DATA_2 0x50 |
#define VA_INTR_W_DATA_3 0x58 |
#define VA_INTR_W_DATA_4 0x60 |
#define VA_INTR_W_DATA_5 0x68 |
#define VA_INTR_W_DATA_6 0x80 |
#define VA_INTR_W_DATA_7 0x88 |
#endif |
#define VA_INTR_W_DISPATCH 0x70 |
/* VA's used with ASI_UDB_INTR_R register. */ |
#if defined(US) |
#define ASI_UDB_INTR_R_DATA_0 0x40 |
#define ASI_UDB_INTR_R_DATA_1 0x50 |
#define ASI_UDB_INTR_R_DATA_2 0x60 |
#elif defined (US3) |
#define VA_INTR_R_DATA_0 0x40 |
#define VA_INTR_R_DATA_1 0x48 |
#define VA_INTR_R_DATA_2 0x50 |
#define VA_INTR_R_DATA_3 0x58 |
#define VA_INTR_R_DATA_4 0x60 |
#define VA_INTR_R_DATA_5 0x68 |
#define VA_INTR_R_DATA_6 0x80 |
#define VA_INTR_R_DATA_7 0x88 |
#endif |
/* Shifts in the Interrupt Vector Dispatch virtual address. */ |
#define INTR_VEC_DISPATCH_MID_SHIFT 14 |
/branches/sparc/kernel/arch/sparc64/include/mm/frame.h |
---|
59,8 → 59,13 |
union frame_address { |
uintptr_t address; |
struct { |
#if defined (US) |
unsigned : 23; |
uint64_t pfn : 28; /**< Physical Frame Number. */ |
#elif defined (US3) |
unsigned : 21; |
uint64_t pfn : 30; /**< Physical Frame Number. */ |
#endif |
unsigned offset : 13; /**< Offset. */ |
} __attribute__ ((packed)); |
}; |
/branches/sparc/kernel/arch/sparc64/include/mm/tte.h |
---|
50,7 → 50,7 |
#include <arch/types.h> |
// TODO find out what this means |
/* TTE tag's VA_tag field contains bits <63:VA_TAG_PAGE_SHIFT> of the VA */ |
#define VA_TAG_PAGE_SHIFT 22 |
/** Translation Table Entry - Tag. */ |
/branches/sparc/kernel/arch/sparc64/include/mm/mmu.h |
---|
35,8 → 35,10 |
#ifndef KERN_sparc64_MMU_H_ |
#define KERN_sparc64_MMU_H_ |
#if defined(US) |
/* LSU Control Register ASI. */ |
#define ASI_LSU_CONTROL_REG 0x45 /**< Load/Store Unit Control Register. */ |
#endif |
/* I-MMU ASIs. */ |
#define ASI_IMMU 0x50 |
80,6 → 82,7 |
#include <arch/barrier.h> |
#include <arch/types.h> |
#if defined(US) |
/** LSU Control Register. */ |
typedef union { |
uint64_t value; |
100,6 → 103,7 |
} __attribute__ ((packed)); |
} lsu_cr_reg_t; |
#endif /* US */ |
#endif /* !def __ASM__ */ |
/branches/sparc/kernel/arch/sparc64/src/smp/ipi.c |
---|
46,6 → 46,33 |
#include <time/delay.h> |
#include <panic.h> |
/** Set the contents of the outgoing interrupt vector data. |
* |
* The first data item (data 0) will be set to the value of func, the |
* rest of the vector will contain zeros. |
* |
* This is a helper function used from within the cross_call function. |
* |
* @param func value the first data item of the vector will be set to |
*/ |
static inline void set_intr_w_data(void (* func)(void)) |
{ |
#if defined (US) |
asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_0, (uintptr_t) func); |
asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_1, 0); |
asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_2, 0); |
#elif defined (US3) |
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_0, (uintptr_t) func); |
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_1, 0); |
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_2, 0); |
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_3, 0); |
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_4, 0); |
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_5, 0); |
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_6, 0); |
asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_7, 0); |
#endif |
} |
/** Invoke function on another processor. |
* |
* Currently, only functions without arguments are supported. |
74,13 → 101,10 |
panic("Interrupt Dispatch Status busy bit set\n"); |
do { |
asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_0, |
(uintptr_t) func); |
asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_1, 0); |
asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_2, 0); |
asi_u64_write(ASI_UDB_INTR_W, |
set_intr_w_data(func); |
asi_u64_write(ASI_INTR_W, |
(mid << INTR_VEC_DISPATCH_MID_SHIFT) | |
ASI_UDB_INTR_W_DISPATCH, 0); |
VA_INTR_W_DISPATCH, 0); |
membar(); |
/branches/sparc/kernel/arch/sparc64/src/trap/interrupt.c |
---|
71,7 → 71,11 |
uint64_t data0; |
intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0); |
data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0); |
#if defined (US) |
data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0); |
#elif defined (US3) |
data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0); |
#endif |
irq_t *irq = irq_dispatch_and_lock(data0); |
if (irq) { |
/branches/sparc/kernel/arch/sparc64/src/cpu/cpu.c |
---|
125,6 → 125,15 |
case IMPL_ULTRASPARCIII: |
impl = "UltraSPARC III"; |
break; |
case IMPL_ULTRASPARCIII_PLUS: |
impl = "UltraSPARC III+"; |
break; |
case IMPL_ULTRASPARCIII_I: |
impl = "UltraSPARC IIIi"; |
break; |
case IMPL_ULTRASPARCIV: |
impl = "UltraSPARC IV"; |
break; |
case IMPL_ULTRASPARCIV_PLUS: |
impl = "UltraSPARC IV+"; |
break; |
/branches/sparc/kernel/arch/sparc64/src/mm/tsb.c |
---|
112,9 → 112,9 |
tsb->data.value = 0; |
tsb->data.size = PAGESIZE_8K; |
tsb->data.pfn = (t->frame >> MMU_FRAME_WIDTH) + index; |
tsb->data.cp = t->c; |
tsb->data.p = t->k; /* p as privileged */ |
tsb->data.v = t->p; |
tsb->data.cp = t->c; /* cp as cache in phys.-idxed, c as cacheable */ |
tsb->data.p = t->k; /* p as privileged, k as kernel */ |
tsb->data.v = t->p; /* v as valid, p as present */ |
write_barrier(); |
/branches/sparc/uspace/app/init/init.c |
---|
105,7 → 105,7 |
} |
// FIXME: spawn("/sbin/pci"); |
spawn("/sbin/fb"); |
//spawn("/sbin/fb"); |
spawn("/sbin/kbd"); |
spawn("/sbin/console"); |