/branches/sparc/kernel/arch/sparc64/src/trap/sun4v/interrupt.c |
---|
0,0 → 1,123 |
/* |
* Copyright (c) 2009 Pavel Rimsky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup sparc64interrupt |
* @{ |
*/ |
/** @file |
*/ |
#include <arch/interrupt.h> |
#include <arch/trap/interrupt.h> |
#include <arch/sparc64.h> |
#include <arch/trap/interrupt.h> |
#include <interrupt.h> |
#include <ddi/irq.h> |
#include <arch/types.h> |
#include <debug.h> |
#include <arch/asm.h> |
#include <arch/barrier.h> |
#include <print.h> |
#include <arch.h> |
#include <mm/tlb.h> |
#include <config.h> |
#include <synch/spinlock.h> |
#include <arch/sun4v/hypercall.h> |
/** number of uint64_t-s in one CPU mondo message */ |
#define CPU_MONDO_ENTRY_SIZE 8 |
/** number of entries (messages) in the CPU mondo queue */ |
#define CPU_MONDO_NENTRIES 8 |
/** number of uint64_t-s in the CPU mondo queue */ |
#define CPU_MONDO_QUEUE_SIZE ((CPU_MONDO_NENTRIES) * (CPU_MONDO_ENTRY_SIZE)) |
/** used to identify CPU mondo queue in the hypercall */ |
#define CPU_MONDO_QUEUE_ID 0x3c |
/** ASI for reading/writing CPU mondo head/tail registers */ |
#define ASI_QUEUE 0x25 |
/** VA for reading the CPU mondo tail */ |
#define VA_CPU_MONDO_QUEUE_TAIL 0x3c8 |
/** VA for reading/writing the CPU mondo head */ |
#define VA_CPU_MONDO_QUEUE_HEAD 0x3c0 |
/** |
* array which contains CPU mondo queue for every CPU |
*/ |
uint64_t cpu_mondo_queues[MAX_NUM_STRANDS][CPU_MONDO_QUEUE_SIZE] |
__attribute__((aligned( |
CPU_MONDO_QUEUE_SIZE * sizeof(uint64_t)))); |
/** |
* Initializes CPU mondo queue for the current CPU. |
*/ |
void sun4v_ipi_init(void) |
{ |
if (__hypercall_fast3( |
CPU_QCONF, |
CPU_MONDO_QUEUE_ID, |
KA2PA(cpu_mondo_queues[CPU->id]), |
CPU_MONDO_NENTRIES) != EOK) |
panic("Initializing mondo queue failed on CPU %d.\n", |
CPU->arch.id); |
} |
/** |
* Handler of the CPU Mondo trap. Reads the message queue, updates the head |
* register and processes the message (invokes a function call). |
*/ |
void cpu_mondo(void) |
{ |
unsigned int tail = asi_u64_read(ASI_QUEUE, VA_CPU_MONDO_QUEUE_TAIL); |
unsigned int head = asi_u64_read(ASI_QUEUE, VA_CPU_MONDO_QUEUE_HEAD); |
while (head != tail) { |
uint64_t data1 = cpu_mondo_queues[CPU->id][0]; |
head = (head + CPU_MONDO_ENTRY_SIZE * sizeof(uint64_t)) % |
(CPU_MONDO_QUEUE_SIZE * sizeof(uint64_t)); |
asi_u64_write(ASI_QUEUE, VA_CPU_MONDO_QUEUE_HEAD, head); |
if (data1 == (uint64_t) tlb_shootdown_ipi_recv) { |
((void (*)(void)) data1)(); |
} else { |
printf("Spurious interrupt on %d, data = %lx.\n", |
CPU->arch.id, data1); |
} |
} |
} |
/** @} |
*/ |
/branches/sparc/kernel/arch/sparc64/src/trap/sun4v/trap_table.S |
---|
321,12 → 321,6 |
interrupt_level_15_handler_tl0: |
INTERRUPT_LEVEL_N_HANDLER 15 |
/* TT = 0x60, TL = 0, interrupt_vector_trap handler */ |
.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE |
.global interrupt_vector_trap_handler_tl0 |
interrupt_vector_trap_handler_tl0: |
INTERRUPT_VECTOR_TRAP_HANDLER |
/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ |
.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE |
.global fast_instruction_access_mmu_miss_handler_tl0 |
345,6 → 339,12 |
fast_data_access_protection_handler_tl0: |
FAST_DATA_ACCESS_PROTECTION_HANDLER 0 |
/* TT = 0x7c, TL = 0, cpu_mondo */ |
.org trap_table + TT_CPU_MONDO*ENTRY_SIZE |
.global cpu_mondo_handler_tl0 |
cpu_mondo_handler_tl0: |
PREEMPTIBLE_HANDLER cpu_mondo |
/* TT = 0x80, TL = 0, spill_0_normal handler */ |
.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE |
.global spill_0_normal_tl0 |
527,6 → 527,13 |
fast_data_access_protection_handler_tl1: |
FAST_DATA_ACCESS_PROTECTION_HANDLER 1 |
/* TT = 0x7c, TL > 0, cpu_mondo */ |
.org trap_table + (TT_CPU_MONDO+512)*ENTRY_SIZE |
.global cpu_mondo_handler_tl1 |
cpu_mondo_handler_tl1: |
wrpr %g0, %tl |
PREEMPTIBLE_HANDLER cpu_mondo |
/* TT = 0x80, TL > 0, spill_0_normal handler */ |
.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
.global spill_0_normal_tl1 |
816,7 → 823,6 |
5: |
restore |
retry |
.endm |
/branches/sparc/kernel/arch/sparc64/src/trap/interrupt.c |
---|
1,5 → 1,6 |
/* |
* Copyright (c) 2005 Jakub Jermar |
* Copyright (c) 2009 Pavel Rimsky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
33,8 → 34,8 |
*/ |
#include <arch/interrupt.h> |
#include <arch/trap/interrupt.h> |
#include <arch/sparc64.h> |
#include <arch/trap/interrupt.h> |
#include <interrupt.h> |
#include <ddi/irq.h> |
#include <arch/types.h> |
59,66 → 60,5 |
exc_register(n - 1, name, f); |
} |
/** Process hardware interrupt. |
* |
* @param n Ignored. |
* @param istate Ignored. |
*/ |
void interrupt(int n, istate_t *istate) |
{ |
uint64_t status; |
uint64_t intrcv; |
uint64_t data0; |
status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0); |
if (status & (!INTR_DISPATCH_STATUS_BUSY)) |
panic("Interrupt Dispatch Status busy bit not set\n"); |
intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0); |
#if defined (US) |
data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0); |
#elif defined (US3) |
data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0); |
#endif |
irq_t *irq = irq_dispatch_and_lock(data0); |
if (irq) { |
/* |
* The IRQ handler was found. |
*/ |
irq->handler(irq, irq->arg); |
/* |
* See if there is a clear-interrupt-routine and call it. |
*/ |
if (irq->cir) { |
irq->cir(irq->cir_arg, irq->inr); |
} |
spinlock_unlock(&irq->lock); |
} else if (data0 > config.base) { |
/* |
* This is a cross-call. |
* data0 contains address of the kernel function. |
* We call the function only after we verify |
* it is one of the supported ones. |
*/ |
#ifdef CONFIG_SMP |
if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) { |
tlb_shootdown_ipi_recv(); |
} |
#endif |
} else { |
/* |
* Spurious interrupt. |
*/ |
#ifdef CONFIG_DEBUG |
printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64 |
", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0); |
#endif |
} |
membar(); |
asi_u64_write(ASI_INTR_RECEIVE, 0, 0); |
} |
/** @} |
*/ |
/branches/sparc/kernel/arch/sparc64/src/trap/sun4u/interrupt.c |
---|
0,0 → 1,111 |
/* |
* Copyright (c) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup sparc64interrupt |
* @{ |
*/ |
/** @file |
*/ |
#include <arch/interrupt.h> |
#include <arch/sparc64.h> |
#include <arch/trap/interrupt.h> |
#include <interrupt.h> |
#include <ddi/irq.h> |
#include <arch/types.h> |
#include <debug.h> |
#include <arch/asm.h> |
#include <arch/barrier.h> |
#include <print.h> |
#include <arch.h> |
#include <mm/tlb.h> |
#include <config.h> |
#include <synch/spinlock.h> |
/** Process hardware interrupt. |
* |
* @param n Ignored. |
* @param istate Ignored. |
*/ |
void interrupt(int n, istate_t *istate) |
{ |
uint64_t status; |
uint64_t intrcv; |
uint64_t data0; |
status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0); |
if (status & (!INTR_DISPATCH_STATUS_BUSY)) |
panic("Interrupt Dispatch Status busy bit not set\n"); |
intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0); |
#if defined (US) |
data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0); |
#elif defined (US3) |
data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0); |
#endif |
irq_t *irq = irq_dispatch_and_lock(data0); |
if (irq) { |
/* |
* The IRQ handler was found. |
*/ |
irq->handler(irq, irq->arg); |
/* |
* See if there is a clear-interrupt-routine and call it. |
*/ |
if (irq->cir) { |
irq->cir(irq->cir_arg, irq->inr); |
} |
spinlock_unlock(&irq->lock); |
} else if (data0 > config.base) { |
/* |
* This is a cross-call. |
* data0 contains address of the kernel function. |
* We call the function only after we verify |
* it is one of the supported ones. |
*/ |
#ifdef CONFIG_SMP |
if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) { |
tlb_shootdown_ipi_recv(); |
} |
#endif |
} else { |
/* |
* Spurious interrupt. |
*/ |
#ifdef CONFIG_DEBUG |
printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64 |
", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0); |
#endif |
} |
membar(); |
asi_u64_write(ASI_INTR_RECEIVE, 0, 0); |
} |
/** @} |
*/ |