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Compare Revisions

• This comparison shows the changes necessary to convert path

  → /branches/sparc/kernel/arch/sparc64/src/mm @ 4129

  → /branches/sparc/kernel/arch/sparc64/src/mm @ 4130

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

Ignore whitespace Rev 4129 → Rev 4130

/branches/sparc/kernel/arch/sparc64/src/mm/cache.S
File deleted

/branches/sparc/kernel/arch/sparc64/src/mm/sun4v/tlb.c
143,7 → 143,7
#endif
data.p = true;
data.x = false;
data.w = false;
data.w = true;
data.size = pagesize;
if (locked) {

/branches/sparc/kernel/arch/sparc64/src/mm/sun4v/as.c
128,9 → 128,7
* to map both TSBs explicitly.
*/
mmu_demap_page(tsb, 0, MMU_FLAG_DTLB);
mmu_map_perm_addr(
tsb, KA2PA(tsb), true, true, false, true,
PAGESIZE_64K, MMU_FLAG_DTLB);
dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
}
__hypercall_fast2(MMU_TSB_CTX0, 1, as->arch.tsb_description.tsb_base);
166,7 → 164,7
* by the locked 4M kernel DTLB entry. We need
* to demap the entry installed by as_install_arch().
*/
mmu_demap_page(tsb, 0, MMU_FLAG_DTLB);
__hypercall_fast3(MMU_UNMAP_PERM_ADDR, tsb, 0, MMU_FLAG_DTLB);
}
#endif
}

/branches/sparc/kernel/arch/sparc64/src/mm/sun4u/tlb.c
461,7 → 461,7
panic("%s\n", str);
}
void describe_mmu_fault(void)
void describe_dmmu_fault(void)
{
tlb_sfsr_reg_t sfsr;
uintptr_t sfar;

/branches/sparc/kernel/arch/sparc64/src/mm/sun4u/cache.S
0,0 → 1,49
/*
* Copyright (c) 2006 Jakub Jermar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch/arch.h>
#include <arch/mm/sun4u/cache_spec.h>
#define DCACHE_TAG_SHIFT 2
.register %g2, #scratch
.register %g3, #scratch
/** Flush the whole D-cache. */
.global dcache_flush
dcache_flush:
set (DCACHE_SIZE - DCACHE_LINE_SIZE), %g1
stxa %g0, [%g1] ASI_DCACHE_TAG
0: membar #Sync
subcc %g1, DCACHE_LINE_SIZE, %g1
bnz,pt %xcc, 0b
stxa %g0, [%g1] ASI_DCACHE_TAG
membar #Sync
retl
! beware SF Erratum #51, do not put the MEMBAR here
nop