118,42 → 118,6 |
asi_u64_write(ASI_SECONDARY_CONTEXT_REG, VA_SECONDARY_CONTEXT_REG, v); |
} |
|
/** Perform IMMU TLB Demap Operation. |
* |
* @param type Selects between context and page demap (and entire MMU |
* demap on US3). |
* @param context_encoding Specifies which Context register has Context ID for |
* demap. |
* @param page Address which is on the page to be demapped. |
*/ |
static inline void itlb_demap(int type, int context_encoding, uintptr_t page) |
{ |
} |
|
/** Perform DMMU TLB Demap Operation. |
* |
* @param type One of TLB_DEMAP_PAGE and TLB_DEMAP_CONTEXT. Selects |
* between context and page demap. |
* @param context_encoding Specifies which Context register has Context ID for |
* demap. |
* @param page Address which is on the page to be demapped. |
*/ |
static inline void dtlb_demap(int type, int context_encoding, uintptr_t page) |
{ |
#if 0 |
- this implementation is not correct!!! |
if (type == TLB_DEMAP_PAGE) { |
__hypercall_fast5( |
MMU_DEMAP_PAGE, 0, 0, |
page, context_encoding, MMU_FLAG_DTLB); |
} else if (type == TLB_DEMAP_CONTEXT) { |
__hypercall_fast4( |
MMU_DEMAP_CTX, 0, 0, |
context_encoding, MMU_FLAG_DTLB); |
} |
#endif |
} |
|
/** |
* Demaps all mappings in a context. |
* |
164,10 → 128,29 |
__hypercall_fast4(MMU_DEMAP_CTX, 0, 0, context, mmu_flag); |
} |
|
/** |
* Demaps given page. |
* |
* @param vaddr VA of the page to be demapped |
* @param context number of the context |
* @param mmu_flag MMU_FLAG_DTLB, MMU_FLAG_ITLB or a combination of both |
*/ |
static inline void mmu_demap_page(uintptr_t vaddr, int context, int mmu_flag) { |
__hypercall_fast5(MMU_DEMAP_PAGE, 0, 0, vaddr, context, mmu_flag); |
} |
|
/** |
* Installs a locked TLB entry in kernel address space. |
* |
* @param vaddr VA of the page to be demapped |
* @param ra real address the page is mapped to |
* @param cacheable should the page be cacheble? |
* @param privileged should the mapping be privileged? |
* @param executable should the memory mapped be executable? |
* @param writable should the memory mapped be writable? |
* @param size code of the page size |
* @param mmu_flag MMU_FLAG_DTLB, MMU_FLAG_ITLB or a combination of both |
*/ |
static inline void mmu_map_perm_addr(uintptr_t vaddr, uintptr_t ra, |
bool cacheable, bool privileged, bool executable, |
bool writable, unsigned size, unsigned mmu_flags) { |
192,7 → 175,7 |
|
extern void dtlb_insert_mapping(uintptr_t, uintptr_t, int, bool, bool); |
|
extern void describe_mmu_fault(void); |
extern void describe_dmmu_fault(void); |
|
#endif /* !def __ASM__ */ |
|