/branches/sparc/boot/arch/sparc64/loader/asm.S |
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106,7 → 106,16 |
* 2. Invalidate I-cache. |
* 3. Flush instruction pipeline. |
*/ |
/* |
* US-III processors have a write-invalidate cache, so flushing it is |
* not required. We only use the FLUSH instruction to flush the |
* pipeline. |
*/ |
#ifdef US2 |
call icache_flush |
#endif |
membar #StoreStore |
flush %i7 |