/branches/sparc/boot/arch/sparc64/loader/asm.S |
---|
107,7 → 107,6 |
* 3. Flush instruction pipeline. |
*/ |
#if defined (SUN4U) |
/* |
* US3 processors have a write-invalidate cache, so explicitly |
* invalidating it is not required. Whether to invalidate I-cache |
114,7 → 113,6 |
* or not is decided according to the value of the global |
* "subarchitecture" variable (set in the bootstrap). |
*/ |
set subarchitecture, %g2 |
ldub [%g2], %g2 |
cmp %g2, 3 |
123,8 → 121,6 |
0: |
call icache_flush |
nop |
#endif |
1: |
membar #StoreStore |