449,13 → 449,17 |
/* |
* Spills the window at CWP + 2 to the kernel stack. This macro is to be |
* used before doing SAVE when the spill trap is undesirable. |
* |
* Parameters: |
* tmpreg1 global register to be used for scratching purposes |
* tmpreg2 global register to be used for scratching purposes |
*/ |
.macro INLINE_SPILL |
.macro INLINE_SPILL tmpreg1, tmpreg2 |
! CWP := CWP + 2 |
rdpr %cwp, %g3 |
add %g3, 2, %g3 |
and %g3, NWINDOWS - 1, %g3 ! modulo NWINDOWS |
wrpr %g3, %cwp |
rdpr %cwp, \tmpreg2 |
add \tmpreg2, 2, \tmpreg1 |
and \tmpreg1, NWINDOWS - 1, \tmpreg1 ! modulo NWINDOWS |
wrpr \tmpreg1, %cwp |
|
! spill to kernel stack |
stx %l0, [%sp + STACK_BIAS + L0_OFFSET] |
476,9 → 480,7 |
stx %i7, [%sp + STACK_BIAS + I7_OFFSET] |
|
! CWP := CWP - 2 |
add %g3, NWINDOWS - 2, %g3 |
and %g3, NWINDOWS - 1, %g3 ! modulo NWINDOWS |
wrpr %g3, %cwp |
wrpr \tmpreg2, %cwp |
|
saved |
.endm |
486,15 → 488,19 |
/* |
* Fill the window at CWP - 1 from the kernel stack. This macro is to be |
* used before doing RESTORE when the fill trap is undesirable. |
* |
* Parameters: |
* tmpreg1 global register to be used for scratching purposes |
* tmpreg2 global register to be used for scratching purposes |
*/ |
.macro INLINE_FILL |
.macro INLINE_FILL tmpreg1, tmpreg2 |
! CWP := CWP - 1 |
rdpr %cwp, %g3 |
add %g3, NWINDOWS - 1, %g3 |
and %g3, NWINDOWS - 1, %g3 |
wrpr %g3, %cwp |
rdpr %cwp, \tmpreg2 |
add \tmpreg2, NWINDOWS - 1, \tmpreg1 |
and \tmpreg1, NWINDOWS - 1, \tmpreg1 |
wrpr \tmpreg1, %cwp |
|
! fill |
! fill from kernel stack |
ldx [%sp + STACK_BIAS + L0_OFFSET], %l0 |
ldx [%sp + STACK_BIAS + L1_OFFSET], %l1 |
ldx [%sp + STACK_BIAS + L2_OFFSET], %l2 |
513,9 → 519,7 |
ldx [%sp + STACK_BIAS + I7_OFFSET], %i7 |
|
! CWP := CWP + 1 |
add %g3, 1, %g3 |
and %g3, NWINDOWS - 1, %g3 |
wrpr %g3, %cwp |
wrpr \tmpreg2, %cwp |
|
restored |
.endm |
540,14 → 544,14 |
1: |
/* |
* Prevent SAVE instruction from causing a spill exception. If the |
* CANSAVE register is zero, explicitly spill the current register |
* window. |
* CANSAVE register is zero, explicitly spill register window |
* at CWP + 2. |
*/ |
|
rdpr %cansave, %g3 |
brnz %g3, 2f |
nop |
INLINE_SPILL |
INLINE_SPILL %g3, %g4 |
|
2: |
/* ask for new register window */ |
580,6 → 584,7 |
|
/* switch to TL = 0, explicitly enable FPU */ |
wrpr %g0, 0, %tl |
wrpr %g0, 0, %gl |
wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate |
|
/* g1 -> l1, ..., g7 -> l7 */ |
661,14 → 666,14 |
|
4: |
/* |
* Prevent RESTORE instruction from causing a spill exception. If the |
* CANRESTORE register is zero, explicitly spill the current register |
* window. |
* Prevent RESTORE instruction from causing a fill exception. If the |
* CANRESTORE register is zero, explicitly fill register window |
* at CWP - 1. |
*/ |
rdpr %canrestore, %g1 |
brnz %g1, 5f |
nop |
INLINE_FILL |
INLINE_FILL %g3, %g4 |
|
5: |
restore |