/branches/sparc/kernel/generic/src/main/main.c |
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192,8 → 192,6 |
/* Keep this the first thing. */ |
the_initialize(THE); |
asm("sethi 0x40100, %g0"); |
LOG(); |
version_print(); |
/branches/sparc/kernel/arch/sparc64/src/start.S |
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47,16 → 47,6 |
#define BSP_FLAG 1 |
/* |
* 2^PHYSMEM_ADDR_SIZE is the size of the physical address space on |
* a given processor. |
*/ |
#if defined (US2) |
#define PHYSMEM_ADDR_SIZE 41 |
#elif defined (US3) |
#define PHYSMEM_ADDR_SIZE 43 |
#endif |
/* |
* Here is where the kernel is passed control from the boot loader. |
* |
* The registers are expected to be in this state: |
77,13 → 67,11 |
and %o0, %l0, %l7 ! l7 <= bootstrap processor? |
andn %o0, %l0, %l6 ! l6 <= start of physical memory |
! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base. |
! Get bits 40:13 of physmem_base. |
srlx %l6, 13, %l5 |
sllx %l5, 13 + (63 - 40), %l5 |
srlx %l5, 63 - 40, %l5 ! l5 <= physmem_base[40:13] |
! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13] |
sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5 |
srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5 |
/* |
* Setup basic runtime environment. |
*/ |
95,8 → 83,6 |
! consistent |
wrpr %g0, NWINDOWS - 1, %cleanwin ! prevent needless clean_window |
! traps for kernel |
wrpr %g0, 0, %wstate ! use the default spill/fill trap |
wrpr %g0, 0, %tl ! TL = 0, primary context |
! register is used |
258,8 → 244,7 |
/* |
* Precompute kernel 8K TLB data template. |
* %l5 contains starting physical address |
* bits [(PHYSMEM_ADDR_SIZE - 1):13] |
* %l5 contains starting physical address bits [40:13] |
*/ |
sethi %hi(kernel_8k_tlb_data_template), %l4 |
ldx [%l4 + %lo(kernel_8k_tlb_data_template)], %l3 |
/branches/sparc/kernel/arch/sparc64/Makefile.inc |
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76,14 → 76,6 |
DEFS += -DCONFIG_SMP |
endif |
ifeq ($(MACHINE),us2) |
DEFS += -DUS2 |
endif |
ifeq ($(MACHINE),us3) |
DEFS += -DUS3 |
endif |
ARCH_SOURCES = \ |
arch/$(ARCH)/src/cpu/cpu.c \ |
arch/$(ARCH)/src/asm.S \ |
/branches/sparc/kernel/kernel.config |
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76,11 → 76,6 |
@ "opteron" Opteron |
! [ARCH=amd64] MACHINE (choice) |
# CPU type |
@ "us2" UltraSPARC II |
@ "us3" UltraSPARC III |
! [ARCH=sparc64] MACHINE (choice) |
# Machine type |
@ "msim" MSIM Simulator |
@ "simics" Virtutech Simics simulator |
/branches/sparc/boot/arch/sparc64/loader/asm.S |
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105,17 → 105,8 |
* 1. Make sure that the code we have moved has drained to main memory. |
* 2. Invalidate I-cache. |
* 3. Flush instruction pipeline. |
*/ |
/* |
* US-III processors have a write-invalidate cache, so flushing it is |
* not required. We only use the FLUSH instruction to flush the |
* pipeline. |
*/ |
#ifdef US2 |
*/ |
call icache_flush |
#endif |
membar #StoreStore |
flush %i7 |
/branches/sparc/boot/arch/sparc64/Makefile.inc |
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28,22 → 28,12 |
TMP=distroot |
ifeq ($(OFW_IMPLEMENTATION),smart_firmware) |
DEFS += -DSMART_FIRMWARE |
SILO_PACKAGE=silo.patched.tar.gz |
endif |
ifeq ($(OFW_IMPLEMENTATION),open_boot) |
DEFS += -DOPEN_BOOT |
SILO_PACKAGE=silo.tar.gz |
endif |
build: $(BASE)/image.iso |
$(BASE)/image.iso: depend arch/$(ARCH)/loader/image.boot |
mkdir -p $(TMP)/boot |
mkdir -p $(TMP)/HelenOS |
cat arch/$(ARCH)/silo/$(SILO_PACKAGE) | (cd $(TMP)/boot; tar xvfz -) |
cat arch/$(ARCH)/silo/silo.tar.gz | (cd $(TMP)/boot; tar xvfz -) |
cp arch/$(ARCH)/silo/README arch/$(ARCH)/silo/COPYING arch/$(ARCH)/silo/silo.conf $(TMP)/boot |
cp arch/$(ARCH)/loader/image.boot $(TMP)/HelenOS/image.boot |
gzip -f $(TMP)/HelenOS/image.boot |
/branches/sparc/boot/arch/sparc64/silo/silo.patched.tar.gz |
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Cannot display: file marked as a binary type. |
svn:mime-type = application/octet-stream |
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/branches/sparc/boot/boot.config |
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82,8 → 82,3 |
@ "tmpfs" TMPFS image |
@ "fat" FAT16 image |
! RDFMT (choice) |
# OpenFirmware implementation |
@ "open_boot" OpenBoot (Sun Microsystems) |
@ "smart_firmware" SmartFirmware (CodeGen) |
! [ARCH=sparc64] OFW_IMPLEMENTATION (choice) |
/branches/sparc/boot/genarch/balloc.h |
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31,20 → 31,7 |
#include <types.h> |
/* |
* SmartFirmware unfortunatelly fails to claim physical memory |
* for the boot allocator if the requested memory is too big |
* (roughly 512 kB and more). SmartFirmware runs on machines |
* containing newer versions of UltraSPARC processors. It |
* has been observed that the OFW tree is small enough for these |
* machines so that it can fit into 256 kB. This is a workaround how |
* to get rid of the memory claiming failure. |
*/ |
#if defined (SMART_FIRMWARE) |
#define BALLOC_MAX_SIZE (256 * 1024) |
#else |
#define BALLOC_MAX_SIZE (1024 * 1024) |
#endif |
#define BALLOC_MAX_SIZE (1024 * 1024) |
typedef struct { |
uintptr_t base; |
/branches/sparc/contrib/util/DownloadAndPatchSILO.sh |
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Property changes: |
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-* |
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