/branches/network/uspace/lib/libc/arch/mips32/Makefile.inc |
---|
29,8 → 29,12 |
## Toolchain configuration |
# |
ifndef CROSS_PREFIX |
CROSS_PREFIX = /usr/local |
endif |
TARGET = mipsel-linux-gnu |
TOOLCHAIN_DIR = /usr/local/mipsel/bin |
TOOLCHAIN_DIR = $(CROSS_PREFIX)/mipsel/bin |
CFLAGS += -mips3 |
-include ../../Makefile.config |
/branches/network/uspace/lib/libc/arch/mips32/include/context_offset.h |
---|
File deleted |
/branches/network/uspace/lib/libc/arch/mips32/include/endian.h |
---|
File deleted |
/branches/network/uspace/lib/libc/arch/mips32/include/config.h |
---|
36,8 → 36,7 |
#define LIBC_mips32_CONFIG_H_ |
#define PAGE_WIDTH 14 |
#define PAGE_SIZE (1<<PAGE_WIDTH) |
#define PAGE_COLOR_BITS 0 /* dummy */ |
#define PAGE_SIZE (1 << PAGE_WIDTH) |
#endif |
/branches/network/uspace/lib/libc/arch/mips32/include/atomic.h |
---|
64,7 → 64,7 |
" sc %0, %1\n" |
" beq %0, %4, 1b\n" /* if the atomic operation failed, try again */ |
/* nop */ /* nop is inserted automatically by compiler */ |
: "=r" (tmp), "=m" (val->count), "=r" (v) |
: "=&r" (tmp), "+m" (val->count), "=&r" (v) |
: "i" (i), "i" (0) |
); |
/branches/network/uspace/lib/libc/arch/mips32/include/byteorder.h |
---|
0,0 → 1,43 |
/* |
* Copyright (c) 2005 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
/** @addtogroup libcmips32 |
* @{ |
*/ |
/** @file |
*/ |
#ifndef LIBC_mips32_BYTEORDER_H_ |
#define LIBC_mips32_BYTEORDER_H_ |
#define ARCH_IS_LITTLE_ENDIAN |
#endif |
/** @} |
*/ |
/branches/network/uspace/lib/libc/arch/mips32/src/entry.s |
---|
35,13 → 35,13 |
## User-space task entry point |
# |
# $a0 ($4) contains the PCB pointer |
# |
.ent __entry |
__entry: |
.frame $sp, 32, $31 |
.cpload $25 |
# Mips o32 may store its arguments on stack, make space (16 bytes), |
# so that it could work with -O0 |
# Make space additional 16 bytes for the stack frame |
48,42 → 48,18 |
addiu $sp, -32 |
.cprestore 16 # Allow PIC code |
jal __main |
nop |
jal __io_init |
nop |
jal main |
nop |
jal __exit |
nop |
.end |
.ent __entry_driver |
__entry_driver: |
.frame $sp, 32, $31 |
.cpload $25 |
# Mips o32 may store its arguments on stack, make space (16 bytes), |
# so that it could work with -O0 |
# Make space additional 16 bytes for the stack frame |
# Pass pcb_ptr to __main() as the first argument. pcb_ptr is already |
# in $a0. As the first argument is passed in $a0, no operation |
# is needed. |
addiu $sp, -32 |
.cprestore 16 # Allow PIC code |
jal __main |
nop |
jal main |
nop |
jal __exit |
nop |
.end |
# Alignment of output section data to 0x4000 |
.section .data |
.align 14 |
/branches/network/uspace/lib/libc/arch/mips32/src/fibril.S |
---|
31,119 → 31,13 |
.set noat |
.set noreorder |
#include <arch/asm/regname.h> |
#include <libarch/context_offset.h> |
#include <arch/context_offset.h> |
.global context_save |
.global context_restore |
.macro CONTEXT_STORE r |
sw $s0,OFFSET_S0(\r) |
sw $s1,OFFSET_S1(\r) |
sw $s2,OFFSET_S2(\r) |
sw $s3,OFFSET_S3(\r) |
sw $s4,OFFSET_S4(\r) |
sw $s5,OFFSET_S5(\r) |
sw $s6,OFFSET_S6(\r) |
sw $s7,OFFSET_S7(\r) |
sw $s8,OFFSET_S8(\r) |
sw $gp,OFFSET_GP(\r) |
sw $k1,OFFSET_TLS(\r) |
#ifdef CONFIG_MIPS_FPU |
mfc1 $t0,$20 |
sw $t0, OFFSET_F20(\r) |
mfc1 $t0,$21 |
sw $t0, OFFSET_F21(\r) |
mfc1 $t0,$22 |
sw $t0, OFFSET_F22(\r) |
mfc1 $t0,$23 |
sw $t0, OFFSET_F23(\r) |
mfc1 $t0,$24 |
sw $t0, OFFSET_F24(\r) |
mfc1 $t0,$25 |
sw $t0, OFFSET_F25(\r) |
mfc1 $t0,$26 |
sw $t0, OFFSET_F26(\r) |
mfc1 $t0,$27 |
sw $t0, OFFSET_F27(\r) |
mfc1 $t0,$28 |
sw $t0, OFFSET_F28(\r) |
mfc1 $t0,$29 |
sw $t0, OFFSET_F29(\r) |
mfc1 $t0,$30 |
sw $t0, OFFSET_F30(\r) |
#endif |
sw $ra,OFFSET_PC(\r) |
sw $sp,OFFSET_SP(\r) |
.endm |
.macro CONTEXT_LOAD r |
lw $s0,OFFSET_S0(\r) |
lw $s1,OFFSET_S1(\r) |
lw $s2,OFFSET_S2(\r) |
lw $s3,OFFSET_S3(\r) |
lw $s4,OFFSET_S4(\r) |
lw $s5,OFFSET_S5(\r) |
lw $s6,OFFSET_S6(\r) |
lw $s7,OFFSET_S7(\r) |
lw $s8,OFFSET_S8(\r) |
lw $gp,OFFSET_GP(\r) |
lw $k1,OFFSET_TLS(\r) |
#ifdef CONFIG_MIPS_FPU |
lw $t0, OFFSET_F20(\r) |
mtc1 $t0,$20 |
lw $t0, OFFSET_F21(\r) |
mtc1 $t0,$21 |
lw $t0, OFFSET_F22(\r) |
mtc1 $t0,$22 |
lw $t0, OFFSET_F23(\r) |
mtc1 $t0,$23 |
lw $t0, OFFSET_F24(\r) |
mtc1 $t0,$24 |
lw $t0, OFFSET_F25(\r) |
mtc1 $t0,$25 |
lw $t0, OFFSET_F26(\r) |
mtc1 $t0,$26 |
lw $t0, OFFSET_F27(\r) |
mtc1 $t0,$27 |
lw $t0, OFFSET_F28(\r) |
mtc1 $t0,$28 |
lw $t0, OFFSET_F29(\r) |
mtc1 $t0,$29 |
lw $t0, OFFSET_F30(\r) |
mtc1 $t0,$30 |
#endif |
lw $ra,OFFSET_PC(\r) |
lw $sp,OFFSET_SP(\r) |
.endm |
context_save: |
CONTEXT_STORE $a0 |
CONTEXT_SAVE_ARCH_CORE $a0 |
# context_save returns 1 |
j $ra |
150,7 → 44,7 |
li $v0, 1 |
context_restore: |
CONTEXT_LOAD $a0 |
CONTEXT_RESTORE_ARCH_CORE $a0 |
# Just for the jump into first function, but one instruction |
# should not bother us |
/branches/network/uspace/lib/libc/arch/mips32/_link.ld.in |
---|
7,9 → 7,9 |
} |
SECTIONS { |
. = 0x4000; |
. = 0x4000 + SIZEOF_HEADERS; |
.init ALIGN(0x4000) : SUBALIGN(0x4000) { |
.init : { |
*(.init); |
} :text |
.text : { |
17,6 → 17,8 |
*(.rodata*); |
} :text |
. = . + 0x4000; |
.data : { |
*(.data); |
*(.data.rel*); |